XC25BS5 [TOREX]

PLL Clock Generator ICs with Built-In Divider/Multiplier Circuits (For Low Frequency range); PLL时钟发生器IC，内置分频器/倍频电路（低频范围）


型号：	XC25BS5
厂家：	Torex Semiconductor
描述：	PLL Clock Generator ICs with Built-In Divider/Multiplier Circuits (For Low Frequency range) PLL时钟发生器IC，内置分频器/倍频电路（低频范围）时钟发生器
文件：	总8页 (文件大小：190K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

01S_15XC25BS5 02.09.12 11:37 ページ 95

Series

PLL Clock Generator ICs with Built-In Divider/Multiplier Circuits (For Low Frequency range)

ꢁCMOS Low Power Consumption

■Applications

ꢀCrystal Oscillation Modules

ꢀPersonal Computers

ꢀPDAs

ꢁInput Frequency : 12KHz to 35MHz

ꢁDivider Ratio

: 1, 3 ~ 2047 divisions

(laser trimming)

ꢀPortable Audio Systems

ꢀVarious System Clocks

ꢁMultiplier Ratio

: 6 ~ 2047 multiplications

(laser trimming)

ꢁComparative Frequency : 12KHz ~ 500KHz

ꢁOutput Frequency : 3MHz ~ 30MHz

ꢁMini Mold SOT-26 Package

■General Description

The XC25BS5 series are high frequency, low power consumption PLL

clock generator ICs with divider circuit & multiplier PLL circuit.

■Features

Output Frequency

: 3MHz ~ 30MHz (Q0=fCLKin × N/M)

Reference Oscillation (fCLKin)

Laser trimming gives the option of being able to select from divider ratios

(M) of 1,3 to 2047 and multiplier ratios (N) of 6 to 2047.

: 12KHz ~ 35MHz

: Selectable from divisions of 1, 3 ~ 2047

Selectable from multiplications of 6 ~ 2047

Divider Ratio (M)

Multiplier Ratio (N)

Output

Output frequency (Q0) is equal to reference oscillation (fCLKin)

multiplied by N/M, within a range of 3MHz to 30MHz. Q1 output is

selectable from input reference frequency (f0), input reference

frequency/2 (f0/2), ground (GND), and comparative frequency (f0/M).

Further, comparative frequencies, within a range of 12KHz to 500KHz,

can be obtained by dividing the reference oscillation. By halting

operation via the CE pin, consumption current can be controlled and

output will be one of high-impedance.

: 3-State

Q1 output selectable from input reference

oscillation, input reference oscillation/2,

GND, comparative frequency.

Operating Voltage Range: 2.97V ~ 5.5V

Low Power Consumption

: CMOS (stand-by function included)*1

Ultra Small Package : SOT-26 mini mold

*1 High output impedance during standby

■Pin Configuration

■ Pin Assignment

PIN NUMBER PIN NAME

FUNCTION

６�

５�

４�

CE�

CLKin

１�

２�

VSS

Chip Enable

GND

２�

３�

SS�

0�

VDD

３�

４�

PLL Output

SOT-26

(TOP VIEW)

Reference Oscillation, Reference �

Oscillation/2, GND, or Comparative�

Frequency Output

５�

６�

VDD

Power Supply

■Function List

ꢀCE, Q0/Q1 Pin Function

CLKin

Reference Clock Input

FUNCTION�

ＣＥ�

"Ｈ"�

"Ｌ"�

Open

Q0, Q1clock output�

Standby. Ouput pin = high impedance�

(VSS pin pull down due to IC's internal resistor)

"H" = High level�

"L" = Low level

01S_15XC25BS5 02.09.12 11:37 ページ 96

XC25BS5 Series

■Product Classification

ꢀOrdering Information

ꢀꢀ

XC25BS5 qwert

DESTINATION

DESCRIPTION

Denotes Product Number

(Based on internal standards)

�

e.g. Product Number 001 → qwe= 001

Package

M : SOTｰ26

Device Orientation

Ｒ : Embossed Tape : Standard Feed

Ｌ : Embossed Tape : Reverse Feed

■Packaging Information

ꢀSOT-26

+0.1�

-0.05

0.15

+0.1�

-0.05

0.4

（0.5）�

0～0.1

+0.1�

-0.05

0.4

（0.95）�

1.9±0.2

1.1±0.1

2.9±0.2

01S_15XC25BS5 02.09.12 11:37 ページ 97

XC25BS5

Series

■Marking

６� ５� ４�

qRepresents the Series name

MARK�

qwer

２� ３�

weRepresents the second and third figure

SOT-26�

(TOP VIEW)

of the Product Number.

MARK

w�

e�

rRepresents the Assembly Lot No.

(Based on internal standards)

■Block Diagram

VDD

11 bit PLL�

(×N)

1/M�

Counter

CLKin

Fuse�

Select

VSS

■Absolute Maximum Ratings

Ta = 25℃�

UNITS�

SYMBOL�

VDD�

VCK�

VCE�

VQ0�

VQ1�

CONDITIONS

VSS-0.3～VSS+7.0

VSS-0.3～VDD+0.3

PARAMETER

Supply Voltage

CLKin Pin Voltage

CE Pin Voltage

Q0 Pin Voltage

Q1 Pin Voltage

Q0 Output Current

Power Dissipation

Ambient Temp.

Storage Temp.

IQ0�

℃�

IQ1�

PD�

150

Topr�

Tstg

- 30～ +80

- 40～ +125

01S_15XC25BS5 02.09.12 11:37 ページ 98

XC25BS5 Series

■ Frequency Configuration : Example 1

SYMBOL�

ｆCLKin�

N/M�

MIN.�

11.0000�

-�

TYP.�

-�

MAX.�

16.9344�

-�

UNITS�

MHz�

-�

PARAMETER�

Input Frequency�

1.594�

-�

Multiplier/Divider Ratio �

PLL Output Frequency �

Q1 Output Frequency

fQ0�

17.5383

27.0000

MHz�

GND

ꢀElectrical Characteristics (DC)

fCLKin = 16.9344MHz, Multiplier/Divider Ratio = 1.594, Ta = 25°C, No Load

PARAMETER

Supply Voltage

SYMBOL

CONDITIONS

MIN.

2.97

2.7

TYP.�

MAX.� UNITS

�

3.3

�

VDD

VIH

3.63

Input Voltage "High"

Input Voltage "Low"

Input Current "High"

Input Current "Low"

Output Voltage "High"

Output Voltage "Low"

Supply Current 1

0.6

3.0

VIL

μA

IIH

VCK = 3.3V

VCK = 0V

IIL

-3.0

2.5

VOH

VOL

IDD1

IDD2

VCEH

VCEL

Rp1

Rp2

VDD = 2.97V,IOH = -8mA

VDD = 2.97V,IOL = 8mA

CE = 3.3V

3.0

0.4

6.0

5.0

μA

Supply Current 2

CE = 0V

CE "High" Voltage

2.7

CE "Low" Voltage

0.45

2.5

80.0

CE Pull down Resistance 1

CE Pull down Resistance 2

CE = 3.3V

CE = 0.3V

0.5

20.0

1.5

50.0

MΩ�

KΩ�

ꢀElectrical Characteristics (AC)

fCLKin=16.9344MHz, Multiplier/Divider Ratio=1.594, Ta=25 C, CL=15pF

PARAMETER

Output Rise Time

Output Fall Time

Duty Ratio

SYMBOL

CONDITIONS

MIN.

TYP.�

5.�0

5.0

MAX.� UNITS�

T^TLH

T^THL

DUTY

Ton

VDD=3.3V(20% to 80%)*2

-�

n�s

％�

Output Start Time

PLL Output Jitter

1σꢀ*2

*2 R&D guarantee

�

01S_15XC25BS5 02.09.12 11:37 ページ 99

XC25BS5

Series

■ Frequency Configuration : Example 2

SYMBOL�

ｆCLKin�

N/M�

MIN.�

52.0000�

-�

TYP.�

-�

MAX.�

78.0000�

-�

UNITS�

kHz�

-�

PARAMETER�

Input Frequency�

256.000�

-�

Multiplier/Divider Ratio �

PLL Output Frequency �

Q1 Output Frequency

fQ0�

13.312

19.968

MHz�

GND

ꢀElectrical Characteristics (DC)

fCLKin=78kHz, Multiplier/Divider Ratio=256, Ta=25°C, No Load

PARAMETER

Supply Voltage

SYMBOL

CONDITIONS

MIN.

2.97

2.7

TYP.�

MAX.� UNITS�

�

3.3

�

V�

VDD

VIH

3.63

Input Voltage "High"

Input Voltage "Low"

Input Current "High"

Input Current "Low"

Output Voltage "High"

Output Voltage "Low"

Supply Current 1

0.6

3.0

VIL

μA

IIH

VCK=3.3V

VCK=0V

IIL

- 3.0

2.5

VOH

VOL

IDD1

IDD2

VCEH

VCEL

Rp1

Rp2

VDD=2.97V,IOH= - 8mA

VDD=2.97V,IOL=8mA

CE=3.3V

2.0

0.4

4.0

5.0

μA

Supply Current 2

CE=0V

CE "High" Voltage

2.7

CE "Low" Voltage

0.45

2.5

80.0

CE Pull down Resistance 1

CE Pull down Resistance 2

0.5

20.0

1.5

50.0

CE=3.3V

CE=0.3V

MΩ�

KΩ�

ꢀElectrical Characteristics (AC)

fCLKin=78KHz, Multiplier/Divider Ratio=256, Ta=25 C, CL=15pF

PARAMETER

Output Rise Time

Output Fall Time

Duty Ratio

SYMBOL

T^TLH

CONDITIONS

MIN.

TYP.�

5.�0

5.0

MAX.� UNITS�

VDD=3.3V(20% to 80%)*2

-�

n�s

TTHL

DUTY

Ton

％�

Output Start Time

PLL Output Jitter

1σꢀ*2

*2 R&D guarantee

01S_15XC25BS5 02.09.12 11:37 ページ 100

XC25BS5 Series

■Typical Application Circuits

qQ1 Pin - reference oscillation, reference oscillation/2, comparative frequency.

Rq1

fQ1

fCLKin

XC25BS5

V^DD

0.1μF

Rq0

fQ0

wQ1 Pin - GND

fCLKin

XC25BS5

VDD

0.1μF

Rq0

fQ0

■Note:

(1) Please insert a by-pass capacitor of 0.1µF.

(2) Rq0 and Rq1 are matching resistors. Their use is recommended in order to counter unwanted radiations.

(3) Please place a by-pass capacitor and matching resistors as close to the IC as possible. It may be that the output cannot be locked if the

by-pass capacitor is not close enough to the IC. Further, there is a possibility of unwanted radiation occurance between the resistor and

the IC pin if the matching resistor is not close enough to the IC.

(4) When selecting GND for the Q1 pin, although the output of Q1 pin is GND level, it is also recommended that the Q1 pin is connected to

GND pattern on the PCB.

(5) When the CE pin is not controlled by external signals, it is recommended that a time constant circuit of R1=1kΩ × C0.1µF be added for

stability.

(6) With this IC, output is achieved by dividing and multiplying the reference oscillation by means of the PLL circuit. In cases where this

output is further used as a reference oscillation of another PLL circuit, it may be that the final output signal's jitter increases, so all

necessary precautions should be taken to avoid this.

(7) It is recommended that a low noise power supply, such as a series regulator, be used for the supply voltage. Using a power supply such

as a switching regulator might lead to a larger jitter which in turn may lead to an inability to lock due to the ripple of the switching

regulator.

100

01S_15XC25BS5 02.09.12 11:37 ページ 101

XC25BS5

Series

■Reference Land Pattern

q Q1 Pin - reference oscillation, reference oscillation/2, comparative frequency.

0.7

1.9

by-pass capacitor

C=0.1μF

matching resistor

(mm)

wQ1 Pin - GND

0.7

1.9

by-pass capacitor

C=0.1μF

matching resistor

(mm)

101

01S_15XC25BS5 02.09.12 11:37 ページ 102

XC25BS5 Series

■AC Characteristic Waveforms

1) Output Rise Time / Output Fall Time

Output Waveform

0.8VDD

DUTY Test Level

0.5VDD

0.2VDD

TTLH

TTHL

2) Duty Ratio

Output Waveform

DUTY Test Level

0.5VDD

DUTY =(TW/T)

×�100 (%)

3) Output Start Time

VIH

CE Input

Ton

Output

(Hi-Z)

102

XC25BS5 [TOREX]

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