XC25BS8030ER-G [TOREX]
Ultra Small PLL Clock Generator ICs with Built-In Divider/Multiplier Circuits; 超小型的PLL时钟发生器IC,内置分频器/倍频器电路型号: | XC25BS8030ER-G |
厂家: | Torex Semiconductor |
描述: | Ultra Small PLL Clock Generator ICs with Built-In Divider/Multiplier Circuits |
文件: | 总14页 (文件大小:592K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
XC25BS8Series
ETR1506-007a
Ultra Small PLL Clock Generator ICs with Built-In Divider/Multiplier Circuits
■GENERAL DESCRIPTION
The XC25BS8 series is an ultra small PLL clock generator IC which can generate a high multiplier output up to 4095 from an input frequency as
low as 8kHz. The series includes a divider circuit, phase/frequency comparator, charge pump, and VCO so it is possible to configure a fully
operational circuit with a few external components like one low-pass filter capacitor. The Input divider ratio (M) can be selected from a range of 1
to 2047, the output divider ratio (N) can be selected from a range of 1 to 4095 and they are set internally by using laser timing technologies.
Output frequency (fQ0) is equal to input clock frequency (fCLKin) multiplied by N/M. Output frequency range is 1MHz to 100MHz. Reference clock
from 8kHz to 36MHz can be input as the input clock. The IC stops operation and current drain is suppressed when a low level signal is input to the
CE pin which greatly reduces current consumption and produces a high impedance output.
The setting of the input divider ratio (M), output divider ratio (N), and charge pump current (Ip) are factory fixed semi-custom. Please advise your
Torex sales representative of your particular input/output frequency and supply voltage specifications so that we can see if we will be able to
support your requirements. The series is available in small SOT-26W and USP-6C.
■FEATURES
■APPLICATIONS
Input Frequency Range
Output Frequency Range
: 8kHz ~ 36MHz (*1)
: 1MHz ~ 100MHz
(fQ0=fCLKin × N/M) (*1)
: 1 ~ 4095 (*1)
● Clock for controlling a Imaging dot (LCD)
● DSC (Digital still camera)
● DVC (Digital video camera)
● PND (Car navigation system)
● UMPC (Ultra Mobile Personal Computer)
● SSD (Solid State Disk)
Output Divider (N) Range
Input Divider (M) Range
Operating Voltage Range
Low Power Consumption
Small Packages
*1: The series are semi-custom products. Specifications for each
product are limited within the above range. The input frequency
range is set within ±5% of customer’s designated typical frequency.
Please note that setting of your some requirements may not be
possible due to the specification limits of this series.
: 1 ~ 2047(*1)
: 2.50V ~ 5.50V (*1)
: 10μA MAX. when stand-by (*2)
: SOT-26W, USP-6C
● Digital Photo Frame
● Microcomputer and HDD drives
● Cordless phones & Wireless communication
equipment
● Various system clocks
*2: When the IC is in stand-by mode, the output becomes high impedance
and the IC stops operation.
■TYPICAL PERFORMANCE
■TYPICAL APPLICATION CIRCUIT
CHARACTERISTICS
PLL Output signal jitter 2 (tJ2) (synchronous to an input signal)
XC25BS8001xx (610 multiplier, input 15kHz (TYP.))
*1
Output jitter
tJ2=20(ns)
Input Signal
Output Signal
*1: CIN (by-pass capacitor, 0.1μF) and C1 ( LPF capacitor, 0.1μ
F) should be connected as close as possible to the IC. Please
refer to the pattern reference layout schematics on page 8 for
details.
1/14
XC25BS8Series
■PIN CONFIGURATION
Q0
VSS
CE
6
5
4
* The dissipation pad (TAB) of the
bottom view of the USP-6C package
should be connected to the VSS (No. 2)
pin.
VDD
Q0
VSS
CE
1
6
5
4
2
3
LPF
CLKin
1
2
3
VDD
LPF
CLKin
SOT-26W
USP-6C
(TOP VIEW)
(BOTTOM VIEW)
■PIN ASSIGNEMNT
PIN NUMBER
PIN NAME
FUNCTION
SOT-26W
USP-6C
6
5
4
3
2
1
1
2
3
4
5
6
Q0
VSS
Clock Output
Ground
Stand-by Control (*)
CE
CLKin
LPF
VDD
Reference Clock Signal Input
Device connection for Low Pass Filter
Power Input
■FUNCTION LIST
*H: High level input
L: Low level input (stand-by mode)
CE
Q0
'H''
'L'' or OPEN
Signal Output
High Impedance
2/14
XC25BS8
Series
■PRODUCT CLASSIFICATION
●Ordering Information
(*1)
XC25BS8①②③④⑤-⑥
DESIGNATOR
DESCRIPTION
Product Number
SYMBOL
001~
DESCRIPTION
Serial number based on internal standards
①②③
e.g. product number 001→①②③=001
MR
MR-G
ER
SOT-26W
SOT-26W (Halogen & Antimony free)
USP-6C
Packages
④⑤-⑥
Taping Type (*2)
ER-G
USP-6C (Halogen & Antimony free)
(*1)
(*2)
The “-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant.
The device orientation is fixed in its embossed tape pocket. For reverse orientation, please contact your local Torex sales office or
representative. (Standard orientation: ④R-⑥, Reverse orientation: ④L-⑥)
■BLOCK DIAGRAM
VSS
Output
Buffer
CE
Q0
Rdn
1/N
Counter
Charge
Pump
Phase
Detector
VCO
1/M
Counter
CLKin
VDD
C1:Low Pass Filter Ceramic Capacitor
LPF
C1
(Please set as an external components between LPF Pin and VSS
)
Recommended components (1608 Type);
C1:0.1μF ---- Taiyo yuden EMK107BJ104KA
Ta=25℃
■ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATINGS
VSS - 0.3 ~ VSS + 7.0
VSS - 0.3 ~ VDD + 0.3
VSS - 0.3 ~ VDD + 0.3
VSS - 0.3 ~ VDD + 0.3
± 50
UNITS
Supply Voltage
VDD
VCK
VCE
VQ0
IQ0
V
V
V
V
CLKin Pin Input Voltage
CE Pin Input Voltage
Q0 Pin Output Voltage
Q0 Pin Output Current
mA
mW
mW
SOT-26W
USP-6C
250
Power Dissipation
Pd
100
Operating Temperature Range
Storage Temperature Range
Topr
Tstg
-40 ~+85
℃
℃
-55 ~+125
3/14
XC25BS8Series
■SELECTION GUIDE
*1: The table below introduces standard products. Please select with seeing the combination of input frequencies and multiplications.
The test condition: VDD=3.3V±10%
*2: For other input frequency and multiplication, please ask your Torex sales contacts.
Synchronization
jitter
/ Output Period (%)
Input Frequency
Synchronization
jitter
Multiplication
64
Product Series
MIN
~
MAX
32kHz
32kHz
32kHz
32kHz
32kHz
32kHz
32kHz
32kHz
32kHz
32kHz
32kHz
32kHz
32kHz
32kHz
32kHz
32kHz
32kHz
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
192kHz
192kHz
96kHz
48kHz
192kHz
96kHz
48kHz
192kHz
96kHz
48kHz
192kHz
96kHz
48kHz
96kHz
48kHz
96kHz
48kHz
36ns
32ns
24ns
20ns
30ns
20ns
16ns
24ns
22ns
18ns
21ns
20ns
18ns
18ns
16ns
16ns
14ns
10%
18%
14%
11%
25%
17%
14%
27%
25%
20%
36%
34%
30%
41%
36%
54%
47%
XC25BS8044
XC25BS8027
XC25BS8028
XC25BS8057
XC25BS8030
XC25BS8031
XC25BS8058
XC25BS8033
XC25BS8026
XC25BS8025
XC25BS8035
XC25BS8036
XC25BS8037
XC25BS8039
XC25BS8040
XC25BS8042
XC25BS8043
128
192
256
384
512
768
* Synchronization jitters are tested at fCLKIN=44.1kHz.
Amount of Jitter
Synchronization
/ Output Period (%)
Input Frequency
Multiplication
Amount of Jitter
Synchronization
Product Series
MIN
~
MAX
64
8kHz
8kHz
8kHz
8kHz
8kHz
8kHz
8kHz
~
16kHz
16kHz
16kHz
16kHz
16kHz
16kHz
16kHz
160ns
140ns
110ns
100ns
96ns
8%
XC25BS8045
XC25BS8029
XC25BS8032
XC25BS8034
XC25BS8038
XC25BS8041
XC25BS8046
128
192
256
384
512
768
~
~
~
~
~
~
14%
17%
20%
29%
21%
29%
52ns
48ns
* Synchronization jitters are tested at fCLKIN=8kH.
Amount of Jitter
Synchronization
/ Output Period (%)
Input Frequency
Multiplication
Amount of Jitter
Synchronization
Product Series
MIN
~
MAX
1
2
8MHz
6MHz
2MHz
2MHz
2MHz
2MHz
2MHz
2MHz
2MHz
2MHz
~
74MHz
37MHz
24MHz
18MHz
14MHz
12MHz
10MHz
9MHz
7ns
6ns
12ns
7ns
8ns
7ns
7ns
6ns
6ns
7ns
8%
XC25BS8047
XC25BS8048
XC25BS8049
XC25BS8050
XC25BS8051
XC25BS8052
XC25BS8053
XC25BS8054
XC25BS8055
XC25BS8056
~
~
~
~
~
~
~
~
~
11%
11%
8%
3
4
5
12%
13%
15%
14%
16%
21%
6
7
8
9
8MHz
10
7MHz
* Synchronization jitters are tested in the condition below.
For the XC258047 (1 Multiplication), fCLKIN =12MHz. For the XC258048(2 Multiplication), fCLKIN= 8MHz
Except above, fCLKIN=3MHz is used.
4/14
XC25BS8
Series
■ELECTRICAL CHARACTERISTICS
●Recommended Operating Conditions: XC25BS8050xx (4 multiplication, Input 3MHz (TYP.)) 3.3V (TYP.)
Tested below Ta=25OC
PARAMETER
SYMBOL
CONDITIONS
MIN.
MAX.
UNITS
VDD
fCLKin
N/M
fQ0
2.97
3.63
V
MHz
-
Supply Voltage 3.3V
Input Frequency
Multiplier Ratio
3.3V (TYP.) operation
(*1)
2.000
18.500
Typical value is shown (*1)
4
(*1)
8.000
-
74.000
15
MHz
pF
Output Frequency
Load Capacity (*3)
CL
Output Start Time (*2)(*3)
tSTART
f
CLKin=2.000MHz
0.05
20
ms
NOTE:
*1: The values are measured when a capacitor CIN=0.1μF is connected between VDD and VSS pins, a capacitor C1=0.1μF is connected
between LFP and VSS pins
*2: It is a time to get stable output signal from Q0 pin after the CE pin is turned on while applying supply voltage to the VDD pin and applying the
input signal to the CLKin pin.
*3: Values indicated are design values which are not guaranteed 100%.
●DC Characteristics: XC25BS8050xx (4 multiplication, Input 3MHz (TYP.)) 3.3V (TYP.)
Ta=25℃
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS CIRCUIT
H Level Input Voltage
L Level Input Voltage
H Level Input Current
L Level Input Current
H Level Output Voltage
L Level Output Voltage
Supply Current 1
VIH
VIL
2.70
-
-
0.60
3.0
-
V
V
①
①
②
②
③
③
④
④
①
①
⑤
⑤
⑥
-
-
IiH
VCLKin=VDD-0.3V
VCLKin=0.3V
-
-
μA
μA
V
IiL
-3.0
-
VOH
VOL
IDD1
IDD2
VCEH
VCEL
Rdn1
Rdn2
IOZ
VDD=2.97V,IOH=-4mA
VDD=2.97V,IOL= 4mA
VDD=3.63V,CE= 3.63V
VDD=3.63V,CE= 0.0V
2.38
-
-
-
-
0.45
10.0
10
V
-
5.0
-
mA
μA
V
Supply Current 2
-
2.70
-
CE H Level Voltage
-
-
CE L Level Voltage
-
0.45
1.2
60
V
CE Pull-Down Resistance 1
CE Pull-Down Resistance 2
Output Off Leak Current
CE= VDD
CE= 0.1*VDD
0.1
5
0.6
30
-
MΩ
kΩ
μA
VDD=3.63V,CE= 0.0V
-
10
NOTE:
TEST CONDITION: VDD=3.0V, fCLKin=3MHz, C1=0.1μF, Multiplier ratio=4, No load
●AC Characteristics: XC25BS8050xx (4 multiplication, 3MHz(TYP.)) 3.3V (TYP.)
Ta=25℃
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX. UNITS CIRCUIT
Output Rise Time (*1)
Output Fall Time (*1)
Output Signal Duty Cycle (*1)
PLL Output Signal Jitter 1 (*1)
PLL Output Signal Jitter 2 (*1)
tR
tF
(20% ~ 80%)
(20% ~ 80%)
-
-
4.0
4.0
50
8.0
8.0
55
-
ns
ns
%
①
①
①
Duty
45
-
tJ1
1σ (Output Period)
45
ps
ns
①
①
tJ
Peak to Peak (Output Tracking)
-
8.0
-
2
NOTE:
TEST CONDITION: VDD=3.3V, fCLKin=3MHz, C1=0.1μF, Multiplier ratio=4, CL=15pF
*1: Values indicated are design values, which are not guaranteed 100%.
5/14
XC25BS8Series
■ELECTRICAL CHARACTERISTICS (Continued)
●Recommended Operating Conditions: XC25BS8025xx (256multiplication, Input 44.1kHz (TYP.)) 5.0V (TYP.)
Tested below Ta=25OC
PARAMETER
SYMBOL
CONDITIONS
MIN.
MAX.
UNITS
4.50
5.50
Supply Voltage 5.0V
Input Frequency
VDD
fCLKin
N/M
fQ0
5.0V (TYP.) operation
V
(*1)
32.000
48.000
kHz
Typical value is shown (*1)
256
Multiplier Ratio
(*1)
8.693
-
96.075
15
Output Frequency
Load Capacity (*3)
Output Start Time (*2)(*3)
MHz
pF
CL
tSTART
f
CLKin=32.000kHz
0.05
20
ms
NOTE:
*1: The values are measured when a capacitor CIN=0.1μF is connected between VDD and VSS pins, a capacitor C1=0.1μF is connected
between LFP and VSS pins.
*2: It is a time to get stable output signal from Q0 pin after the CE pin is turned on while applying supply voltage to the VDD pin and applying
the input signal to the CLKin pin.
*3: Values indicated are design values which are not guaranteed 100%.
●DC Characteristics: XC25BS8025xx (256 multiplication, Input 44.1kHz (TYP.) ) 5.0V (TYP.)
Ta=25℃
PARAMETER
H Level Input Voltage
L Level Input Voltage
H Level Input Current
L Level Input Current
H Level Output Voltage
L Level Output Voltage
Supply Current 1
SYMBOL
VIH
CONDITIONS
MIN.
TYP.
MAX.
-
UNITS CIRCUIT
4.00
-
V
V
①
①
②
②
③
③
④
④
①
①
⑤
⑤
⑥
VIL
-
-
1.00
5.0
-
IIH
VCLKin=VDD-0.5V
VCLKin=0.5V
-
-
μA
μA
V
IIL
-5.0
-
VOH
VOL
VDD=4.50V,IOH=-8mA
VDD=4.50V,IOL= 8mA
VDD=5.50V,CE= 5.50V
VDD=5.50V,CE= 0.0V
3.60
-
-
-
-
0.65
13.0
20
V
IDD1
-
6.5
-
mA
μA
V
Supply Current 2
IDD2
-
4.00
-
CE H Level Voltage
VCEH
VCEL
Rdn1
Rdn2
IOZ
-
-
CE L Level Voltage
-
1.00
0.8
40
V
CE Pull-Down Resistance 1
CE Pull-Down Resistance 2
Output Off Leak Current
CE= VDD
CE= 0.1*VDD
0.1
2
0.4
20
-
MΩ
kΩ
μA
VDD=5.50V,CE= 0.0V
-
10
NOTE:
TEST CONDITION: VDD=5.0V, fCLKin=44.1kHz, C1=0.1μF, Multiplier ratio=256, No load
●AC Characteristics: XC25BS8025xx (256 multiplication, Input 44.1kHz (TYP.)) 5.0V (TYP.)
Ta=25℃
PARAMETER
SYMBOL
CONDITIONS
MIN. TYP. MAX. UNITS CIRCUIT
Output Rise Time (*1)
Output Fall Time (*1)
tR
tF
(20% ~ 80%)
(20% ~ 80%)
-
-
2.5
2.5
50
5.0
5.0
55
-
ns
ns
%
①
①
①
Output Signal Duty Cycle (*1)
Duty
45
-
PLL Output Signal Jitter 1 (*1)
PLL Output Signal Jitter 2 (*1)
tJ1
1σ(Output Period)
20
ps
ns
①
①
tJ
Peak to Peak (Output Tracking)
-
18.0
-
2
NOTE:
TEST CONDITION: VDD=5.0V, fCLKin=44.1kHz, C1=0.1μF, Multiplier ratio=256, CL=15pF
*1: Values indicated are design values, which are not guaranteed 100%.
6/14
XC25BS8
Series
■NOTE ON USE
(1) Please use this IC within the stated absolute maximum ratings. The IC is liable to malfunction should the ratings be
exceeded.
(2) The series is an analog IC. Please use a 0.01μF to 0.1μF of a by-pass capacitor.
(3) The constant of the LPF element of this IC is preset. Always use the capacitance value (=0.1μF) specified by us for
the external ceramic capacitor (C1) for LPF. Operating this IC with a capacitor of the wrong capacitance will cause
erroneous operation.
(4) Rq0 shown in the Typical Application Circuit is a matching resistor. The use is recommended in order to counter
unwanted radiations.
(5) Please place the by-pass capacitor and the matching resistor as close to the IC as possible. The IC may not operate
normally if the by-pass capacitor is not close enough to the IC. Further, the unwanted radiation may occur between
the resistor and the IC pin if the matching resistor is not close enough to the IC.
(6)When the CE pin is not controlled by external signals, it is recommended that a time constant circuit of R1=1kΩ ×C2
= 0.1μF be added for stability.
(7) With this IC, output is achieved by dividing and multiplying the reference oscillation by means of the PLL circuit. In
cases where this output is further used as a reference oscillation of another PLL circuit, it may be that the final output
signal's jitter increases; therefore, all necessary precautions should be taken to avoid this.
(8) It is recommended that a low noise power supply, such as a series regulator, be used as the series’ supply voltage.
Using a power supply such as a switching regulator may enlarge the jitter, which in turn may lead to abnormal
operation. Please confirm its operation with the actual device.
(9) For operating the IC normally, please take procedures below when applying voltage to the series’ input pin:
1) Apply power source while the CE pin is "L" level with no clock input (high-Impedance or “L”),
2) Input the clock,
3) At least 100μs after applying clock input, change the CE pin into “H” level and then to enable.
The IC has to be started by inputting the clock once the power rises completely. The CE pin, then, should be enabling.
If the CE pin becomes enable and the clock is inputted before the power rises completely, an internal reset circuit
does not operate normally which may cause to generate extraneous frequency.
●eg.)Matching Resistance (Rq0) and Device for Time constant circuit (R1,C2)are connected,
(Package: SOT-26W)
7/14
XC25BS8Series
■NOTE ON USE (Continued)
●Instructions on Pattern Layout
1. In order to stabilize VDD voltage level, we recommend that a by-pass capacitor (CIN) be connected as close as possible to
the VDD and VSS pins.
2. Please mount the low pass filter capacitor C1(=0.1μF) as close to the IC as possible.
3. Make the pattern as close to the IC as possible and use thick, short connecting traces to reduce the circuit impedance.
4. Make sure that the VSS (GND) traces are as thick as possible, as variations in ground potential caused by noise may
result in instability of this product.
< Reference pattern layout >
* We prepare the evaluation board PCB, which is designed by the below layout pattern.
1. SOT-26W Reference Pattern Layout
2. USP-6C Reference Pattern Layout
QO
CE
VDD
VSS
C1
CLK
XC25BS8
TOREX
8/14
XC25BS8
Series
■TEST CIRCUIT
Determination, etc of output frequency and duty
①Operating Supply Voltage
H Level Input Voltage
L Level Input Voltage
CE “H” Level Voltage
CE “L” Level Voltage
Output Rise Time
Determination, etc of CE input voltage
Output Fall Time
Output Signal Duty
PLL Output Signal Jitter 1
PLL Output Signal Jitter 2
②H Level Input Current
L Level Input Current
③H Level Output Voltage
Checking output waveform
L Level Output Voltage
When measuring VOL: turn the switch on to R1
When measuring VOH: turn the switch on to R2
VDD
Q0
CE
SW
CLKin
pulse
Input CLK
VSS
LPF
R1
R2
C1
When measuring VOH
Q0 output waveform
When measuring VOL
Q0 output waveform
9/14
XC25BS8Series
■TEST CIRCUIT (Continued)
④Supply Current 1
Supply Current 2
VDD
Q0
SW=”H” : IDDI measurement
SW=”L” : IDD2 measurement
CLKin
A
Input CLK
CE
LPF
VSS
SW=”L”
C1
⑤CE Pull-Down Resistance 1
Measuring IRdn1
Rdn1=VDD / IRdn1
Measuring IRdn2
CE Pull-Down Resistance 2
Rdn2=(0.1 x VDD) / IRdn2
⑥Output Off Leak Current
VDD
Q0
A
CLKin
CE
VSS
LPF
C1
10/14
XC25BS8
Series
■AC CHARACTERISTICS TEST WAVEFORM
1) Output Rise Time, Output Fall Time
Output Waveform
DUTY Test Level
Q0 Output Signal Waveform
tR
tF
2) Duty Cycle
Output Waveform
Duty Cycle Measurement Level
Q0 Output Signal
Duty Cycle =(TW / T)×100(%)
3) Output Start Time
CE Input Signal Waveform
tSTART
Q0 Output Signal Waveform
11/14
XC25BS8Series
■TYPICAL PERFORMANCE CHARACTERISTICS
●Synchronous Output Frequency vs. Supply Voltage
XC25BS8001xx (610 multiplication, Input 15kHz(TYP.))
XC25BS8001(N/M=610)ꢀfQ0 vs VDD
30
25
20
ꢀMAX_Q0
15
85℃
25℃
10
-40℃
5
0
ꢀMIN_Q0
2.0
2.5
3.0
3.5
4.0
VDD(V)
4.5
5.0
5.5
6.0
12/14
XC25BS8
Series
■PACKAGE INFORMATION
●SOT-26W
●USP-6C
(unit : mm)
2.9±0.2
+0.1
0.4
-0.05
6
1
5
4
3
0~0.1
2
+0.1
-0.05
(0.95)
1.9±0.2
0.15
SOT-26W Package
* No. 1 pin is wider than the other pins.
Soldering fillet surface is not formed because the
sides of the pins are not plated.
●USP-6C Reference Metal Mask Design
●USP-6C Reference Pattern Layout
13/14
XC25BS8Series
1. The products and product specifications contained herein are subject to change without
notice to improve performance characteristics. Consult us, or our representatives
before use, to confirm that the information in this datasheet is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this datasheet.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this datasheet.
4. The products in this datasheet are not developed, designed, or approved for use with
such equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this datasheet within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this catalog may be copied or reproduced without the
prior permission of TOREX SEMICONDUCTOR LTD.
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