XC6122A633MR-G 概述
IC WATCHDOG TIMER SOT-25
XC6122A633MR-G 数据手册
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PDF下载XC6121/XC6122
XC6123/XC6124Series
ETR0209-011b
Voltage Detector with Watchdog Function and ON/OFF Control (VDF=1.6V~5.0V)
■GENERAL DESCRIPTION
The XC6121/XC6122/XC6123/XC6124 series is a group of high-precision, low current consumption voltage detectors with
watchdog functions incorporating CMOS process technology. The series consist of a reference voltage source, delay circuit,
comparator, and output driver. With the built-in delay circuit, the series do not require any external components to output
signals with release delay time. The output type is VDFL low when detected. The EN/ENB pin can control ON and OFF of the
watchdog functions. By setting the EN/ENB pin to low or high level, the watchdog function can be OFF while the voltage
detector remains operation. Since the EN/ENB pin of the XC6122 and XC6124 series is internally pulled up to the VIN pin or
pulled down to the VSS pin, these series can be used with the EN/ENB pin left open when the watchdog functions is used. The
detect voltages are internally fixed 1.6V ~ 5.0V in increments of 0.1V, using laser trimming technology. Six watchdog timeout
periods are available in a range from 50ms to 1.6s. Five release delay times are available in a range from 3.13ms to 400ms.
■APPLICATIONS
■FEATURES
Detect Voltage Range
: 1.6V ~ 5.0V, +2%
(0.1V increments)
: VDFL x 5% (TYP.)
: 1.0V ~ 6.0V
●Microprocessor watchdog monitoring
and reset circuits
Hysteresis Width
Operating Voltage Range
Detect Voltage Temperature
Characteristics
Output Configuration
Watchdog Pin
●Memory battery backup circuits
●System power-on reset circuits
●Power failure detection
: +100ppm/OC (TYP.)
: N-channel open drain
: Watchdog input
If watchdog input maintains ‘H’ or
‘L’ within the watchdog timeout
period, a reset signal is output
from the RESETB pin.
: When the EN/ENB pin voltage is
set to low or high level, the
watchdog function is forced off.
: 400ms, 200ms, 100ms, 50ms,
3.13ms (TYP.)
EN/ENB Pin
Release Delay Time
Watchdog Timeout Period
: 1.6s, 800ms, 400ms, 200ms,
100ms, 50ms (TYP.)
Operating Ambient Temperature
: -40℃~ +85℃
: SOT-25, USP-6C
: EU RoHS Compliant, Pb Free
Packages
Environmentally Friendly
■TYPICAL APPLICATION CIRCUIT ■TYPICAL PERFORMANCE
CHARACTERISTICS
●Supply Current vs. Input Voltage
XC6121~XC6124(V =2.7V)
DF
14.0
12.0
10.0
8.0
6.0
4.0
2.0
0
Ta=85℃
Ta=25℃
Ta=-40℃
0
1
2
3
4
5
6
Input Voltage:ꢀVIN (V)
1/26
XC6121/XC6122/XC6123/XC6124 Series
■PIN CONFIGURATION
USP-6C
(BOTTOM VIEW)
SOT-25
(TOP VIEW)
* The dissipation pad for the USP-6C package should be
solder-plated in reference mount pattern and metal masking
so as to enhance mounting strength and heat release. If
the pad needs to be connected to other pins, it should be
connected to the VSS (No. 5) pin.
■PIN ASSIGNMENT
PIN NUMBER
PIN NAME
FUNCTION
SOT-25
USP-6C
RESETB
VSS
Reset Output
Ground
1
2
3
4
5
-
4
5
2
1
6
3
EN/ENB
WD
Watchdog ON/OFF Control
Watchdog
VIN
Power Input
NC
No Connection
2/26
XC6121/XC6122/XC6123/XC6124
Series
■PRODUCT CLASSIFICATION
●Selection Guide
RESET OUTPUT
SERIES
EN/ENB PIN FUNCTION
HYSTERESIS
EN/ENB Input
Logic(*2)
Pull-Up or Down
Resistor
VDFL (RESETB)(*1)
N-channel open drain
N-channel open drain
N-channel open drain
N-channel open drain
VDFH (RESET)
With No Pull-Up
Resistor
XC6121
XC6122
XC6123
XC6124
-
-
-
-
EN
EN
With Pull-Up
Resistor
Available:
VDFL x 5% (TYP.)
With No Pull-Down
Resistor
ENB
ENB
With Pull-Down
Resistor
(*1) The output type of RESETB is set to L level at the time of detection.
(*2) EN input logic: The watchdog function turns on when the EN pin becomes high level.
ENB input logic: The watchdog function turns on when the ENB pin becomes low level.
●Ordering Information
(
)
XC6121①②③④⑤⑥-⑦ *2 : N-channel Open Drain Output (RESETB), EN Pin: No Pull-Up Resistor
(
)
XC6122①②③④⑤⑥-⑦ *2 : N-channel Open Drain Output (RESETB), EN Pin: Pull-Up Resistor
(
)
XC6123①②③④⑤⑥-⑦ *2 : N-channel Open Drain Output (RESETB), ENB Pin: No Pull-Down Resistor
(
)
XC6124①②③④⑤⑥-⑦ *2 : N-channel Open Drain Output (RESETB), ENB Pin: Pull-Down Resistor
DESIGNATOR
ITEM
SYMBOL
DESCRIPTION
A
C
D
E
F
2
3.13ms (TYP.)
50ms (TYP.)
100ms (TYP.)
200ms (TYP.)
400ms (TYP.)
50ms (TYP.)
100ms (TYP.)
200ms (TYP.)
400ms (TYP.)
1.6s (TYP.)
①
Release Delay Time(*1)
3
4
②
Watchdog Timeout Period
Detect Voltage
5
6
7
800ms (TYP.)
Detect voltage
③④
16 ~ 50
ex.) 4.5V: ③⇒4, ④⇒5
SOT-25 (3,000/Reel)
SOT-25 (3,000/Reel)
USP-6C (3,000/Reel)
USP-6C (3,000/Reel)
MR
MR-G
ER
Packages
(*2)
⑤⑥-⑦
(Order Unit)
ER-G
(*1) Please set the release delay time shorter than or equal to the watchdog timeout period.
ex.) XC6121D327MR or XC6121D627MR
(*2) The “-G” suffix denotes Halogen and Antimony free as well as being fully EU RoHS compliant.
3/26
XC6121/XC6122/XC6123/XC6124 Series
■BLOCK DIAGRAMS
●XC6121 Series
N-ch Open Drain Output
●XC6122 Series
N-ch Open Drain Output
4/26
XC6121/XC6122/XC6123/XC6124
Series
■BLOCK DIAGRAMS (Continued)
●XC6123 Series
N-ch Open Drain Output
●XC6124 Series
N-ch Open Drain Output
5/26
XC6121/XC6122/XC6123/XC6124 Series
■ABSOLUTE MAXIMUM RATINGS
O
Ta=25 C
PARAMETER
Input Voltage
SYMBOL
VIN
RATINGS
UNITS
VSS -0.3 ~ 7.0
VSS-0.3~VIN+0.3≦7.0
VSS -0.3 ~ 7.0
20
V
V
VEN/VENB
VWD
V
Output Current
Output Voltage
IRBOUT
mA
V
VSS -0.3 ~ 7.0
VRESETB
SOT-25
USP-6C
250
120
Power Dissipation
Pd
mW
O
Operating Ambient Temperature
Storage Temperature
Topr
Tstg
-40 ~ +85
-55 ~ +125
C
O
C
6/26
XC6121/XC6122/XC6123/XC6124
Series
Ta=25 OC
■ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS CIRCUIT
VDFL(T)
× 0.98
VDFL
VDFL(T)
× 1.02
VDFL
Detect Voltage
VDFL
VDFL(T)
VDFL
V
V
①
①
V
EN=VSS
Hysteresis Width
VHYS
VEN=VSS
× 0.02 × 0.05 × 0.08
VIN=VDFL(T)×0.9V
-
5
11
Supply Current (*1)
Operating Voltage
ISS
VIN
WD=OPEN
VIN=VDFL(T)×1.1V
VIN=6.0V
-
10
16
μA
②
①
-
12
-
0.5
18
6.0
-
1.0
0.15
V
VIN=1.0V
VIN=2.0V (VDFL(T)> 2.0V)
VIN=3.0V (VDFL(T) >3.0V)
VIN=4.0V (VDFL(T) >4.0V)
O
2.0
3.0
3.5
2.5
3.5
4.0
-
-
-
N-ch.
VDS=0.5V
Output Current
IRBOUT
mA
③
①
Temperature
Characteristics
△VDFL /
O
O
△Topr・VDFL-40 C < Topr < 85 C
-
+100
-
ppm/ C
2.00
37
3.13
50
5.00
63
Time until VIN is increased from
Release Delay Time
(VDFL<1.8V)
1.0V to 2.0V
tDR
ms
④
④
75
100
200
400
3.13
50
125
250
500
5.00
63
and attains to the release time level,
and the Reset output pin releases.
150
300
2.00
37
Time until VIN is increased from
1.0V to (VDFL x 1.1V)
and attains to the release time level,
and the Reset output pin releases.
Release Delay Time
(VDFL>1.9V)
tDR
ms
75
100
200
400
125
250
500
150
300
Time until VIN is decreased from 6.0V to
1.0V and attains to the detect voltage
level, and the Reset output pin detects
while the WD pin left open.
Detect Delay Time
tDF
-
5.5
33
μs
④
③
VDFL
Leakage Current
ILEAK
VIN=6.0V, VRESETB=6.0V
-
0.01
0.1
μA
37
75
50
100
200
400
800
1600
50
63
125
250
500
1000
2000
63
Time until VIN increases form
1.0V to 2.0V and
the Reset output pin is released to go
into the detection state. (WD=OPEN)
Watchdog
Timeout Period
(VDFL<1.8V)
150
300
600
1200
37
tWD
ms
ms
⑤
⑤
75
100
200
400
800
1600
125
250
500
1000
2000
Time until VIN increases from
1.0V to (VDFLx1.1V)
and the Reset output pin is released to
go into the detection state. (WD=OPEN)
Watchdog
Timeout Period
(VDFL>1.9V)
150
300
600
1200
tWD
7/26
XC6121/XC6122/XC6123/XC6124 Series
■ELECTRICAL CHARACTERISTICS (Continued)
Ta=25 OC
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
-
MAX.
-
UNITS CIRCUIT
VIN=6.0V,
Watchdog
Minimum Pulse Width
tWDIN
Apply pulse from 6.0V to 0V to the WD
pin.
300
ns
⑥
Watchdog
High Level Voltage
Watchdog
VWDH
VWDL
RWD
VIN=VDFL x 1.1V ~ 6.0V
VIN=VDFL x 1.1V ~ 6.0V
VWD=6V, RWD=VWD/IWD
VIN x 0.7
-
6
VIN x 0.3
900
V
V
⑥
⑥
⑦
⑧
⑧
0
300
1.3
0
-
Low Level Voltage
Watchdog
Pull-down Resistance
EN/ENB
600
kΩ
V
VENH/VENBH VIN=VDFL x 1.1V ~ 6.0V
VENL/VENBL VIN=VDFL x 1.1V ~ 6.0V
-
-
VIN
High Level Voltage
EN/ENB
0.35
V
Low Level Voltage
EN Pull-up
REN
VIN=6.0V, VEN=0V, REN=VIN / IEN
VIN=6.0V, VENB=6V, RENB=VENB / IENB
Resistance (*2)
ENB Pull-down
Resistance (*3)
1.0
1.6
2.4
MΩ
⑨
RENB
NOTE:
*
In case where no EN/ENB pin’s condition written in the test condition field, VEN=VIN and VENB=VSS
** VDFL(T)=Setting detect voltage value
(*1) The condition when the watchdog pin is ON.
.
The EN/ENB pin is CMOS input. For the XC6122 (pull-up resistor) and XC6124 (pull-down resistor),
supply current increases in the following values when the watchdog function is OFF.
XC6122 Series:(VIN-VEHL)/1.6MΩ(TYP.)
XC6124 Series:VEHBH/1.6MΩ(TYP.)
(*2) For the XC6122 series only.
(*3) For the XC6124 series only.
8/26
XC6121/XC6122/XC6123/XC6124
Series
■OPERATIONAL EXPLANATION
The XC6121/6122/6123/6124 series compare, using the error amplifier, the voltage of the internal voltage reference source
with the voltage divided by R1, R2 and R3 connected to the VIN pin. The resulting output signal from the error amplifier
activates the watchdog logic, delay circuit and the output driver. When the VIN pin voltage gradually falls and finally reaches
the detect voltage, the RESETB pin output goes from high to low in the case of the VDFL type ICs.
<RESETB / RESET Pin Output Signal>
* VDFL (RESETB) type - output signal: Low when detected.
The RESETB pin output goes from high to low whenever the VIN pin voltage falls below the detect voltage. The RESETB pin
remains low for the release delay time (tDR) after the VIN pin voltage reaches the release voltage. If neither rising nor falling
signals are applied to the WD pin within the watchdog timeout period, the RESETB pin output remains low for the release
delay time (tDR), and thereafter the RESET pin outputs high level signal.
<Hysteresis>
When the internal comparator output is high, the NMOS transistor connected in parallel to R3 is turned ON, activating the
hysteresis circuit. The difference between the release and detect voltages represents the hysteresis width, as shown by the
following calculations:
VDFL (detect voltage) = (R1+R2+R3) x Vref / (R2+R3)
VDR (release voltage) = (R1+R2) x Vref / (R2)
VHYS (hysteresis width) =VDR-VDFL (V)
VDR > VDFL
* Please refer to the block diagrams for R1, R2, R3 and Vref.
* Hysteresis width is selectable from VDFL x 0.05V (TYP.).
<Watchdog (WD) Pin>
The series use a watchdog timer to detect malfunction or “runaway” of the microprocessor. If neither rising nor falling signals
are applied from the microprocessor within the watchdog timeout period, the RESETB pin output maintains the detection state
for the release delay time (tDR), and thereafter the RESETB pin outputs low to high signal. The watchdog pin is pulled down
to the VSS internally. When the watchdog pin is not connected, A reset signal comes out after the watchdog timeout period.
Six watchdog timeout period settings (tWD) are available in 1.6s, 800ms, 400ms, 200ms, 100ms, and 50ms.
<EN Pin>
In case where the watchdog function is not used, When the EN pin input driven to low level, only the watchdog function is
forced off while the detect voltage circuit remains operation. For using the watchdog function, the EN pin should be used in
high level. Even after the input voltage and the EN pin voltage are driven back high, the RESETB pin output maintains the
detection state for the release delay time (TDR). (Refer to the TIMING CHART 1-①.) The watchdog function recovers
immediately when the input voltage becomes higher than the release voltage and the EN pin voltage driven from low to high
level. (Refer to the TIMING CHART 1-②.) A diode, which is an input protection element, is connected between the EN pin
and VIN pin. Therefore, if the EN pin is applied voltage that exceeds VIN, the current will flow to VIN through the diode. For
avoiding any damage to the IC, please use this IC within the stated maximum ratings (VSS -0.3 ~ VIN +0.3) on the EN pin.
<ENB Pin>
In case where the watchdog function is not used, when the ENB pin input driven to high level, only the watchdog function is
forced off while the detect voltage circuit remains operation. For using the watchdog function, the ENB pin should be used in
low level. Even after the input voltage and the ENB pin voltage are driven back low, the RESETB pin output maintains the
detection state for the release delay time (tDR). (Refer to the TIMING CHART 2-①.) The watchdog function recovers
immediately when the input voltage becomes higher than the release voltage and the ENB pin voltage driven from high to low
level. (Refer to the TIMING CHART 2-②.) A diode, which is an input protection element, is connected between the ENB pin
and VIN pin. Therefore, if the ENB pin is applied voltage that exceeds VIN, the current will flow to VIN through the diode. For
avoiding any damage to the IC, please use this IC within the stated maximum ratings (VSS -0.3 ~ VIN +0.3) on the ENB pin.
<Release Delay Time>
Release delay time (tDR) is the time that elapses from when the VIN pin reaches the release voltage, or when the watchdog
timeout period expires with no rising signal applied to the WD pin, until the RESETB pin output is released from the detection
state. Five release delay time (tDR) watchdog timeout period settings are available in 400ms, 200ms, 100ms, 50ms, and
3.13ms.
<Detect Delay Time>
Detect Delay Time (tDF) is the time that elapses from when the VIN pin voltage falls to the detect voltage until the RESETB pin
output goes into the detection state.
9/26
XC6121/XC6122/XC6123/XC6124 Series
■TIMING CHARTS
1. XC6121/XC6122 Series (EN products)
●N-ch Open Drain Output (Rpull=100kΩ)
Hysteresis Width
●tDF (N-ch Open Drain Output, Rpull=100kΩ)
10/26
XC6121/XC6122/XC6123/XC6124
Series
■TIMING CHARTS (Continued)
2. XC6123/XC6124 Series (ENB products)
●N-ch Open Drain Output (Rpull=100kΩ)
Hysteresis Width
●tDF (N-ch Open Drain Output, Rpull=100kΩ)
11/26
XC6121/XC6122/XC6123/XC6124 Series
■NOTES ON USE
1. Please use this IC within the stated maximum ratings. For temporary, transitional voltage drop or voltage rising
phenomenon, the IC is liable to malfunction should the ratings be exceeded.
2. When a resistor is connected between the VIN pin and the input, the VIN voltage drops while the IC is operating and a
malfunction may occur as a result of the IC’s through current.
3. In order to stabilize the IC’s operations, please ensure that the VIN pin’s input frequency’s rise and fall times are more than
1 μ s/V.
4. Noise at the power supply may cause a malfunction of the watchdog operation or the voltage detector. In such case,
please strength VIN and GND lines. Also, please connect a capacitor such as 0.22μF between the VIN pin and the GND pin
and evaluate the device on the actual board carefully before use.
5. Protecting against a malfunction while the watchdog time out period, an ignoring time (no reaction time) occurs to the rise
and fall times. Referring to the figure below, the ignoring time (no reaction time) lasts for 900μs at maximum. (refer to the
Figure1 below)
6. The EN pin of the XC6121 series is not internally pulled up. When using the watchdog function, please drive the VEN pin
in high level. The EN pin of the XC6122 series is internally pulled up. The watchdog function can be used even the EN
pin left open. The ENB pin of the XC6123 series is not internally pulled down. When using the watchdog function,
please drive the VENB pin in low level. The ENB pin of the XC6124 series is internally pulled down. The watchdog function
can be used even the ENB pin left open.
7. Torex places an importance on improving our products and its reliability.
However, by any possibility, we would request user fail-safe design and post-aging treatment on system or equipment.
[Figure1]
12/26
XC6121/XC6122/XC6123/XC6124
Series
■PIN LOGIC CONDITIONS
PIN NAME
LOGIC
H
CONDITIONS
VIN>VDFL+VHYS
PIN NAME LOGIC
CONDITIONS
The state maintaining WD>VWDH
for more than tWD
H
L
VIN
The state maintaining WD<VWDL
for more than tWD
L
VIN<VDFL
WD
H
L
VEN/VENB≧1.30V
VEN/VENB≦0.35V
L→H
H→L
VWDL→VWDH, 300ns≦tWDIN≦tWD
VWDH→VWDL, 300ns≦tWDIN≦tWD
EN/ENB
NOTE:
V
V
V
V
DFL: Detect Voltage
HYS: Hysteresis Range
WDH: WD High Level Voltage
WDL: WD Low Level Voltage
tWDIN: WD Pulse Width
tWD: WD Timeout Period
For the details of each parameter, please see the electrical characteristics.
■FUNCTION CHART
XC6121/XC6122
VEN
XC6123/XC6124
VENB
(*2)
VIN
H
VWD
VRESETB
H
L
Repeating detect and release (H→L→H)
H
L
L
OPEN
L⇔H
H
H
L
H
L
H
L
*1
NOTE:
*1: Including all logics of the WD (VWD=H, L, OPEN, H→L, L→H).
*2: When the VRESETB is High, the circuit is in the release state.
When the VRESETB is Low, the circuit is in the detection state.
*3: VIN=L and VEN/VENB=H can not be combined because the rated input voltage of the EN/ENB pin is Vss-0.3V to VIN+0.3V.
*4: The RESETB pin becomes indefinite operation while 0.35V<VEN/VENB<1.3V.
*5: The EN pin of the XC6121 series is not internally pulled up. When using the watchdog function, please drive the VEN pin in high
level. The EN pin of the XC6122 series is internally pulled up. The watchdog function can be used even the EN pin left open.
The ENB pin of the XC6123 series is not internally pulled down. When using the watchdog function, please drive the VENB pin in
low level. The ENB pin of the XC6124 series is internally pulled down. The watchdog function can be used even the ENB pin
left open.
13/26
XC6121/XC6122/XC6123/XC6124 Series
■TEST CIRCUITS
Circuit ①
Circuit ②
Circuit ③
VDS=0.5V
DS=6.0V when measuring
Leakage current
V
14/26
XC6121/XC6122/XC6123/XC6124
Series
■TEST CIRCUITS (Continued)
Circuit ④
Circuit ⑤
Circuit ⑥
15/26
XC6121/XC6122/XC6123/XC6124 Series
■TEST CIRCUITS (Continued)
Circuit ⑦
Circuit ⑧
100kΩ
Measurement waveform
VIN
RESETB
WD
EN/ENB
VSS
V
Note: The above reference is about the EN/ENB logic operation.
Circuit ⑨
100kΩ
VIN
RESETB
WD
REN=VIN/IEN
IEN
EN/ENB
A
VSS
IENB
RENB=VENB/IENB
Note:
XC6122 series has EN pin,
XC6124 Series has ENB pin.
16/26
XC6121/XC6122/XC6123/XC6124
Series
■TYPICAL PERFORMANCE CHARACTERISTICS
(1.)Supply Current vs. Input Voltage
XC6121~XC6124(V =1.6V)
DF
XC6121~XC6124(V =2.7V)
DF
14.0
12.0
10.0
8.0
6.0
4.0
2.0
0
14.0
12.0
10.0
8.0
6.0
4.0
2.0
0
Ta=85℃
Ta=85℃
Ta=25℃
Ta=25℃
Ta=-40℃
Ta=-40℃
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Input Voltage:ꢀVIN (V)
Input Voltage:ꢀVIN (V)
XC6121~XC6124(V =5.0V)
DF
14.0
12.0
10.0
8.0
6.0
4.0
2.0
0
Ta=85℃
Ta=25℃
Ta=-40℃
0
1
2
3
4
5
6
Input Voltage:ꢀVIN (V)
(2.)Detect, Release Voltage vs. Ambient Temperature
XC6121~XC6124(V =1.6V)
DF
XC6121~XC6124(V =2.7V)
DF
1.70
1.65
1.60
1.55
2.90
2.80
2.70
2.60
VDR
VDR
VDF
VDF
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature: Ta (℃)
Ambient Temperature: Ta (℃)
17/26
XC6121/XC6122/XC6123/XC6124 Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(2.)Detect, Release Voltage vs. Ambient Temperature (Continued)
XC6121~XC6124(V =5.0V)
DF
5.30
5.20
5.10
5.00
4.90
VDR
VDF
-50
-25
0
25
50
75
100
Ambient Temperature: Ta (℃)
(4.)Driver Output Current vs. Input Voltage
(3.)Nch Driver Output Current vs. VDS
XC6121~XC6124
XC6121~XC6124
6.0
30
Ta=-40℃
DS
=0.5V
V
Ta=25℃
5.0
4.0
3.0
2.0
1.0
0.0
25
Ta=25℃
V
IN =5.0V
20
15
10
5
VIN =4.0V
Ta=85℃
VIN =3.0V
VIN =2.0V
VIN =1.0V
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
VDS (V)
Input Voltage:ꢀVIN (V)
(5.)Release Delay Time vs. Ambient Temperature
XC6121~XC6124
XC6121~XC6124
300
3000
2500
2000
1500
1000
500
TDR=100ms
TDR=1600ms
250
200
150
100
50
0
0
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature: Ta (℃)
Ambient Temperature: Ta (℃)
18/26
XC6121/XC6122/XC6123/XC6124
Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(6.)Watchdog Timeout Period vs. Ambient Temperature
XC6121~XC6124
300
XC6121~XC6124
TWD=1600ms
3000
2500
2000
1500
1000
500
TWD=100ms
250
200
150
100
50
0
0
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature: Ta (℃)
Ambient Temperature: Ta (℃)
(8.)Watchdog Timeout Period vs. Input Voltage
(7.)Release Delay Time vs. Input Voltage
XC6121~XC6124
XC6121~XC6124
120
4.0
Ta=25℃
Ta=25℃
3.8
3.6
3.4
3.2
3.0
2.8
2.6
TWD=100ms
TDR=3.13ms
115
110
105
100
95
90
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Input Voltage:ꢀVIN (V)
Input Voltage:ꢀVIN (V)
(9.)Watchdog Low Level Threshould vs. Ambient Temperature
(
10.
)
Watchdog High Level Threshould vs. Ambient Temperature
XC6121~XC6124
XC6121~XC6124
6.0
5.0
4.0
3.0
2.0
1.0
0.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
IN
V =6.0V
IN
V =6.0V
IN
V =3.0V
IN
V =3.0V
IN
V =1.76V
IN
V =1.76V
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature: Ta (℃)
Ambient Temperature: Ta (℃)
19/26
XC6121/XC6122/XC6123/XC6124 Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(11.)Watchdog Pull-Down Resistance vs. Ambient Temperature
XC6121~XC6124
1100
1000
900
800
700
600
500
400
300
-50
-25
0
25
50
75
100
Ambient Temperature: Ta (℃)
(13.)ENB Pull-Down Resistance vs. Ambient Temperature
(12.)EN Pull-Up Resistance vs. Ambient Temperature
XC6121~XC6122
3.0
XC6123~XC6124
3.0
2.4
1.8
1.2
0.6
0.0
2.4
1.8
1.2
0.6
0.0
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature: Ta (℃)
Ambient Temperature: Ta (℃)
(14.)EN Ligh Level Voltage vs. Ambient Temperature
(15.)EN High Level Voltage vs. Ambient Temperature
XC6121~XC6122
1.10
XC6121~XC6122
1.10
1.00
0.90
1.00
0.90
IN
V
V
=6.0V
=3.0V
0.80
0.80
0.70
0.60
0.50
IN
V
V
=6.0V
=3.0V
IN
0.70
0.60
0.50
IN
IN
V
=1.76V
IN
V
=1.76V
-50
-25
0
25
50
75 100
-50
-25
0
25
50
75
100
Ambient Temperature: Ta (℃)
Ambient Temperature: Ta (℃)
20/26
XC6121/XC6122/XC6123/XC6124
Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(16.)ENB Low Level Voltage vs. Ambient Temperature
(17.)ENB High Level Voltage vs. Ambient Temperature
XC6123~XC6124
1.10
XC6123~XC6124
1.10
1.00
0.90
1.00
0.90
0.80
IN
V =6.0V
0.80
IN
V =6.0V
IN
V =3.0V
0.70
0.70
IN
V =3.0V
IN
V =1.76V
0.60
0.60
0.50
IN
V =1.76V
0.50
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature: Ta (℃)
Ambient Temperature: Ta (℃)
21/26
XC6121/XC6122/XC6123/XC6124 Series
■PACKAGING INFORMATION
●USP-6C
●SOT-25
Unit :mm
Unit :mm
●USP-6C Reference Pattern Layout
●USP-6C Reference Metal Mask Design
2.4
0.45
0.45
1
2
3
6
5
4
0.05
0.05
1.0
22/26
XC6121/XC6122/XC6123/XC6124
Series
■MARKING RULE
① represents product series
5
4
MARK
PRODUCT SERIES
XC6121******
―
E
①
1
②
③
④
―
F
XC6122******
XC6123******
XC6124******
2
3
―
H
SOT-25
―
K
② represents release delay time and watchdog timeout period
XC6122/XC6123/XC6124Series
XC6121Series
WATCH DOG
RELEASE
WATCH DOG
RELEASE
DELAY
TIME
PRODUCT
PRODUCT
SERIES
TIMEOUT
DELAY
TIME
TIMEOUT
PERIOD
MARK
MARK
SERIES
PERIOD
0
1
3.13ms
3.13 ms
3.13 ms
3.13 ms
3.13 ms
3.13 ms
50ms
50ms
100ms
200ms
400ms
800ms
1.6s
XC6121A2****
XC6121A3****
XC6121A4****
XC6121A5****
XC6121A7****
XC6121A6****
XC6121C2****
XC6121C3****
XC6121C4****
XC6121C5****
XC6121C7****
XC6121C6****
XC6121D3****
XC6121D4****
XC6121D5****
XC6121D7****
XC6121D6****
XC6121E4****
XC6121E5****
XC6121E7****
XC6121E6****
XC6121F5****
XC6121F7****
XC6121F6****
N
P
R
S
T
3.13ms
3.13ms
3.13ms
3.13ms
3.13ms
3.13ms
50ms
50ms
100ms
200ms
400ms
800ms
1.6s
XC612*A2****
XC612*A3****
XC612*A4****
XC612*A5****
XC612*A7****
XC612*A6****
XC612*C2****
XC612*C3****
XC612*C4****
XC612*C5****
XC612*C7****
XC612*C6****
XC612*D3****
XC612*D4****
XC612*D5****
XC612*D7****
XC612*D6****
XC612*E4****
XC612*E5****
XC612*E7****
XC612*E6****
XC612*F5****
XC612*F7****
XC612*F6****
2
3
4
5
U
V
X
Y
Z
6
50ms
50ms
7
50ms
100ms
200ms
400ms
800ms
1.6s
50ms
100ms
200ms
400ms
800ms
1.6s
8
50ms
50ms
9
50ms
50ms
A
B
H
C
L
50ms
A
B
A
C
B
D
C
D
E
H
F
50ms
50ms
50ms
100ms
100ms
100ms
100ms
100ms
200ms
200ms
200ms
200ms
400ms
400ms
400ms
100ms
200ms
400ms
800ms
1.6s
100ms
100ms
100ms
100ms
100ms
200ms
200ms
200ms
200ms
400ms
400ms
400ms
100ms
200ms
400ms
800ms
1.6s
D
M
E
R
F
S
T
K
U
200ms
400ms
800ms
1.6s
200ms
400ms
800ms
1.6s
400ms
800ms
1.6s
K
M
L
400ms
800ms
1.6s
23/26
XC6121/XC6122/XC6123/XC6124 Series
■MARKING RULE (Continued)
③ represents detect voltage
XC6122/XC6123/XC6124 Series
XC6121 Series
DETECT
DETECT
VOLTAGE
(V)
PRODUCT
SERIES
PRODUCT
SERIES
MARK
VOLTAGE
(V)
MARK
F
H
K
L
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
41
XC6121**16**
XC6121**17**
XC6121**18**
XC6121**19**
XC6121**20**
XC6121**21**
XC6121**22**
XC6121**23**
XC6121**24**
XC6121**25**
XC6121**26**
XC6121**27**
XC6121**28**
XC6121**29**
XC6121**30**
XC6121**31**
XC6121**32**
XC6121**33**
XC6121**34**
XC6121**35**
XC6121**36**
XC6121**37**
XC6121**38**
XC6121**39**
XC6121**40**
XC6121**41**
XC6121**42**
XC6121**43**
XC6121**44**
XC6121**45**
XC6121**46**
XC6121**47**
XC6121**48**
XC6121**49**
XC6121**50**
H
K
L
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
41
XC612***16**
XC612***17**
XC612***18**
XC612***19**
XC612***20**
XC612***21**
XC612***22**
XC612***23**
XC612***24**
XC612***25**
XC612***26**
XC612***27**
XC612***28**
XC612***29**
XC612***30**
XC612***31**
XC612***32**
XC612***33**
XC612***34**
XC612***35**
XC612***36**
XC612***37**
XC612***38**
XC612***39**
XC612***40**
XC612***41**
XC612***42**
XC612***43**
XC612***44**
XC612***45**
XC612***46**
XC612***47**
XC612***48**
XC612***49**
XC612***50**
M
N
P
R
S
T
U
V
X
Y
Z
0
M
N
P
R
S
T
U
V
X
Y
Z
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A
B
C
D
E
F
H
K
L
A
B
C
D
E
F
H
K
L
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
5.0
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
5.0
M
N
M
④ represents production lot number
0 to 9 and A to Z and inverted 0 to 9 and A to Z repeated. (G, I, J, O, Q, W excluded.)
24/26
XC6121/XC6122/XC6123/XC6124
Series
■MARKING RULE (Continued)
① represents product series
MARK
PRODUCT SERIES
XC6121******
XC6122******
XC6123******
XC6124******
1
2
3
6
P
K
R
U
5
4
② represents release delay time
USP-6C
MARK
RELEASE DELAY TIME
PRODUCT SERIES
XC612*A*****
XC612*C*****
XC612*D*****
XC612*E*****
XC612*F*****
A
C
D
E
F
3.13ms
50ms
100ms
200ms
400ms
③ represents watchdog timeout period
MARK
WATCHDOG TIMEOUT PERIOD
PRODUCT SERIES
XC612*2*****
XC612*3*****
XC612*4*****
XC612*5*****
XC612*7*****
XC612*6*****
2
3
4
5
7
6
50ms
100ms
200ms
400ms
800ms
1.6s
④⑤ represents detect voltage
MARK
DETECT VOLTAGE (V)
PRODUCT SERIES
④
3
⑤
3
3.3
5.0
XC612***33**
XC612***50**
5
0
⑥ represents production lot number
0 to 9 and A to Z repeated. (G, I, J, O, Q, W excluded.)
*No character inversion used.
25/26
XC6121/XC6122/XC6123/XC6124 Series
1. The products and product specifications contained herein are subject to change without
notice to improve performance characteristics. Consult us, or our representatives
before use, to confirm that the information in this datasheet is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this datasheet.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this datasheet.
4. The products in this datasheet are not developed, designed, or approved for use with
such equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this datasheet within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this datasheet may be copied or reproduced without the
prior permission of TOREX SEMICONDUCTOR LTD.
26/26
XC6122A633MR-G 相关器件
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