XC61FN6012MR [TOREX]

Power Supply Support Circuit, Fixed, 1 Channel, +6VV, CMOS, PDSO3, ROHS COMPLIANT, SOT-23, 3 PIN;


型号：	XC61FN6012MR
厂家：	Torex Semiconductor
描述：	Power Supply Support Circuit, Fixed, 1 Channel, +6VV, CMOS, PDSO3, ROHS COMPLIANT, SOT-23, 3 PIN 光电二极管
文件：	总14页 (文件大小：669K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

XC61FSeries

ETR0202_006

Voltage Detectors, Delay Circuit Built-In

■GENERAL DESCRIPTION

The XC61F series are highly accurate, low power consumption voltage detectors, manufactured using CMOS and laser

trimming technologies. A delay circuit is built-in to each detector.

Detect voltage is extremely accurate with minimal temperature drift.

Both CMOS and N-ch open drain output configurations are available.

Since the delay circuit is built-in, peripherals are unnecessary and high density mounting is possible.

■APPLICATIONS

■FEATURES

Highly Accurate

Low Power Consumption : 1.0μA(TYP.)[ VIN=2.0V ]

Detect Voltage Range 1.6V ~ 6.0V in 0.1V increments

: ± 2%

●Microprocessor reset circuitry

●Memory battery back-up circuits

●Power-on reset circuits

Operating Voltage Range : 0.7V ~ 10.0V

Detect Voltage Temperature Characteristics

:±100ppm/℃(TYP.)

●Power failure detection

●System battery life and charge voltage monitors

●Delay circuitry

Built-In Delay Circuit

: ① 1ms ~ 50ms

② 50ms ~ 200ms

③ 80ms ~ 400ms

Output Configuration

N-ch open drain output or CMOS

Operating Ambient Temperature : 30℃～+80℃

Packages

: SOT-23

SOT-89

TO-92

Environmentally Friendly : EU RoHS Compliant, Pb Free

* No parts are available with an accuracy of ± 1%

■TYPICAL PERFORMANCE

■TYPICAL APPLICATION CIRCUITS

CHARACTERISTICS

●Release Delay Time vs. Ambient Temperature

N-ch open drain output

Ambient Temperature:Ta(℃)

1/14

XC61F Series

■PIN CONFIGURATION

２

V_OUT

V_IN

V_SS

SOT-89

(TOP VIEW)

TO-92

(SIDE VIEW)

■PIN ASSIGNMENT

PIN NUMBER

PIN NAME

FUNCTION

SOT-23

SOT-89

TO-92

V_IN

V_SS

Supply Voltage Input

Ground

V_OUT

Output

2/14

XC61F

Series

■PRODUCT CLASSIFICATION

●Ordering Information

(

)

XC61F ①②③④⑤⑥⑦-⑧

DESIGNATOR

ITEM

SYMBOL

DESCRIPTION

CMOS output

①

Output Configuration

Detect Voltage

N-ch open drain output

e.g. 2.5V → ②2 , ③5

e.g. 3.8V → ②3, ③8

50ms ~ 200ms

②③

16 ~ 60

④

⑤

Release Output Delay

Detect Accuracy

80ms ~ 400ms

1ms ~ 50ms

Within ±2.0%

MR-G

SOT-23 (3,000/Reel)

SOT-89 (1,000/Reel)

PR-G

SOT-89 (1,000/Reel)

(*1)

⑥⑦-⑧

Packages (Order Unit)

TO-92 Taping Type: Paper type (2,000/Tape)

TO-92 Taping Type: Bag (500/Bag)

TH-G

TB-G

(*1)

The “-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant.

■BLOCK DIAGRAMS

(1) CMOS output

(2) N-ch open drain output

3/14

XC61F Series

■

ABSOLUTE MAXIMUM RATINGS

Ta = 25℃

UNITS

PARAMETER

SYMBOL

RATINGS

Input Voltage

V_IN

V_SS-0.3~12.0

Output Current

I_OUT

CMOS

V_SS-0.3 ~ V_IN+ 0.3

Output Voltage

V_OUT

N-ch open drain

output

V_SS-0.3 ~ 9

SOT-23

250

500

Power Dissipation

SOT-89

TO-92

300

Operating Ambient Temperature

Storage Temperature

Topr

Tstg

-30～+80

-40～+125

℃

■ELECTRICAL CHARACTERISTICS

Ta = 25℃

PARAMETER

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

CIRCUIT

VDF(T)

x 0.98

VDF(T)

x 1.02

VDF

x 0.08

2.6

Detect Voltage

VDF

①

VDF

x 0.02

VDF

x 0.05

0.9

1.0

1.3

1.6

2.0

Hysteresis Width

VHYS

VIN = 1.5V

VIN = 2.0V

VIN = 3.0V

VIN = 4.0V

VIN = 5.0V

3.0

Supply Current

ISS

VIN

μA

②

①

③

3.4

3.8

4.2

Operating Voltage

VDF= 1.6V to 6.0V

0.7

1.0

10.0

VIN = 1.0V

VIN = 2.0V

2.2

3.0

5.0

6.0

7.0

7.7

N-ch VDS =0.5V VIN = 3.0V

VIN = 4.0V

10.1

11.5

13.0

Output Current

IOUT

VIN = 5.0V

P-ch VDS=2.1V

VIN = 8.0V

-10.0

-0.01

0.01

-2.0

④

③

(CMOS Output)

CMOS Output

(P-ch)

V_IN=V_DFx 0.9V, V_OUT=0V

Leak

Current

I_LEAK

μA

N-ch Open

V_IN= 10.0V，V_OUT=10.0V

0.1

Drain Output

Detect Voltage

Temperature

Characteristics

ΔV_DF

-30℃≦Topr≦80℃

±100

ppm/

℃

①

⑤

(ΔTopr･V_DF

)

200

400

Release Delay Time

(VDR → VOUT inversion)

tDR

VIN changes from 0.6V to 10V

VDF (T): Setting detect voltage value

Release Voltage: VDR = VDF + VHYS

* Release Delay Time: 1ms to 50ms & 80ms to 400ms versions are also available.

Note: The power consumption during power-start to output being stable (release operation) is 2μA greater than it is after that period

(completion of release operation) because of delay circuit through current.

4/14

XC61F

Series

■OPERATIONAL EXPLANATION

●CMOS output

①

When a voltage higher than the release voltage (V_DR) is applied to the voltage input pin (V_IN), the voltage will gradually

fall. When a voltage higher than the detect voltage (V_DF) is applied to VIN, output (V_OUT) will be equal to the input at

VIN.

Note that high impedance exists at V_OUTwith the N-ch open drain output configuration. If the pin is pulled up, V_OUTwill

be equal to the pull up voltage.

②

③

④

When V_INfalls below V_DF, V_OUTwill be equal to the ground voltage (V_SS) level (detect state). Note that this also applies

to N-ch open drain output configurations.

When V_INfalls to a level below that of the minimum operating voltage (V_MIN) output will become unstable. Because

the output pin is generally pulled up with configurations, output will be equal to pull up voltage.

When V_INrises above the V_SSlevel (excepting levels lower than minimum operating voltage), V_OUTwill be equal to V_SS

until V_INreaches the V_DRlevel.

⑤

⑥

Although V_IN will rise to a level higher than V_DR, V_OUTmaintains ground voltage level via the delay circuit.

Following transient delay time, V_INwill be output at V_OUT. Note that high impedance exists with the N-ch open drain

output configuration and that voltage will be dependent on pull up.

Notes:

1. The difference between V_DRand V_DFrepresents the hysteresis range.

2. Release delay time (t_DR) represents the time it takes for V_INto appear at V_OUTonce the said voltage has exceeded the

V_DRlevel.

●Timing Chart

Release Delay Time (t

(t_DLY

)

5/14

XC61F Series

■DIRECTIONS FOR USE

●Notes on Use

1. Please use this IC within the stated absolute maximum ratings. For temporary, transitional voltage drop or voltage rising

phenomenon, the IC is liable to malfunction should the ratings be exceeded.

2. When a resistor is connected between the V_INpin and the power supply with CMOS output configurations, oscillation

may occur as a result of voltage drops at R_INif load current (I_OUT) exists. It is therefore recommend that no resistor be added.

(refer to Oscillation Description (1) below)

3. When a resistor is connected between the V_INpin and the power supply with CMOS output configurations, irrespective of

N-ch output configurations, oscillation may occur as a result of through current at the time of voltage release even if load

current (I_OUT) does not exist. (refer to Oscillation Description (2) below)

4. If a resistor (R_IN) must be used, then please use with as small a level of input impedance as possible in order to control the

occurrences of oscillation as described above. Further, please ensure that R_INis less than 10kΩ and that C_INis more than

0.1μF, please test with the actual device. However, N-ch open drain output only. (Figure 1).

5. With a resistor (R_IN) connected between the V_INpin and the power supply, the V_INpin voltage will be getting lower than the

power supply voltage as a result of the IC's supply current flowing through the V_INpin.

6. Depending on circuit's operation, release delay time of this IC can be widely changed due to upper limits or lower limits of

operational ambient temperature.

7. Torex places an importance on improving our products and its reliability.

However, by any possibility, we would request user fail-safe design and post-aging treatment on system or equipment.

●Oscillation Description

(1) Oscillation as a result of load current with the CMOS output configuration:

When the voltage applied at power supply, release operations commence and the detector's output voltage increases.

Load current (IOUT) will flow through RL. Because a voltage drop (RIN x IOUT) is produced at the RIN resistor, located

between the power supply and the VIN pin, the load current will flow via the IC's VIN pin. The voltage drop will also lead

to a fall in the voltage level at the VIN pin. When the VIN pin voltage level falls below the detect voltage level, detect

operations will commence. Following detect operations, load current flow will cease and since voltage drop at RIN will

disappear, the voltage level at the VIN pin will rise and release operations will begin over again.

Oscillation may occur with this " release - detect - release " repetition.

Further, this condition will also appear via means of a similar mechanism during detect operations.

(2) Oscillation as a result of through current:

Since the XC61F series are CMOS ICS, through current will flow when the IC's internal circuit switching operates

(during release and detect operations). Consequently, oscillation is liable to occur during release voltage operations

as a result of output current which is influenced by this through current (Figure 3).

Since hysteresis exists during detect operations, oscillation is unlikely to occur.

Power supply

Figure 1. When using an input resistor

6/14

XC61F

Series

■DIRECTIONS FOR USE (Continued)

●Oscillation Description (Continued)

Power supply

7/14

XC61F Series

■TEST CIRCUITS

測定回路１

測定回路２

●Circuit ②

●Circuit ①

220KΩ^*

測定回路３

測定回路４

●Circuit ④

●Circuit ③

測定回路５

●Circuit ⑤

220KΩ

* CMOS出力品の場合は不要です。

*Not necessary with CMOS output products.

8/14

XC61F

Series

■TYPICAL PERFORMANCE CHARACTERISTICS

(4) N-ch Driver Output Current vs. V_DS

9/14

XC61F Series

■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

(4) N-ch Driver Output Current vs. V_DS(Continues)

(5) N-ch Driver Output Current vs. Input Voltage

(6) P-ch Driver Output Current vs. Input Voltage

(7) Release Delay Time vs. Ambient Temperature

10/14

XC61F

Series

■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

(8) Release Delay Time vs. Input Voltage

11/14

XC61F Series

■PACKAGING INFORMATION

●SOT-23

●SOT-89

●TO-92 TH Type

●TO-92 TB Type

12/14

XC61F

Series

■MARKING RULE

●SOT-23, SOT-89

① represents integer of detect voltage and output configuration

CMOS output (XC61FC series)

MARK

CONFIGURATION

CMOS

VOLTAGE (V)

0.x

1.x

2.x

3.x

4.x

5.x

6.x

CMOS

①

②

③

④

CMOS

N-ch open drain output (XC61FN series)

MARK

CONFIGURATION

VOLTAGE (V)

N-ch

0.x

1.x

2.x

3.x

4.x

5.x

6.x

② represents decimal number of detect voltage

MARK

VOLTAGE (V)

MARK

VOLTAGE (V)

x.0

x.1

x.2

x.3

x.4

x.5

x.6

x.7

x.8

x.9

③ represents delay time

VOLTAGE (V)

DELAY TIME

50 ~ 200ms

80 ~ 400ms

1 ~ 50ms

④ represents assembly lot number (Based on internal standards)

●TO-92

① represents output configuration

MARK

OUTPUT CONFIGURATION

CMOS

N-ch

①

⑤

⑦

②

③

④

⑥

②, ③ represents detect voltage

MARK

VOLTAGE (V)

②

③

3.3

5.0

④ represents delay time

MARK

DELAY TIME

50ms ~ 200ms

80ms ~ 400ms

1ms ~ 50ms

TO-92

（SIDE VIEW）

⑤ represents detect voltage accuracy

MARK

DETECT VOLTAGE ACCURACY

Within +2%

⑥ represents a least significant digit of the production year (ex.)

MARK

PRODUCTION YEAR

2003

2004

⑦ represents production lot number

0 to 9, A to Z repeated (G, I, J, O, Q, W excluded)

13/14

XC61F Series

1. The products and product specifications contained herein are subject to change without

notice to improve performance characteristics. Consult us, or our representatives

before use, to confirm that the information in this datasheet is up to date.

2. We assume no responsibility for any infringement of patents, patent rights, or other

rights arising from the use of any information and circuitry in this datasheet.

3. Please ensure suitable shipping controls (including fail-safe designs and aging

protection) are in force for equipment employing products listed in this datasheet.

4. The products in this datasheet are not developed, designed, or approved for use with

such equipment whose failure of malfunction can be reasonably expected to directly

endanger the life of, or cause significant injury to, the user.

(e.g. Atomic energy; aerospace; transport; combustion and associated safety

equipment thereof.)

5. Please use the products listed in this datasheet within the specified ranges.

Should you wish to use the products under conditions exceeding the specifications,

please consult us or our representatives.

6. We assume no responsibility for damage or loss due to abnormal use.

prior permission of TOREX SEMICONDUCTOR LTD.

14/14

XC61FN6012MR [TOREX]

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