XC61GN1502HR [TOREX]
Power Management Circuit, Fixed, +1.5VV, CMOS;型号: | XC61GN1502HR |
厂家: | Torex Semiconductor |
描述: | Power Management Circuit, Fixed, +1.5VV, CMOS |
文件: | 总16页 (文件大小:1251K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
XC61GSeries
ETR0203_005a
Low Voltage Detectors (VDF= 0.8V~1.5V)
Standard Voltage Detectors (VDF 1.6V~6.0V)
■GENERAL DESCRIPTION
The XC61G series are highly precise, low power consumption voltage detectors, manufactured using CMOS and laser
trimming technologies.
Detect voltage is extremely accurate with minimal temperature drift.
Both CMOS and N-ch open drain output configurations are available.
■APPLICATIONS
■FEATURES
Highly Accurate
: ±2%
●Microprocessor reset circuitry
●Memory battery back-up circuits
●Power-on reset circuits
Low Power Consumption : 0.7 μA [ VIN=1.5V ] (TYP.)
Detect Voltage Range : 0.8V ~ 1.5V in 0.1V
increments (Low Voltage)
: 1.6V~6.0V in 0.1V
●Power failure detection
increments (Standard Voltage)
Operating Voltage Range : 0.7V ~ 6.0V (Low Voltage)
●System battery life and charge voltage monitors
:
0.7V~10.0V (Standard Voltage)
Detect Voltage Temperature characteristics
: ±100ppm/℃ (TYP.)
Output Configuration
: N-ch open drain output or CMOS
Operating Ambient Temperature : -40℃~+85℃
Package
USP-3
Environmentally Friendly: EU RoHS Compliant, Pb Free
■TYPICAL APPLICATION CIRCUITS
■TYPICAL PERFORMANCE CHARACTERISTICS
1/16
XC61G Series
■PIN CONFIGURATION
VIN
VIN
VSS
VOUT
(BOTTOM VIEW)
■PIN ASSIGNMENT
PIN NUMBER
PIN NAME
FUNCTION
USP-3
3
1
2
VIN
VSS
Supply Voltage
Ground
VOUT
Output
■PRODUCT CLASSIFICATION
●Ordering Information
*1
(
)
XC61G ①②③④⑤⑥⑦-⑧
DESIGNATOR
ITEM
SYMBOL
C
DESCRIPTION
CMOS output
①
Output Configuration
Detect Voltage
N
N-ch open drain output
e.g. 0.8V → ②0, ③8
e.g. 1.5V → ②1, ③5
No delay
②③
08 ~ 60
④
⑤
Output Delay
0
2
Detect Accuracy
Within ±2%
HR
HR-G
USP-3 (3,000/Reel)
USP-3 (3,000/Reel)
Packages
⑥⑦-⑧
(Order Unit)
(*1)
The “-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant.
■BLOCK DIAGRAMS
(1) CMOS Output
(2) N-ch Open Drain Output
2/16
XC61G
Series
■ABSOLUTE MAXIMUM RATINGS
Ta = 25℃
PARAMETER
Input Voltage
SYMBOL
RATINGS
UNITS
*1
*2
*1
*2
VSS-0.3 ~ 9.0
VIN
V
V
SS-0.3 ~ 12.0
50
Output Current
IOUT
mA
50
CMOS
VSS -0.3 ~ VIN +0.3
VSS -0.3 ~ 9.0
VSS -0.3 ~ 12.0
120
Output Voltage
Power Dissipation
VOUT
V
N-ch Open Drain Output *1
N-ch Open Drain Output *2
USP-3
Pd
mW
℃
Operating Ambient Temperature
Storage Temperature Range
Topr
Tstg
-40~+85
-40~+125
℃
■ELECTRICAL CHARACTERISTICS
VDF(T) = 0.8 to 6.0V ± 2%
Ta=25℃
PARAMETER
Detect Voltage
SYMBOL
VDF
CONDITIONS
MIN.
VDF
TYP.
VDF
MAX.
VDF
x 1.02
VDF
x 0.08
2.3
UNITS CIRCUITS
VDF(T)=0.8V~1.5V*1
V
V
1
1
V
DF(T)=1.6V~6.0V*2
x 0.98
VDF
VDF
Hysteresis Range
VHYS
x 0.02 x 0.05
-
0.7
0.8
0.9
1.0
1.1
-
VIN = 1.5V
VIN = 2.0V
VIN = 3.0V
VIN = 4.0V
VIN = 5.0V
-
-
2.7
Supply Current
ISS
μA
2
3.0
-
3.2
-
3.6
VDF(T) = 0.8V to 1.5V
VDF(T) = 1.6V to 6.0V
0.7
0.7
6.0
Operating Voltage
VIN
V
1
-
10.0
-
VIN =0.7V 0.10
VIN =1.0V 0.85
0.80
N-ch, VDS = 0.5V
3
4
Output Current
(Low Voltage)
2.70
-7.5
2.2
-
CMOS, P-ch, VDS=2.1V VIN =6.0V
VIN =1.0V
-
-1.5
1.0
3.0
5. 0
6.0
7.0
-
-
-
-
-
VIN =2.0V
7.7
IOUT
mA
N-ch, VDS = 0.5V
3
VIN =3.0V
VIN =4.0V
10.1
11.5
13.0
Output Current
(Standard Voltage)
V
IN =5.0V
CMOS,
P-ch, VDS=2.1V
4
VIN =8.0V
-
-10.0
-2.0
CMOS
Output
Leakage
VIN=VDFx0.9, VOUT=0V
-
-10
-
(Pch)
ILEAK
nA
3
Current
N-ch Open
VIN=6.0V, VOUT=6.0V*1
VIN=10.0V, VOUT=10.0V*2
-
-
-
10
100
-
Drain
Temperature
ΔVDF/
ppm/
℃
-40℃ ≦ Topr ≦ 85℃
VDR→VOUT inversion
±100
0.03
1
5
Characteristics
(ΔTopr・VDF)
Delay Time
tDLY
0.2
ms
(VDR → VOUT inversion)
NOTE:
*1:Low Voltage (VDF(T)=0.8V~1.5V)
*2:Standard Voltage (VDF(T)=1.6V~6.0V)
VDF(T): Nominal detect voltage
Release Voltage: VDR = VDF + VHYS
3/16
XC61G Series
■OPERATIONAL EXPLANATION
●CMOS output
① When input voltage (VIN) is higher than detect voltage (VDF), output voltage (VOUT) will be equal to VIN.
(A condition of high impedance exists with N-ch open drain output configurations.)
② When input voltage (VIN) falls below detect voltage (VDF), output voltage (VOUT) will be equal to the ground voltage
(VSS) level.
③ When input voltage (VIN) falls to a level below that of the minimum operating voltage (VMIN), output will become
unstable. (As for the N-ch open drain product of XC61CN, the pull-up voltage goes out at the output voltage.)
④ When input voltage (VIN) rises above the ground voltage (VSS) level, output will be unstable at levels below the
minimum operating voltage (VMIN). Between the VMIN and detect release voltage (VDR) levels, the ground voltage (VSS)
level will be maintained.
⑤ When input voltage (VIN) rises above detect release voltage (VDR), output voltage (VOUT) will be equal to VIN.
(A condition of high impedance exists with N-ch open drain output configurations.)
⑥ The difference between VDR and VDF represents the hysteresis range.
●Timing Chart
4/16
XC61G
Series
■NOTES ON USE
1. Please use this IC within the stated absolute maximum ratings. For temporary, transitional voltage drop or voltage rising
phenomenon, the IC is liable to malfunction should the ratings be exceeded.
2. When a resistor is connected between the VIN pin and the power supply with CMOS output configurations, oscillation may
occur as a result of voltage drops at RIN if load current (IOUT) exists. (refer to the Oscillation Description (1) below)
3. When a resistor is connected between the VIN pin and the power supply with CMOS output configurations, irrespective of
N-ch open-drain output configurations, oscillation may occur as a result of through current at the time of voltage release even
If load current (IOUT) does not exist. (refer to the Oscillation Description (2) below )
4. Please use N-ch open drain output configuration, when a resistor RIN is connected between the VIN pin and power source.
In such cases, please ensure that RIN is less than 10kΩ and that C is more than 0.1μF, please test with the actual device.
(refer to the Oscillation Description (1) below)
5. With a resistor RIN connected between the VIN pin and the power supply, the VIN pin voltage will be getting lower than the
power supply voltage as a result of the IC's supply current flowing through the VIN pin.
6. In order to stabilize the IC's operations, please ensure that VIN pin input frequency's rise and fall times are more than 2 μ s/ V.
7. Torex places an importance on improving our products and its reliability.
However, by any possibility, we would request user fail-safe design and post-aging treatment on system or equipment.
Power supply
●Oscillation Description
(1) Load current oscillation with the CMOS output configuration
When the voltage applied at power supply, release operations commence and the detector's output voltage increases.
Load current (IOUT) will flow at RL. Because a voltage drop (RIN x IOUT) is produced at the RIN resistor, located between
the power supply and the VIN pin, the load current will flow via the IC's VIN pin. The voltage drop will also lead to a fall in
the voltage level at the VIN pin. When the VIN pin voltage level falls below the detect voltage level, detect operations will
commence. Following detect operations, load current flow will cease and since voltage drop at RIN will disappear, the
voltage level at the VIN pin will rise and release operations will begin over again.
Oscillation may occur with this "release - detect - release" repetition.
Further, this condition will also appear via means of a similar mechanism during detect operations.
(2) Oscillation as a result of through current
Since the XC61G series are CMOS IC S, through current will flow when the IC's internal circuit switching operates (during
release and detect operations). Consequently, oscillation is liable to occur as a result of drops in voltage at the through
current's resistor (RIN) during release voltage operations. (refer to Figure 3 )
Since hysteresis exists during detect operations, oscillation is unlikely to occur.
Power supply
Power supply
5/16
XC61G Series
■TEST CIRCUITS
6/16
XC61G
Series
■TYPICAL PERFORMANCE CHARACTERISTICS
●Low Voltage
Note: Unless otherwise stated, the N-ch open drain pull-up resistance value is 100kΩ.
7/16
XC61G Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
●Low Voltage (Continued)
8/16
XC61G
Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
●Standard Voltage
9/16
XC61G Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
●Standard Voltage (Continued)
Note: Unless otherwise stated, the N-ch open drain pull-up resistance value is 100kΩ.
XC61GC4502 (4.5V)
80
Ta=25℃
70
60
V
IN=4.0V
3.5V
3.0V
50
40
30
20
10
0
2.5V
2.0V
1.5V
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
DS (V)
V
10/16
XC61G
Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
●Standard Voltage (Continued)
11/16
XC61G Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
●Standard Voltage (Continued)
12/16
XC61G
Series
■PACKAGING INFORMATION
●USP-3
13/16
XC61G Series
■PACKAGING INFORMATION (Continued)
●USP-3
Reference metal mask design
Reference Pattern Layout Dimension
14/16
XC61G
Series
■MARKING RULE
●USP-3
USP-3
(TOP VIEW)
①
represents integer of output voltage and detect voltage
CMOS Output (XC61GC series)
N-ch Open Drain Output (XC61GN series)
MARK
VOLTAGE (V)
MARK
VOLTAGE (V)
A
B
C
D
E
F
0.X
1.X
2.X
3.X
4.X
5.X
6.X
K
L
0.X
1.X
2.X
3.X
4.X
5.X
6.X
M
N
P
R
S
H
② represents decimal number of detect voltage
Ex:
VOLTAGE (V)
MARK
PRODUCT SERIES
3
0
X.3
X.0
XC61G**3
XC61G**0
③ represents delay time
MARK
3
PRODUCT SERIES
XC61G***0
Delay Time
No
④
represents production lot number
0 to 9,A to Z reverse character 0 to 9, A to Z repeated
(G, I, J, O, Q, W excluded)
15/16
XC61G Series
1. The products and product specifications contained herein are subject to change without
notice to improve performance characteristics. Consult us, or our representatives
before use, to confirm that the information in this datasheet is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this datasheet.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this datasheet.
4. The products in this datasheet are not developed, designed, or approved for use with
such equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this datasheet within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this datasheet may be copied or reproduced without the
prior permission of TOREX SEMICONDUCTOR LTD.
16/16
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