XC9101CC1ASR [TOREX]
Switching Regulator/Controller;
| 型号： | XC9101CC1ASR |
| 厂家： | 
Torex Semiconductor |
| 描述： | Switching Regulator/Controller |
| 文件： | 总22页 (文件大小：726K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
XC9101Series
ETR0403_004
PWM Controlled Step-Up DC/DC Controller
■GENERAL DESCRIPTION
The XC9101 series are step-up multiple current and voltage feedback DC/DC controller ICs. Current sense, clock
frequencies and amp feedback gain can all be externally regulated.
A stable power supply is possible with output currents of up to 1.5A.
With output voltage fixed internally, VOUT is selectable in 0.1V increments within a 2.5V ~ 16.0V range (±2.5%).
For output voltages outside this range, we recommend the FB version, which has a 0.9V internal reference voltage. Using this
version, the required output voltage can be set using 2 external resistors.
Switching frequency can also be set externally within a range of 100 ~ 600 kHz and therefore a frequency suited to your
particular application can be selected.
With the current sense function, peak currents (which flow through the driver transistor and the coil) can be controlled.
Soft-start time can be adjusted using external resistor and capacitor.
During shutdown (CE pin=L), consumption current can be reduced to as little as 0.5μA (TYP.) or less.
■APPLICATIONS
●Mobile, Cordless phones
●Palm top computers, PDAs
●Portable games
■FEATURES
Stable Operations via Current & Voltage
Multiple Feedback
Unlimited Options for Peripheral Selection
Current Protection Circuit
Ceramic Capacitor Compatible
Input Voltage Range : 2.5V ~ 20V
Output Voltage Range : 2.5V ~ 16V
(Fixed Voltage Type)
●Cameras, Digital cameras
●Note book PCs11
: 30V + (Adjustable Type)
Oscillation Frequency Range
: 100 kHz ~ 600kHz
Output Current
Package
: Up to 1.5A
: MSOP-8A, SOP-8
■TYPICAL PERFORMANCE
CHARACTERISTICS
VOUT=5.0V, fOSC=180 kHz
■TYPICAL APPLICATION CIRCUIT
1/22
XC9101 Series
■PIN CONFIGURATION
MSOP-8A
(TOP VIEW)
SOP-8
(TOP VIEW)
■PIN ASSIGNMENT
PIN NUMBER
PIN NAME
FUNCTION
MSOP-8A
SOP-8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
EXT
Isen
Driver
Current Sense
Power Input
VIN
CE/SS
CLK
CE/Soft Start
Clock Input
CC/GAIN
VOUT/FB
VSS
Phase Compensation
Voltage Sense
Ground
■PRODUCT CLASSIFICATION
●Ordering Information
XC9101①②③④⑤⑥
DESIGNATOR
DESCRIPTION
SYMBOL
DESCRIPTION
C
D
VOUT (Fixed voltage type), Soft-start externally set-up
①
Type of DC/DC Controllers
FB (Voltage adjustable), Soft-start externally set-up
e.g. VOUT=2.5V→②=2, ③=5
FB products→②=0, ③=9 fixed
25 ~ H0
Voltages above 10V
→10=A, 11=B, 12=C, 13=D, 14=E, 15=F, 16=H
② ③
Output Voltage
e.g. VOUT=13.5V
→
②=D, ③=5
09
FB products→②=0, ③=9 fixed
④
Oscillation Frequency
A
Frequency adjustable
MSOP-8A
KR
SR
Packages
Taping Type (*1)
⑤⑥
SOP-8
(*1)
The device orientation is fixed in its embossed tape pocket. For reverse orientation, please contact your local Torex sales office or
representative. (Standard orientation: ⑤R, Reverse orientation: ⑤L)
The standard output voltages of the XC9101C series are 2.5V, 3.3V, and 5.0V.
Voltages other than those listed are semi-custom.
2/22
XC9101
Series
■BLOCK DIAGRAM
■ABSOLUTE MAXIMUM RATINGS
Ta = 25℃
PARAMETER
EXT Pin Voltage
Isen Pin Voltage
VIN Pin Voltage
SYMBOL
VEXT
VIsen
RATINGS
-0.3～VIN＋0.3
-0.3～＋22
-0.3～＋22
-0.3～＋22
-0.3～VIN＋0.3
-0.3～VIN＋0.3
-0.3～＋22
±100
UNITS
V
V
VIN
V
CE/SS Pin Voltage
CLK Pin Voltage
VCE
V
VCLK
VCC
V
CC/GAIN Pin Voltage
VOUT/FB Pin Voltage
EXT Pin Current
V
VOUT/FB
IEXT
V
mA
MSOP-8A
SOP-8
150
Power Dissipation
Pd
mW
300
Operating Temperature Range
Storage Temperature Range
Topr
Tstg
-40～＋85
-55～＋125
℃
℃
3/22
XC9101 Series
■ELECTRICAL CHARACTERISTICS
Ta=25℃
CIRCUITS
①
XC9101C33AKR
PARAMETER
Output Voltage
Maximum
SYMBOL
VOUT
CONDITIONS
IOUT=300mA
MIN.
TYP. MAX. UNITS
3.218 3.300 3.382
V
VINmax
VINmin
IDD1
20
－
－
－
－
－
－
2.5
255
V
①
①
②
Operating Voltage
Minimum
V
Operating Voltage
VIN=2.5V, VOUT=CE=
Supply Current 1
Supply Current 2
150
μA
Setting Output Voltage×0.95V
VIN=2.5V, CE=VIN
IDD2
ISTB
fOSC
90
0.5
330
176
2.0
μA
μA
kHz
②
②
③
VOUT=Setting Output Voltage×1.05V
VIN=2.5V, CE=VOUT=VSS
Stand-by Current
CLK
RT=10.0kΩ, CT=220pF
280
－
380
Oscillation Frequency
Frequency
Δ fOSC
ΔVIN･fOSC
Δ fOSC
VIN=2.5V ~ 20V
±5
±5
－
－
%
%
③
③
Line Regulation
Frequency
VIN=2.5V
－
Temperature Fluctuation
Topr=-40 ~ +85℃
ΔTopr･fOSC
Maximum Duty Cycle
Minimum Duty Cycle
Current Limit Voltage
ISEN Current
DMAX
DMIN
ILIM
VOUT=Set Voltage×0.95V
VOUT=Set Voltage×1.05V
VIN pin voltage－ISEN pin voltage
VIN=2.5V, ISEN=2.5V
79
－
85
－
150
7
89
0
%
④
④
⑥
⑥
⑤
⑤
%
90
220
13
mV
μA
μA
μA
IISEN
4.5
-0.1
-0.1
CE "High" Current
CE "Low" Current
ICEH
ICEL
CE=VIN=2.5V, VOUT=0V
CE=0V, VIN=2.5V, VOUT=0V
0
0.1
0.1
0
CLK Oscillation Starts,
CE "High" Voltage
CE "Low" Voltage
VCEH
VCEL
0.6
－
－
－
31
－
0.2
58
V
V
⑤
⑤
④
VOUT=0V, CE: Voltage applied
CLK Oscillation Stops,
VOUT=0V, CE: Voltage applied
EXT=VIN－0.4V, CE=VIN=2.5V
VOUT=Setting voltage×0.95V
EXT=0.4V, CE=VIN=2.5V
VOUT=Setting voltage×1.05
EXT "High" ON
Resistance
REXTH
－
Ω
EXT "Low" ON
Resistance
REXTL
EFFI
tSS
－
－
5
27
88
10
45
－
20
Ω
%
④
①
①
Efficiency (*1)
Connect CSS and RSS,
Soft-Start Time
ms
CE : 0V→2.5V
CC/GAIN Pin
RCCGAIN
－
400
－
kΩ
⑦
Output Impedance
Unless otherwise stated, VIN = 2.5V
NOTE:
*1: EFFI = {[(output voltage) × (output current)] ÷ [(input voltage) × (input current)]} × 100
*2: The capacity range of the capacitor used to set the external CLK frequency is 150 ~ 220pF
4/22
XC9101
Series
■ELECTRICAL CHARACTERISTICS (Continued)
XC9101C50AKR
Ta=25℃
CIRCUITS
①
PARAMETER
Output Voltage
Maximum
SYMBOL
VOUT
CONDITIONS
IOUT=300mA
MIN.
TYP. MAX. UNITS
4.875 5.000 5.125
V
VINMAX
VINMIN
IDD1
20
－
－
－
－
－
2.5
270
V
①
①
②
Operating Voltage
Minimum
V
Operating Voltage
VIN=3.0V, VOUT=CE=
Supply Current 1
Supply Current 2
160
μA
Setting Output Voltage×0.95V
VIN=3.0V, CE=VIN
IDD2
ISTB
fOSC
－
－
90
0.5
330
176
2.0
μA
μA
kHz
②
②
③
VOUT=Setting Output Voltage×1.05V
VIN=3.0V, CE=VOUT=VSS
Stand-by Current
CLK
RT=10.0kΩ, CT=220pF
VIN=2.5V～20V
280
380
Oscillation Frequency
Frequency
ΔfOSC
ΔVIN･fOSC
ΔfOSC
ΔTopr･fOSC
DMAX
－
－
±5
±5
－
－
%
%
③
③
Line Regulation
Frequency
VIN=2.5V
Temperature Fluctuation
Maximum Duty Cycle
Minimum Duty Cycle
Current Limit Voltage
ISEN Current
Topr=-40～+85℃
VOUT=Setting Voltage×0.95V
VOUT=Setting Voltage×1.05V
VIN pin voltage－ISEN pin voltage
VIN=3.0V, ISEN=3.0V
79
－
85
－
150
7
89
0
%
④
④
⑥
⑥
⑤
⑤
DMIN
%
ILIM
90
220
13
mV
μA
μA
μA
IISEN
4.5
-0.1
-0.1
CE "High" Current
CE "Low" Current
ICEH
CE=VIN=3.0V, VOUT=0V
CE=0V, VIN=3.0V, VOUT=0V
CLK Oscillation Starts,
0
0.1
0.1
ICEL
0
CE "High" Voltage
CE "Low" Voltage
VCEH
VCEL
0.6
－
－
－
27
－
0.2
51
V
V
⑤
⑤
④
VOUT=0V, CE: Voltage applied
CLK Oscillation Stops,
VOUT=0V, CE: Voltage applied
EXT=VIN－0.4V, CE=VIN=3.0V
VOUT=Setting voltage×0.95V
EXT=0.4V, CE=VIN=3.0V
VOUT=Setting voltage×1.05V
EXT "High"
ON Resistance
EXT "Low"
REXTH
－
Ω
REXTL
EFFI
tSS
－
－
－
25
87
5
37
－
－
Ω
%
④
①
①
ON Resistance
Efficiency *1
Connect CSS and RSS,
Soft-Start Time
ms
CE: 0V→3.0V
CC/GAIN Pin
RCCGAIN
－
400
－
kΩ
⑦
Output Impedance
NOTE: Unless otherwise stated, VIN = 3.0V.
*1: EFFI = {[(output voltage) × (output current)] ÷ [(input voltage) × (input current)]} × 100
*2: The capacity range of the capacitor used to set the external CLK frequency is 150 ~ 220pF
5/22
XC9101 Series
■ELECTRICAL CHARACTERISTICS (Continued)
XC9101D09AKR
Ta=25℃
CIRCUITS
①
UNITS
PARAMETER
Output Voltage
Maximum
SYMBOL
VOUT
CONDITIONS
IOUT=300mA
MIN.
TYP.
0.9
MAX.
0.8775
0.9225
V
VINMAX
20
－
－
V
①
Operating Voltage
Minimum
VINMIN
IDD1
IDD2
ISTB
－
－
－
150
90
2.5
255
176
2.0
V
①
②
②
②
③
Operating Voltage
Supply Current 1
VIN=2.5V, VIN=CE, FB=0.9×0.95V
VIN=2.5V, CE=VIN,
μA
μA
μA
kHz
Supply Current 2
－
VOUT=0.9×1.05V
Stand-by Current
CLK
VIN=2.5V, CE=FB=VSS
－
0.5
330
fOSC
RT=10.0kΩ, CT=220pF
VIN=2.5V～20V
280
380
Oscillation Frequency
Frequency
ΔfOSC
ΔVIN･fOSC
ΔfOSC
ΔTopr･fOSC
DMAX
－
±5
－
－
%
%
③
③
Line Regulation
Frequency
VIN=2.5V
－
±5
Temperature Fluctuation
Maximum Duty Cycle
Minimum Duty Cycle
Current Limiter Voltage
ISEN Current
Topr=-40～+85℃
VOUT=0.9×0.95V
79
85
89
0
%
④
④
⑥
⑥
⑤
⑤
DMIN
VOUT=0.9×1.05V
%
ILIM
VIN pin voltage－ISEN pin voltage
VIN=2.5V, ISEN=2.5V
CE=VIN=2.5V, FB=0V
CE=0V, VIN=2.5V, FB=0V
CLK Oscillation Start,
FB=0V, CE: Voltage applied
CLK Oscillation Stop,
FB=0V, CE: Voltage applied
EXT=VIN－0.4V, CE=VIN
VOUT=Setting voltage×0.95V
EXT=0.4V, CE=VIN
90
4.5
150
7
220
13
mV
μA
μA
μA
IISEN
CE "High" Current
CE "Low" Current
ICEH
-0.1
-0.1
0
0.1
0.1
ICEL
0
CE "High" Voltage
CE "Low" Voltage
VCEH
VCEL
0.6
－
－
－
31
－
0.2
58
V
V
⑤
⑤
④
EXT "High"
ON Resistance
EXT "Low"
REXTH
－
Ω
REXTL
EFFI
tSS
－
－
5
27
88
10
45
－
20
Ω
%
④
①
①
ON Resistance
Efficiency *1
VOUT=Setting voltage×1.05V
Connect CSS and RSS,
Soft-Start Time
ms
CE : 0V→2.5V
CC/GAIN Pin
RCCGAIN
－
400
－
kΩ
⑦
Output Impedance
NOTE: Unless otherwise stated, VIN = 2.5V
External Components: RFB1=200kΩ, RFB2=100kΩ, CFB=82pF
*1: EFFI = {[(output voltage) × (output current)] ÷ [(input voltage) × (input current)]} × 100
*2: The capacity range of the capacitor used to set the external CLK frequency is 150 ~ 220pF.
6/22
XC9101
Series
■TYPICAL APPLICATION CIRCUITS
XC9101C33AKR
NMOS
Coil
: XP161A1355PR
: 22μH (CR105 SUMIDA)
Resistor
Capacitors
: 20mΩ for ISEN (NPR1 KOA), 33kΩ(trimmer) for CLK, 100kΩ for SS
: 180pF (ceramic) for CLK, 470pF (ceramic) for CC/GAIN, 0.1μF (ceramic) for SS,1μF (ceramic) for Bypass
47μF (OS)+220μF (any) for CL, 220μF (any) for CIN
SD
: U3FWJ44N (TOSHIBA)
XC9101C50AKR
NMOS
Coil
: XP161A1355PR
: 22μH (CR105 SUMIDA)
Resistor
Capacitors
: 20mΩ for ISEN (NPR1 KOA), 33kΩ(trimmer) for CLK, 100kΩ for SS
: 180pF (ceramic) for CLK, 470pF (ceramic) for CC/GAIN, 0.1μF (ceramic) for SS,1μF (ceramic) for Bypass
47μF (OS)+220μF (any) for CL, 220μF(any) for CIN
: U3FWJ44N (TOSHIBA)
SD
7/22
XC9101 Series
■TYPICAL APPLICATION CIRCUITS (Continued)
XC9101D09AKR
NMOS
Coil
: XP161A11A1PR
: 22μH (CDRH127 SUMIDA)
Resistor
Capacitors
: 10mΩ for ISEN (NPR1 KOA), 33kΩ(trimmer) for CLK, 150kΩ for SS
: 180pF (ceramic) for CLK, 470pF (ceramic) for CC/GAIN, 0.1μF (ceramic) for SS, 1μF (ceramic) for Bypass
47μF (OS)+220μF (any) for CL, 220μF (any) for CIN
SD
: U5FWJ44N (TOSHIBA)
VOUT
RFB1
RFB2
CFB
: 16V
: 560kΩ
: 33kΩ
: 27pF
VOUT
RFB1
RFB2
CFB
: 20V
: 470kΩ
: 22kΩ
: 33pF
8/22
XC9101
Series
■OPERATIONAL EXPLANATION
Step-up DC/DC converter controllers of the XC9101 series carry out pulse width modulation (PWM) according to the
multiple feedback signals of the output voltage and coil current. The internal circuits consist of different blocks that
operate at VIN or the stabilized power (2.0 V) of the internal regulator. The fixed output voltage of the C type and the FB
pin voltage (Vref = 0.9 V) of type D controller have been adjusted and set by laser-trimming.
<Clock>
With regard to clock pulses, a capacitor and resistor connected to the CLK pin generate ramp waveforms whose top and
bottom are 0.7V and 0.15V, respectively. The frequency can be set within a range of 100kHz to 600kHz externally (refer to
the "Functional Settings" section for further information). The clock pulses are processed to generate a signal used for
synchronizing internal sequence circuits.
<Verr amplifier>
The Verr amplifier is designed to monitor the output voltage. A fraction of the voltage applied to internal resistors R1, R2 in
the case of a type C controller, and the voltage at the FB pin in the case of a type D controller, are fed back and compared
with the reference voltage. In response to feedback of a voltage lower than the reference voltage, the output voltage of
the Verr amplifier increases. The output of the Verr amplifier enters the mixer via resistor (RVerr). This signal works as a
pulse width control signal during PWM operations. By connecting an external capacitor and resistor through the CE/GAIN
pin, it is possible to set the gain and frequency characteristics of Verr amplifier signals (refer to the "Functional Settings"
section for further information).
<Ierr amplifier>
The Ierr amplifier monitors the coil current. The potential difference between the VIN and Isen pins is sampled at each
switching operation. Then the potential difference is amplified or held, as necessary, and input to the mixer. The Ierr
amplifier outputs a signal ensuring that the greater the potential difference between the VIN and ISEN pins, the smaller the
switching current. The gain and frequency characteristics of this amplifier are fixed internally.
<Mixer and PWM>
The mixer modulates the signal sent from Verr by the signal from Ierr. The modulated signal enters the PWM comparator
for comparison with the sawtooth pulses generated at the CLK pin. If the signal is greater than the sawtooth waveforms, a
signal is sent to the output circuit to turn on the external switch.
<Current Limiter>
The current flowing through the coil is monitored by the limiter comparator via the VIN and ISEN pins. The limiter
comparator outputs a signal when the potential difference between the VIN and ISEN pins reaches about 150 mV or more.
This signal is converted to a logic signal and handled as a DFF reset signal for the internal limiter circuit. When a reset
signal is input, a signal is output immediately at the EXT pin to turn off the MOS switch. When the limiter comparator
sends a signal to enable data acceptance, a signal to turn on the MOS switch is output at the next clock pulse. If at this
time the potential difference between the VIN and ISEN pins is large, operation is repeated to turn off the MOS switch again.
DFF operates in synchronization with the clock signal of the CLK pin.
Limiter signal
/RESET
PWM/PFM switching signal
CLK synchronous signal
D
Q
Output signal to EXT pin
CLK
PWM/PFM switching signal
<Soft Start>
The soft start function is made available by attaching a capacitor and resistor to the CE/SS pin. The Vref voltage applied to
the Verr amplifier is restricted by the start-up voltage of the CE/SS pin. This ensures that the Verr amplifier operates with its
two inputs in balance, thereby preventing the ON-TIME signal from becoming stronger than necessary. Consequently, soft
start time needs to be set sufficiently longer than the time set to CLK. The start-up time of the CE/SS pin equals the time set
for soft start (refer to the "Functional Settings" section for further information). The soft start function operates when the
voltage at the CE/SS pin is between 0V to 1.55V. If the voltage at the CE/SS pin doesn't start from 0V but from a mid level
voltage when the power is switched on, the soft start function become ineffective and large in-rush currents and ripple voltages
may happen to create.
9/22
XC9101 Series
■OPERATIONAL EXPLANATION (Continued)
●Functional Settings
1. Soft Start
CE and soft start (SS) functions are commonly assigned to the CE/SS pin. The soft start function is effective until the
voltage at the CE pin reaches approximately 1.55 V rising from 0 V. Soft start time is approximated by the equation below
according to values of Vcont, RSS, and CSS
.
T = - CSS × RSS × ln ((Vcont - 1.55) / Vcont)
Example: When CSS = 0.1 μF, RSS = 470 kΩ, and Vcont = 5 V,
T = -0.1 x 10-6 × 470 x 103 × ln ((5 - 1.55) / 5) = 17.44 ms.
CE/SS pin
Rss
Css
CE,
UVLO
Vref
circuit
To Verr amplifier
Vcont
Set the soft start time to a value sufficiently longer than the period of a clock pulse.
> Circuit example 1: N-ch open drain
Vcont
Rss
CE/SS pin
ON/OFF signal
Css
> Circuit example 2: CMOS logic (low supply current)
Vcont
Rss
ON/OFF signal
CE/SS pin
Css
> Circuit example 3: CMOS logic (low supply current), quick off
Vcont
Rss
ON/OFF signal
CE/SS pin
Css
10/22
XC9101
Series
■OPERATIONAL EXPLANATION (Continued)
●Functional Settings (Continued)
2. Oscillation Frequency
The oscillation frequency of the internal clock generator is approximated by the following equation according to the values
of the capacitor and resistor attached to the CLK pin. To stabilize the IC's operation, set the oscillation frequency within a
range of 100kHz to 600kHz. Select a value for Cclk within a range of 150pF to 220pF and fix the frequency based on the
value for Rclk.
f = 1/(-Cclk × Rclk × ln0.26)
Example: When Cclk = 220 pF and Rclk = 10 kΩ, f = 1 / (-220 x 10-12×10 x 103×ln(0.26)) = 337.43 kHz.
CLK pin
Rclk
Cclk
CLK Generator
3. Gain and Frequency Characteristics of the Verr Amplifier
The gain at output and frequency characteristics of the Verr amplifier are adjusted by the values of the capacitor and
resistor attached to the CC/GAIN pin. It is generally recommended to attach a CC of 220 to 1,000pF without RGAIN. The
greater the CC value, the more stable the phase and the slower the transient response. When using the IC with RGAIN
connected, it should be noted that if the RGAIN resistance value is too high, abnormal oscillation may occur during transient
response time. The size of RGAIN should be carefully evaluated before connection.
CC/GAIN pin
V
OUT/FB
Verr
Vref
RGAIN
RVerr
CC
4. Current Limit
The current limit value is approximated by the following equation according to resistor RSEN inserted between the VIN and
ISEN pins. Double function, current FB input and current limiting, is assigned to the ISEN pin. The current limiting value is
approximated by the following equation according to the value for RSEN.
ILpeak_limit = 0.15/RSEN
Example: When RSEN = 100 mΩ, ILpeak_limit = 0.15/0.1 = 1.5 A
Isen pin
Rsen
Limiter signal
Comparator with
150ｍV offset
V
IN pin
The inside error amplifier sends feedback signal when the voltage occurs at RSEN resistor because of the flow of coil
current in order to phase compensate. The more the RSEN value becomes larger, the more the error signal becomes
bigger, and it could lead to an intermittent oscillation. Please be careful if there is a problem with the application. Under
the regular operation, a voltage created by a peak coil current at the RSEN resistor should be set lower than the current limit
voltage 90 mV (MIN). For more details, please refer the notes on the external components.
11/22
XC9101 Series
■OPERATIONAL EXPLANATION (Continued)
●Functional Settings (Continued)
5. FB Voltage and CFB
With regard to the XC9101D series, the output voltage is set by attaching externally divided resistors. The output voltage
is determined by the equation shown below according to the values of RFB1 and RFB2. In general, the sum of RFB1 and
RFB2 should be 1 MΩ or less.
VOUT = 0.9 × (RFB1 + RFB2)/ RFB2
The value of CFB (phase compensation capacitor) is approximated by the following equation according to the values of
RFB1 and fzfb. The value of fzfb should be 10 kHz, as a general rule.
CFB = 1/(2 × π × RFB1 × fzfb)
Example: When RFB1 = 455 kΩ and RFB2 = 100 kΩ : VOUT = 0.9 × (455 k ＋ 100 k)/100 k = 4.995 V
: CFB = 1/(2 × π × 455 k × 10 k) = 34.98 pF
Output voltage
Cfb
Rfb1
Rfb2
FB pin
Verr
0.9V
Verr amplifier
■NOTES ON USE
●Application Notes
1. The XC9101 series are designed for use with an output ceramic capacitor. If, however, the potential difference
between input and output is too large, a ceramic capacitor may fail to absorb the resulting high switching energy and
oscillation could occur on the output side. If the input-output potential difference is large, connect an electrolytic
capacitor in parallel to compensate for insufficient capacitance.
2. The EXT pin of the XC9101 series is designed to minimize the through current that occurs in the internal circuitry.
However, the gate drive of external PMOS has a low impedance for the sake of speed. Therefore, if the input voltage is
high and the bypass capacitor is attached away from the IC, the charge/discharge current to the external PMOS may
lead to unstable operations due to switching operation of the EXT pin.
As a solution to this problem, place the bypass capacitor as close to the IC as possible, so that voltage variations at the
VIN and VSS pins caused by switching are minimized. If this is not effective, insert a resistor of several to several tens
of ohms between the EXT pin and PMOS gate. Remember that the insertion of a resistor slows down the switching
speed and may result in reduced efficiency.
3. A NPN transistor can be used in place of PMOS. If using a PNP transistor, insert a resistor (RB) and capacitor (CB)
between the EXT pin and the base of the NPN transistor in order to limit the base current without slowing the switching
speed. Adjust RB in a range of 500Ω to 1 kΩ according to the load and hFE of the transistor. Use a ceramic
capacitor for CB, complying with CB < 1/(2×π× RB ×FOSC× 0.7), as a rule.
V
IN
EXT pin
Rb
Cb
4. Although the C_CLK connection capacitance range is from 150 ~ 220pF, the most suitable value for maximum stability is
around 180pF.
12/22
XC9101
Series
■NOTES ON USE (Continued)
●Instruction on Pattern Layout
①
In order to stabilize VDD voltage level, we recommend that a by-pass capacitor (CDD) be connected as close as
possible to the VIN & VSS pins.
②
In order to stabilize the GND voltage level which can fluctuate as a result of switching, we suggest that C_CLK, R_CLK
and C_GAIN GND is separated from Power GND and connected as close as possible to the VSS pin (by-pass
capacitor, CDD). Please use a multi layer board and check the wiring carefully.
< XC9101D Series Pattern Layout Examples>
2 Layer Better Evaluation Board
L
SD
CDD
CFB
RFB1
N-MOS
VDD line
IC GND
1
2
3
4
8
7
6
CL
RSEN
VIN
Power GND
RFB2
R_SS
C_GAIN
CIN
5
R_CLK
C_SS
C_CLK
Through Hole
8
7
6
5
1
2
3
4
R_CLK,C_CLK,C_GAIN,RFB2
GND
Through Hole
13/22
XC9101 Series
■
●Instruction on Pattern Layout (Continued)
1 Layer Good Evaluation Board
L
SD
CDD
CFB
RFB1
N-MOS
VDD line
IC GND
1
2
3
4
8
7
6
CL
RSEN
VIN
Power GND
RFB2
R_SS
C_SS
C_GAIN
CIN
5
R_CLK
C_CLK
●Notes
1. Ensure that the absolute maximum ratings of the external components and the XC9101 DC/DC IC itself are not exceeded.
2. We recommend that sufficient counter measures are put in place to eliminate the heat that may be generated by the external
N-channel MOSFET as a result of switching losses.
3. Try to use a N-channel MOSFET with a small gate capacitance in order to avoid overly large output spike voltages that may
occur (such spikes occur in proportion to gate capacitance).
4. The performance of the XC9101 DC/DC converter is greatly influenced by not only its own characteristics, but also by those of
the external components it is used with. We recommend that you refer to the specifications of each component to be used and
take sufficient care when selecting components.
5. Wire external components as close to the IC as possible and use thick, short connecting wires to reduce wiring impedance.
In particular, minimize the distance between the by-pass capacitor and the IC.
6. Make sure that the GND wiring is as strong as possible as variations in ground potential caused by ground current at the time
of switching may result in unstable operation of the IC. Specifically, strengthen the ground wiring in the proximity of the VSS
pin.
14/22
XC9101
Series
■TEST CIRCUITS
・Circuit ①(FB Type)
・Circuit ①(VOUT Type)
SD
22μH
22μH
SD
NMOS
NMOS
CFB
RFB1
Vss 8
OUT
1 EXT
2 Isen
1 EXT
Vss 8
FB 7
V
7
2 Isen
3 VIN
100mΩ
100mΩ
GAIN 6
CLK 5
R_SS
RL
3 VIN
RFB2
V
RL
GAIN 6
V
R_SS
4 CE/SS
4 CE/SS CLK 5
0.1μF
220μF
20μF
220μF
0.1μF
470pF
10KΩ
20μF
470pF
10KΩ
1μF
220pF
220pF
1μF
XC9101C33A
ꢀR_SS：104kΩ C-SS：0.1μF
XC9101C50A R_SS：138kΩ C-SS：0.1μF
・Circuit ②
・Circuit ③
Vss 8
1 EXT
1 EXT
Vss 8
V
OUT/FB 7
2 Isen
V
OUT/FB 7
2 Isen
3 VIN
GAIN 6
3 VIN
GAIN 6
CLK 5
4 CE/SS
A
4 CE/SS CLK 5
10KΩ
OSC
220pF
0.1μF
10KΩ
220pF
0.1μF
・Circuit ④
・Circuit ⑤
1 EXT
Vss 8
1 EXT
Vss 8
V
OUT/FB 7
2 Isen
3 VIN
V
V
OUT/FB 7
2 Isen
3 VIN
OSC
GAIN 6
GAIN 6
0.1μF
4 CE/SS CLK 5
A
4 CE/SS CLK 5
10KΩ
V
10KΩ
0.1μF
220pF
220pF
・Circuit ⑦
・Circuit ⑥
1 EXT
Vss 8
1 EXT
Vss 8
OUT/FB 7
V
OUT/FB 7
V
2 Isen
3 VIN
2 Isen
3 VIN
GAIN 6
GAIN 6
A
V
4 CE/SS CLK 5
4 CE/SS CLK 5
10KΩ
1MΩ
V
0.1μF
0.1μF
220pF
15/22
XC9101 Series
■TYPICAL PERFORMANCE CHARACTERISTICS
XC9101D09AKR
(1) Output Voltage vs. Output Current
16/22
XC9101
Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
XC9101D09AKR
(2) Efficiency vs. Output Current
V
V
17/22
XC9101 Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
XC9101D09AKR
(3) Ripple Voltage vs. Output Current
Note : If the difference between the input and output voltage is large or small, switching ON/OFF time will be
shortened. As such, the external components used and their values (inductance value of the coil, resistor
connected to CLK, capacitor etc.) may have a critical influence on the actual operation of the IC.
18/22
XC9101
Series
■PACKAGING INFORMATION
●MSOP-8A
●SOP-8
19/22
XC9101 Series
■MARKING RULE
● MSOP-8A
①Represents product series
MARK
4
PRODUCT SERIES
XC9101xxxAKx
②Represents type of DC/DC controller
MARK
TYPE
PRODUCT SERIES
C
D
VOUT, CE PIN
FB, CE PIN
XC9101CxxAKx
XC9101D09AKx
③Represents integral number of output voltage, or FB type
MARK
VOLTAGE (V)
PRODUCT SERIES
XC9101C2xAKx
XC9101C3xAKx
XC9101C4xAKx
XC9101C5xAKx
XC9101C6xAKx
XC9101C7xAKx
XC9101C8xAKx
XC9101C9xAKx
XC9101D09AKx
XC9101CAxAKx
XC9101CBxAKx
XC9101CCxAKx
XC9101CDxAKx
XC9101CExAKx
XC9101CFxAKx
XC9101CHxAKx
2
3
2.x
3.x
MSOP-8A
4
4.x
(TOP VIEW)
5
5.x
6
6.x
7
7.x
8
8.x
9
9.x
0
FB products
10.x
11.x
12.x
13.x
14.x
15.x
16.x
A
B
C
D
E
F
H
④Represents decimal number of output voltage, FB products (ex.)
MARK
VOLTAGE (V)
x.0
PRODUCT SERIES
XC9101Cx0AKx
XC9101C3xAKx
XC9101D09AKx
0
3
9
x.3
FB products
⑤Represents control type of oscillation frequency
MARK
A
TYPE
PRODUCT SERIES
XC9101xxxAKx
Adjustable Frequency
⑥Represents production lot number
0 to 9, A to Z repeated (G, I, J, O, Q, W excepted).
Note: No character inversion used.
20/22
XC9101
Series
■MARKING RULE (Continued)
●SOP-8
①②Represents product series
MARK
PRODUCT SERIES
①
②
0
1
XC9101xxxASx
③Represents type of DC/DC controller
MARK
TYPE
PRODUCT SERIES
XC9101CxxAKx
XC9101D09AKx
C
D
VOUT, CE pin
FB, CE pin
SOP-8
④Represents integral number of output voltage, or FB type
(TOP VIEW)
VOLTAGE
PRODUCT
VOLTAGE
PRODUCT
MARK
MARK
(V)
SERIES
(V)
SERIES
2
3
4
5
6
7
8
9
0
2.x
XC9101C2xAKx
XC9101C3xAKx
XC9101C4xAKx
XC9101C5xAKx
XC9101C6xAKx
XC9101C7xAKx
XC9101C8xAKx
XC9101C9xAKx
XC9101C09AKx
A
B
C
D
E
F
10.x
11.x
12.x
13.x
14.x
15.x
16.x
XC9101CAxAKx
XC9101CBxAKx
XC9101CCxAKx
XC9101CDxAKx
XC9101CExAKx
XC9101CFxAKx
XC9101CHxAKx
3.x
4.x
5.x
6.x
7.x
8.x
H
9.x
FB products
⑤Represents decimal number of output voltage, FB type (ex.)
MARK
VOLTAGE (V)
x.0
PRODUCT SERIES
XC9101Cx0AKx
XC9101C3xAKx
XC9101D09AKx
0
3
9
x.3
FB products
⑥Represents control type of oscillation frequency
MARK
A
TYPE
PRODUCT SERIES
XC9101xxxAKx
Variable by external C and R
⑦Represents the last digit of production year
MARK
YEAR
2000
2006
0
6
⑧⑨Represents production lot number (ex.)
0 to 9, A to Z repeated (G, I, J, O, Q, W excluded).
Note: No character inversion used.
MARK
PRODUCTION LOT NUMBER
⑧
0
⑨
3
03
0
A
1A
21/22
XC9101 Series
1. The products and product specifications contained herein are subject to change without
notice to improve performance characteristics. Consult us, or our representatives
before use, to confirm that the information in this catalog is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this catalog.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this catalog.
4. The products in this catalog are not developed, designed, or approved for use with such
equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this catalog within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this catalog may be copied or reproduced without the
prior permission of Torex Semiconductor Ltd.
22/22
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