XC9515AD02ZR [TOREX]
2 channel Synchronous Step-Down DC/DC Converter with Manual Reset; 2通道同步降压型DC / DC转换器,带有手动复位型号: | XC9515AD02ZR |
厂家: | Torex Semiconductor |
描述: | 2 channel Synchronous Step-Down DC/DC Converter with Manual Reset |
文件: | 总21页 (文件大小:361K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
XC9515Series
ETR0706-008
2 channel Synchronous Step-Down DC/DC Converter with Manual Reset
■GENERAL DESCRIPTION
The XC9515 series consists of 2 channel synchronous step-down DC/DC converters and a voltage detector with delay circuit
built-in. The DC/DC converter block incorporates a P-channel 0.35Ω (TYP.) driver transistor and a synchronous N-channel
0.35Ω (TYP.) switching transistor. By minimizing ON resistance of the built-in transistors, the XC9515 series can deliver
highly efficient and a stable output current up to 800mA. With high switching frequencies of 1MHz, a choice of small inductor
is possible. The series has a built-in UVLO (under-voltage lock-out) function, therefore, the internal P-channel driver
transistor is forced OFF when input voltage becomes 1.8V or lower (for XC9515A, 2.7V or lower). The voltage detector block
can be set delay time freely by connecting an external capacitor. With the manual reset function, the series can output a
reset signal at any time.
■APPLICATIONS
●DVDs
■FEATURES
DC/DC Block
Input Voltage Range
Output Voltage
: 2.5V~5.5V
●Blu-ray Disk
: VOUT1=1.2V~4.0V
V
OUT2=1.2V~4.0V
●LCD TVs, LCD modules
●Multifunctional printers
●Photo printers
(Accuracy ±2%)
Oscillation Frequency
High Efficiency
Output Current
Control
: 1MHz (Accuracy ±15%)
: 95% (VIN=5V, VOUT=3.3V)
: 800mA
●Set top boxes
: PWM control
Protection Circuits
: Thermal Shutdown
: Integral Latch (Over Current Limit)
: Short Protection Circuit
Ceramic Capacitor Compatible
Voltage Detector (VD) Block
Detect Voltage Range
Delay Time
: 2.0~5.5V(Accuracy ±2%)
: 173 ms
(When Cd=0.1μF is connected)
: N-channel open drain
: QFN-20
Output Configuration
Package
■TYPICAL PERFORMANCE
■TYPICAL APPLICATION CIRCUIT
CHARACTERISTICS
● Efficiency vs. Output Current
L1
VOUT1
VIN=5V,FOSC=1MHz
L=4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
EN1
VIN
EN2
100
90
80
70
60
50
40
30
20
10
0
VOUT=3.3V
CIN1
CL1
VOUT
1
NC
MR
PVSS
1
VOUT=1.5V
MR
AVSS
Cd
NC
PVSS
2
VOUT
2
NC
Cd
VOUT=1.8V
RUP
CIN2
CL2
VDOUT
1
10
100
1000
Output Current : IOUT [mA]
L2
VOUT2
1/21
XC9515 Series
■PIN CONFIGURATION
Vout1 15
1
2
3
4
5
NC
MR 14
AVSS 13
CD 12
PVSS1
NC
※1
PVSS2
NC
QFN-20
(BOTTOM VIEW)
Vout2 11
■PIN ASSIGNMENT
QFN-20
PIN
PIN
PIN NAME
NUMBER
FUNCTION
PIN NAME
FUNCTION
NUMBER
1
2
NC
P_VSS1
NC
No Connection
Power Ground 1
No Connection
11
12
13
14
15
16
17
18
19
20
VOUT2
Cd
Output Voltage Sense 2
Delay Capacitor Connection
Analog Ground
3
A_VSS
MR
4
P_VSS2
NC
Power Ground 2
No Connection
Manual Reset
5
VOUT1
EN2
EN1
LX1
Output Voltage Sense1
CH2 ON/OFF Control
CH1 ON/OFF Control
Switching Output 1
No Connection
6
P_VDD2
NC
Power Supply 2
No Connection
7
8
LX2
Switching Output 2
No Connection
9
NC
NC
10
VDOUT
Voltage Detector output
P_VDD1
Power Supply 1
*1 Back metal pad voltage :VSS level
(The back metal pad should be soldered to enhance mounting strength and heat release. If the pad needs to be connected to
other circuit, care should be taken for the pad voltage level.)
2/21
XC9515
Series
■FUNCTION CHART
●EN1, EN2 and MR pins are internally pulled up. *2)
PIN
LEVEL
High , Open
Low
OPERATIONAL STATUS
DC/DC_CH1 Operation
EN1
DC/DC_CH1 Stop
High , Open
Low
DC/DC_CH2 Operation
EN2
MR
DC/DC_CH2 Stop
High , Open
Low
VD_OUT Detect RESET Signal Output
VD_OUT Force RESET Signal Output
EN1, EN2 and MR pins are internally pulled up so that the levels of High and Open are same function.
●EN1, EN2 and MR pins are left open internally. *2)
PIN
LEVEL
High
Low
OPERATIONAL STATUS
DC/DC_CH1 Operation
EN1
DC/DC_CH1 Stop
High
Low
DC/DC_CH2 Operation
EN2
MR
DC/DC_CH2 Stop
High
Low
VD_OUT Detect RESET Signal Output
VD_OUT Force RESET Signal Output
EN1, EN2 and MR pins are floated inside so that these pins shall not be left open outside.
2) Please refer to the PRODUCTION CLASSIFICATION to see the combination of pull-up status regarding the EN1, EN2, and MR
*
pins.
■PRODUCT CLASSIFICATION
●Ordering Information (Standard products)
XC9515①②③④⑤⑥
DESIGNATOR
DESCRIPTION
SYMBOL
DESCRIPTION
A
B
A
:Input Voltage Range 5V±10%, UVLO Voltage 2.7V (TYP.)
:Input Voltage Range 2.5V~5.5V, UVLO Voltage 1.8V (TYP.)
①
Input Voltage & UVLO
:EN1, EN2, MR pins are not pulled up internally
:EN1, EN2 pins have built-in pull-up resistors,
MR pin has a built-in pull-up resistor
:EN1, EN2 Pins are not pulled up internally,
MR pin has a built-in pull-up resistor
B
C
②
EN & MR logic control conditions
:EN1, EN2 pins have built-in pull-up resistors,
MR pin are not pulled up internally
D
③④
⑤
Set Voltage Combinations
Package
01~
:Based on Torex Standard Product Number
Z
R
L
:QFN-20
:Embossed tape, Standard feed
:Embossed tape, Reverse feed
⑥
Device Orientation
3/21
XC9515 Series
■BLOCK DIAGRAM
PVDD
PVDD
VOUT1
VOUT1
Current
Limit
Current
Limit
ErrorꢀAmp
ErrorꢀAmp
Current
Current
Feedback
Feedback
PVDD1
LX1
LX1
PWM
Comparator
PWM
Comparator
Buffer
Drive
Buffer
Drive
Logic
Logic
Soft
Start
Soft
Start
EN1
EN2
EN1
Ramp
Wave
Ramp
Wave
ON/
OFF
ON/
OFF
Control
PVSS1
PVSS1
Control
EN2
Thermal
Thermal
Shutdown
Shutdown
Vref
OSC
Vref
OSC
PVDD2
PVDD2
VOUT2
VOUT2
Current
Limit
Current
Limit
Ramp
Wave
Ramp
Wave
Soft
Start
Soft
Start
Current
Current
Feedback
Feedback
LX2
LX2
ErrorꢀAmp
ErrorꢀAmp
PWM
Comparator
PWM
Comparator
Buffer
Drive
Buffer
Drive
Logic
Logic
PVDD1
PVDD1
PVSS2
PVSS2
MR
MR
VDOUT
VDOUT
Rdelay
Rdelay
Vref
Vref
AVSS
Cd
AVSS
Cd
■ABSOLUTE MAXIMUM RATINGS
Ta=25℃
PARAMETER
SYMBOL
RATINGS
UNITS
P_VDD1・P_VDD2 Pin Voltage
P_VDD1, P_VDD2
VOUT1, VOUT2
VCd
-0.3~6.5
-0.3~6.5
V
V
V
OUT1・VOUT2 Pin Voltage
Cd Pin Voltage
-0.3~P_VDD1 2 + 0.3
V
・
VDOUT Pin Voltage
VDOUT Pin Current
VDOUT
-0.3~6.5
10
V
IDOUT
mA
V
EN1・EN2・MR Pin Voltage
LX1・LX2 Pin Voltage
LX1・LX2 Pin Current
VEN1, VEN2, VMR
VLx1, VLx2
ILx1, ILx2
-0.3~6.5
-0.3~P_VDD1 2+0.3
V
・
1500
300
mA
Pd (Free air)
Pd (Wiring on PCB)
Topr
Power Dissipation
QFN-20
mW
1000
Operating Temperature Range
Storage Temperature Range
-40 ~ +85
-55 ~ +125
oC
oC
Tstg
* P_VDD1
stands for P_VDD1=P_VDD2
2
・
A_VSS=P_VSS1=P_VSS2=0V
4/21
XC9515
Series
■ELECTRICAL CHARACTERISTICS
XC9515AB04xx
● DC/DC CH1, CH2 (VOUT1=1.5V, VOUT2=3.3V, fOSC =1MHz, EN1・2 Pull-up inside)
Ta =25 oC
PARAMETER
Input Voltage
SYMBOL
VIN
CONDITIONS
MIN. TYP. MAX. UNITS CIRCUIT
4.5
5.0
5.5
V
V
-
Connected to the external components,
Output Voltage 1
Output Voltage 2
VOUT1
VOUT2
1.470 1.500 1.530
3.234 3.300 3.366
①
P_VDD1 2=VEN1=VEN2=0V, IOUT1=30mA
・
Connected to the external components,
V
①
①
②
P_VDD1 2=VEN2=VEN1=0V, IOUT2=30mA
・
IOUTMAX1
IOUTMAX2
I LIM1 ・
I LIM 2
Maximum Output Current 1
・
2 (*1)
800
-
-
-
-
mA
mA
Current Limit 1・2
1000
Oscillation Frequency
Maximum Duty Cycle
Minimum Duty Cycle
fOSC
Connected to the external components, IOUT=10mA
0.85 1.00
1.15 MHz
①
②
②
MAXDTY VOUT1=VOUT2=0V
MINDTY VOUT1=VOUT2=VIN
100
-
-
-
%
%
-
0
Connected to the external components,
Efficiency 1 (*2)
Efficiency 2 (*2)
EFFI1
EFFI2
P_VDD1 2=VEN1=5.0V, VEN2=0V,
-
-
89
94
-
-
%
%
①
①
・
VOUT1=1.5V, IOUT1=200mA
Connected to the external components,
P_VDD1 2=VEN2=5.0V, VEN1=0V,
・
VOUT2=3.3V, IOUT2=200mA
LX1
・
2 "H" ON Resistance
2 "L" ON Resistance
R
LX1H
・
R
R
LX2H VOUT1=VOUT2=0V, ILx1=ILx2=100mA (*3)
-
-
0.35(*4)
0.35(*4)
-
-
Ω
Ω
③
-
LX1
・
R
LX1L
・
LX2L
LX1 and LX2 are pulled down by a resistor of 200Ω
Integral Latch Time 1・2
Soft-Start Time 1・2
t
LAT1・ tLAT2 VOUT1=Setting Voltage×0.9,
OUT2= Setting Voltage ×0.9(*5)
Time until EN1, EN2 or both pins changes from 0V to
-
6
-
ms
⑦
V
t
SS1・ tSS2
-
1.2
1.3
-
-
5
ms
V
①
④
④
V
IN and voltage becomes VOUT1 2×0.95, IOUT1 2=10mA
・ ・
VEN1H・
VEN2H
VEN1L・
VEN2L
V
OUT1=VOUT2=0V
EN1・2 "H" Level Voltage
Voltage which LX1 or LX2 becomes ”H”(*6)
OUT1=VOUT2=0V
Voltage which LX1 or LX2 becomes ”L”(*6)
V
EN1
・
2 "L" Level Voltage
AVSS
-
0.4
V
EN1
・
2 "H" Level Current
IEN1H・IEN2H P_VDD1 2=VEN1=VEN2=5.5V
-
-
0.1(*8) μA
μA
④
④
・
EN1
・
2 "L" Level Current
IEN1L・IEN2L P_VDD1 2=5.5V, VEN1=VEN2=0V
-6(*8)
-
・
ILEAK1H・
LX1
・
2 "H" Leakage Current (*7)
P_VDD1 2=VLX1=VLX2=5.5V, VEN1=VEN2=0V
-
-
1.0(*9) μA
④
④
・
ILEAK2H
ILEAK1L・
ILEAK2L
LX1
・
2 "L" Leakage Current
P_VDD1 2=5.5V, VLX1=VLX2=VEN1=VEN2=0V
-3.0(*9)
-
-
μA
・
Test Conditions:
* P_VDD1 stands for P_VDD1=P_VDD2
2
・
**Unless otherwise stated, P_VDD1 2=5V, VEN1=VEN2= P_VDD1
2
・
・
*** A_VSS=P_VSS1=P_VSS2=0V
NOTE :
*1:When the difference between the input and the output is small, some cycles may be skipped completely before current maximizes.
If current is further pulled from this state, output voltage will decrease because of P-ch driver ON resistance.
*2:EFFI = { ( output voltage x output current ) / ( input voltage x input current) } x 100
*3:On resistance (Ω)= (VIN - Lx pin measurement voltage) / 100mA
*4:Designed value.
*5:Time until it short-circuits LX1 (LX2 in the side of 2CH) with GND via 1Ωof resistor from an operational state and is set to Lx=0V from
current limit pulse generating.
*6:”H” is judged as “H”>VIN-0.1V, ”L” is judged as ”L”<0.1V.
*7:When temperature is high, a current of approximately 20μA (maximum) may leak.
*8:Current which EN1 and EN2 are measured separately.
*9:Lead current which LX1 and LX2 are measured separately.
5/21
XC9515 Series
■ELECTRICAL CHARACTERISTICS (Continued)
XC9515AB04xx
●Voltage Detector (VD) (MR pin Pull-up Inside) Block
Ta=25oC
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX. UNITS CIRCUIT
VDF(T)
×0.98
-
VDF(T)
(*1)
(*2)
Detect Voltage
VDF(E)
VDF(T)
V
⑤
×1.02
-
Hysteresis Width
VD Output Current
VHYS
IDOUT
RDLY
VMRH
VMRL
IMRH
VHYS=(VDR(E) (*3) - VDF(E) ) / VDF(E) ×100
5.0
6.6
2.5
-
%
mA
MΩ
V
-
④
-
④
④
④
④
P_VDD1 2=VDF-0.01V, Apply 0.5V to VDOUT
5.0
-
8.0
-
・
Delay Resistance
MR "H" Level Voltage
MR "L" Level Voltage
MR "H" Level Current
MR "L" Level Current
VDOUT=”H” Level Voltage (*3)
VDOUT=”L” Level Voltage (*3)
1.2
AVSS
-
5.5
0.4
0.1
-
-
V
P_VDD1 2=VMR=5.5V
-
μA
μA
・
IMRL
P_VDD1 2=5.5V, VMR=0V
-
-6.0
・
Test Conditions:
* P_VDD1
stands for P_VDD1=P_VDD2
2
・
**Unless otherwise stated, P_VDD1 2=5V, VEN1=VEN2= P_VDD1
2
・
・
*** A_VSS=P_VSS1=P_VSS2=0V
NOTE :
*1:VDF(E)=Detect Voltage
*2:VDR(E)=Release Voltage
*3:”H” is judged as “H”>VIN-0.1V, ”L” is judged as “L”<0.1V
XC9515AB04xx
●Whole Circuit (VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz, EN1・2 Pull-up Inside)
Ta=25oC
PARAMETER
SYMBOL
CONDITIONS
MIN. TYP. MAX. UNITS CIRCUIT
Supply Current 1
Supply Current 2
Stand-by Current
UVLO Detect Voltage
UVLO Release Voltage
Thermal Shutdown
Temperature
IDD1
IDD2
VOUT1=VOUT2=Setting Voltage x 0.9
-
-
950 1500 μA
⑥
⑥
⑥
②
②
V
OUT1=VOUT2=Setting Voltage x 1.1 (Oscillation stops)
75
18
1.8
-
145
33
μA
μA
V
ISTB
VEN1=VEN2=0V
-
VUVLOF
VUVLOR
VIN voltage which VOUT1=0V and LX pin becomes ”L” (*1)
VIN voltage which VOUT1=0V and LX pin becomes ”H” (*1)
2.4
-
3.0
3.5
V
TTSD
THYS
-
-
150
20
-
-
oC
oC
-
-
Thermal Shutdown
Hysteresis Width
Test Conditions:
* P_VDD1 2 stands for P_VDD1=P_VDD2
・
**Unless otherwise stated, P_VDD1 2=5V, VEN1=VEN2= P_VDD1
2
・
・
*** A_VSS=P_VSS1=P_VSS2=0V
NOTE :
*1:”H” is judged “H”>VIN-0.1V, ”L” is judged “L”<0.1V
6/21
XC9515
Series
■ELECTRICAL CHARACTERISTICS (Continued)
XC9515BA06xx
Ta=25 oC
●DC/DC CH1, CH2 (VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz, EN1 and EN2 pins are internally floating)
PARAMETER
Input Voltage
SYMBOL
VIN
CONDITIONS
MIN. TYP. MAX. UNITS CIRCUIT
2.5
5.5
V
Connected to the external components,
Output Voltage1
Output Voltage2
VOUT1
VOUT2
1.470 1.500 1.530
3.234 3.300 3.366
V
①
PVDD1 2=EN1, EN2=0V
・
IOUT1=30mA
Connected to the external components,
V
①
①
PVDD1 2=EN2, EN1=0V
・
IOUT2=30mA
IOUTMAX1
IOUTMAX2
Maximum Output Current 1
・
2 (*1)
800
mA
mA
Current Limit 1・2
ILIM1 ・ILIM 2
1000
②
①
②
②
Oscillation Frequency
Maximum Duty Cycle
Minimum Duty Cycle
fOSC
Connected to the external components, IOUT=10mA
0.85 1.00 1.15 MHz
MAXDTY VOUT1=VOUT2=0V
100
%
%
MINDTY
VOUT1=VOUT2=VIN
0
Connected to the external components,
Efficiency 1 (*2)
Efficiency 2 (*2)
EFFI1
89
94
%
%
①
①
PVDD1 2=EN1=5.0V, EN2=0V
・
VOUT1=1.5V, IOUT1=200mA
Connected to the external components,
EFFI2
PVDD1 2=EN2=5.0V, EN1=0V
・
VOUT2=3.3V, IOUT2=200mA
RLX1H・RLX2H VOUT1=VOUT2=0V, ILx1=ILx2=100mA(*3)
LX1
・
2 "H" ON Resistance
2 "L" ON Resistance
0.35(*4)
0.35(*4)
Ω
Ω
③
LX1
・
RLX1L・RLX2L
-
LX1 and LX2 are pulled down by a resistor of 200Ω
VOUT1= Setting Voltage 0.9, VOUT2= Setting Voltage
0.9 (*5)
Integral Latch Time 1・2
Soft-Start Time 1・2
EN1・2 "H" Voltage
EN1・2 "L" Voltage
tLAT1・tLAT2
tSS1・tSS2
6
ms
ms
V
⑦
①
④
④
×
×
Time until EN1, EN2 or both pins changes from 0V to VIN
1.3
and voltage becomes VOUT1 2×0.95, IOUT1 2=10mA
・
・
V
OUT1=VOUT2=0V
Voltage which LX1 or LX2 becomes ”H” (*6)
OUT1=VOUT2=0V
Voltage which LX1 or LX2 becomes ”L” (*6)
VEN1H・VEN2H
VEN1L・VEN2L
1.2
5
V
AVSS
0.4
V
EN1・2 "H" Current
EN1・2 "L" Current
LX1・2 "H" Leak Current (*7)
I
EN1H・IEN2H PVDD1 2=EN1=EN2=5.5V
0.1(*8) μA
μA
1.0(*9) μA
④
④
④
④
・
I
EN1L・IEN2L PVDD1 2=5.5V, EN1=EN2=0V
-0.1(*8)
-3.0(*9)
・
I
leak1H・Ileak2H PVDD1 2=LX1=LX2=5.5V, EN1=EN2=0V
・
LX1・2 "L" Leak Current
I
leak1L・Ileak2L PVDD1 2=5.5V, LX1=LX2=EN1=EN2=0V
・
μA
Test Conditions:
* P_VDD1
stands for P_VDD1=P_VDD2
2
・
**Unless otherwise stated, P_VDD1 2=5V, VEN1=VEN2= P_VDD1
2
・
・
*** A_VSS=P_VSS1=P_VSS2=0V
NOTE :
*1:When the difference between the input and the output is small, some cycles may be skipped completely before current maximizes.
If current is further pulled from this state, output voltage will decrease because of P-ch driver ON resistance.
*2:EFFI = { ( output voltage x output current ) / ( input voltage x input current) } x 100
*3:On resistance (Ω)= (VIN - Lx pin measurement voltage) / 100mA
*4:Designed value.
*5:Time until it short-circuits LX1 (LX2 in the side of 2CH) with GND via 1Ωof resistor from an operational state and is set to Lx=0V
from current limit pulse generating.
*6:”H” is judged as “H”>VIN-0.1V, ”L” is judged as ”L”<0.1V.
*7:When temperature is high, a current of approximately 20μA (maximum) may leak.
*8:Current which EN1 and EN2 are measured separately.
*9:Lead current which LX1 and LX2 are measured separately.
7/21
XC9515 Series
■ELECTRICAL CHARACTERISTICS (Continued)
XC9515BA06xx
Ta=25 oC
●VD (MR pin is internally floating)
PARAMETER
SYMBOL
CONDITIONS
MIN. TYP. MAX. UNITS CIRCUIT
(*1)
Detect Voltage
Hysteresis Width
VDF(E)
2.94 3.00 3.06
5.0
V
%
⑤
-
VHYS
IDOUT
RDLY
VMR
VMR
IMR
VHYS={VDR(E) (*2)-VDF(E) }/ VDF(E)×100
VD Output Current
Delay Resistance
P_VDD1 2=VDF-0.01V, Apply 0.5V to VDOUT
5.0
6.6
2.5
8.0
mA
MΩ
V
④
-
・
MR "H" Level Voltage
MR "L" Level Voltage
MR "H" Level Current
MR "L" Level Current
VDOUT=”H” Level Voltage (*3)
VDOUT=”L” Level Voltage (*3)
1.2
5.5
0.4
0.1
④
④
④
④
AVSS
V
PVDD1 2=MR=5.5V
μA
μA
・
)
IMR
PVDD1 2=5.5V,MR=0V
-0.1(*8
・
Test Conditions:
* P_VDD1
stands for P_VDD1=P_VDD2
2
・
**Unless otherwise stated, P_VDD1 2=5V, VEN1=VEN2= P_VDD1
2
・
・
*** A_VSS=P_VSS1=P_VSS2=0V
NOTE :
*1:VDF(E)=Detect Voltage
*2:VDR(E)=Release Voltage
*3:”H” is judged as “H”>VIN-0.1V, ”L” is judged as “L”<0.1V
XC9515BA01xx
Ta=25 oC
●Whole Circuit (VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz, EN1 and EN2 pins are internally floating)
PARAMETER
SYMBOL
CONDITIONS
MIN. TYP. MAX. UNITS CIRCUIT
Supply Current 1
Supply Current 2
Stand-by Current
UVLO Detect Voltage
UVLO Release Voltage
Thermal Shutdown
Temperature
IDD1
IDD2
V
V
OUT1=VOUT2= Setting Voltage×0.9
950 1500 μA
⑥
⑥
⑥
②
②
OUT1=VOUT2= Setting Voltage×1.1 (Oscillation stops)
75
5.5
1.8
145
11
μA
μA
V
ISTB
EN1=EN2=0V
VUVLOF
VUVLOR
VIN voltage which VOUT1=0V and LX pin becomes ”L” (*1)
VIN voltage which VOUT1=0V and LX pin becomes ”H” (*1)
1.5
2.1
2.3
V
TTSD
THYS
150
20
oC
oC
-
-
Thermal Shutdown
Hysteresis Width
Test Conditions:
* P_VDD1 2 stands for P_VDD1=P_VDD2
・
**Unless otherwise stated, P_VDD1 2=5V, VEN1=VEN2= P_VDD1
2
・
・
*** A_VSS=P_VSS1=P_VSS2=0V
NOTE :
*1:”H” is judged “H”>VIN-0.1V, ”L” is judged “L”<0.1V
8/21
XC9515
Series
■TYPICAL APPRICATION CIRCUIT
L1
VOUT1
EN1
VIN
EN2
CIN1
CL1
VOUT
1
NC
MR
PVSS
1
MR
AVSS
Cd
NC
PVSS
2
VOUT
2
NC
Cd
RUP
CIN2
CL2
VDOUT
L2
VOUT2
<Example of the External Components>
L1
L2
:4.7μH(CDRH4D28C, SUMIDA)
:4.7μH(CDRH4D28C, SUMIDA)
CIN1 :10μF(ceramic)
CIN2 :10μF(ceramic)
CL1 :10μF(ceramic)
CL2 :10μF(ceramic)
RUP :100kΩ
9/21
XC9515 Series
■OPERATIONAL EXPLANATION
XC9515 series consists of a reference voltage source, ramp wave circuit, error amplifier, PWM comparator, phase
compensation circuit, output voltage adjustment resistors, P-channel driver transistor, N-channel synchronous switching
transistor, current limit circuit, UVLO circuit and others. The series ICs compare, using the error amplifier, the voltage of the
internal voltage reference source with the feedback voltage from VOUT pin through split resistors, RFB1 and RFB2. Phase
compensation is performed on the resulting error amplifier output, to input a signal to the PWM comparator to determine the
turn-on time during PWM operation. The PWM comparator compares, in terms of voltage level, the signal from the error
amplifier with the ramp wave from the ramp wave circuit, and delivers the resulting output to the buffer driver circuit to cause
the Lx pin to output a switching duty cycle. This process is continuously performed to ensure stable output voltage. The
current feedback circuit monitors the P-channel driver transistor current for each switching operation, and modulates the error
amplifier output signal to provide multiple feedback signals. This enables a stable feedback loop even when a low ESR
capacitor, such as a ceramic capacitor, is used, ensuring stable output voltage.
<Reference Voltage Source>
The reference voltage source provides the reference voltage to ensure stable output voltage of the DC/DC converter.
<Ramp Wave Circuit>
The ramp wave circuit determines switching frequency. The frequency is fixed internally at 1MHz. Clock pulses generated
in this circuit are used to produce ramp waveforms needed for PWM operation, and to synchronize all the internal circuits.
<Error Amplifier>
The error amplifier is designed to monitor output voltage. The amplifier compares the reference voltage with the feedback
voltage divided by the internal split resistor, RFB1 and RFB2
. When a voltage lower than the reference is fed back, the output
voltage of the error amplifier increases. The gain and frequency characteristics of the error amplifier output are fixed
internally to deliver an optimized signal to the mixer.
<Current Limit>
The current limiter circuit of the XC9515 series monitors the current flowing through the P-channel MOS driver transistor
connected to the Lx pin, and features a combination of the current limit mode and the latch mode.
①When the driver current is greater than a specific level (peak value of coil current), the current limit function operates to off
the pulses from the Lx pin at any giving timing.
②When the driver transistor is turned off, the limiter circuit is then released from the current limit detection state.
③At the next pulse, the driver transistor is turned on. However, the transistor is immediately turned off in the case of an
over current state.
④When the over current is eliminated, the IC resumes its normal operation.
The IC waits for the over current state to end by repeating the steps ①to ③. If an over current state continues for a few
ms and the above three steps are repeatedly performed, the IC performs the function of latching the OFF state of the
driver transistor. Both two DC/DC blocks stop operations when either CH1 or CH2 of protection circuit is activated. At
this time, both Lx1 and Lx2 become high impedance. Once the IC is in latch mode, operations can be resumed by either
turning the IC off after letting EN1 and EN2 pins down to low level, or by restoring power. For restoring power, the IC
should be turned off after P_VDD1 and P_VDD2 voltages drop below the low level of EN1 and EN2 pin.)The latch operation
can be released from the current limit detection state because of the circuit’s noise. Also, depending on the state of the
PC Board, latch time may become longer and latch operation may not work. In order to avoid the effect of noise, the
board should be laid out so that capacitors are placed as close to the chip as possible.
Limit < # ms
Limit < # ms
10/21
XC9515
Series
■OPERATIONAL EXPLANATION (Continued)
<Thermal Shutdown>
For protecting the IC from heat damage, the thermal shutdown circuit monitors the chip temperature. When the chip
temperature reaches 150℃, the thermal shutdown circuit operates and the driver transistor will be set to OFF. As the chip
temperature drops to 130℃ by stopping current flow, the soft-start function operates to turn the output on.
<Short-Circuit Protection>
The short-circuit protection circuit monitors the FB voltage. If the output is shorted incorrectly with the ground, the
short-circuit protection circuit operates and turns the driver transistor off to latch when the FB voltage becomes less than half
of the setting voltage. Both two DC/DC blocks stop operations when either CH1 or CH2 of protection circuit is activated. At
this time, both Lx1 and Lx2 become high impedance. Once the IC is in latch mode, operations can be resumed by either
turning the IC off after letting both ends of EN1 and EN2 pins down to low level, or by restoring power. (The P_VDD1 and
P_VDD2 voltages should be less than the low level of the EN1 and EN2 pins when restoring power.)
<Soft Start Function>
The soft-start circuit protects against inrush current, when the power is switched on, and also to protect against voltage
overshoot. It should be noted, however, that this circuit does not protect the load capacitor (CL) from inrush current. With
the Vref voltage limited and depending upon the input to the error amps, the operation maintains a balance between the two
inputs of the error amps and controls the EXT1 pin's ON time so that it doesn't increase more than is necessary.
<UVLO Circuit>
When the VIN pin voltage becomes1.8V (TYP.) or lower (for XC9515A, 2.7V or lower), the P-channel output driver transistor is
forced OFF to prevent false pulse output caused by unstable operation of the internal circuitry. When the VIN pin voltage
becomes 1.9V (TYP.) or higher (for XC9515A, 3.0V or lower), switching operation takes place. By releasing the UVLO
function, the IC performs the soft-start function to initiate output startup operation.
<Voltage Detector Block>
The series' detector function monitors the voltage divided by resistors connected to the P_VDD1 pin, as well as monitoring the
voltage of the internal reference voltage source via the comparator. Because of hysteresis at the detector function, output at
the VDOUT pin will invert when the sense pin voltage of the detector block (P_VDD1) increases above the release voltage (105%
of the detect voltage). The output configuration of the VDOUT pin is N-channel open drain, therefore, a pull-up resistor is
required. The voltage detector block has a manual reset (MR) pin. By setting the MR pin at low level, the VDOUT pin is forced
to be at low level.
By connecting a capacitor (Cd) to the Cd pin, the XC9515 series can set a delay time to VDOUT pin’s output signal when
releasing voltage. The delay time can be calculated from the internal resistance, Rdelay (2.5MΩ fixed TYP.) and the
value of Cd as per the following equation. As selecting the capacitor (Cd), the delay time can be set freely.
t
DR (Delay time) =Cd x Rdelay x 0.69
●Release Delay
Delay Capacity Cd [μF]
Ta=25 oC
Release Delay tDR (TYP.) [ms]
Release Delay tDR (MIN.~MAX.) [ms]
0.01
0.022
0.047
0.1
0.22
0.47
1
17
38
81
173
380
811
1725
10~24
23~53
49~113
103~242
228~532
487~1135
1035~2415
11/21
XC9515 Series
■NOTES ON USE
1. Please use this IC within the stated maximum ratings. The IC is liable to malfunction should the ratings be exceeded.
2. Please apply the same electrical potential to the P_VDD1 and P_VDD2 pins. Even where either CH1 or CH2 is used, both
P_VDD1 and P_VDD2 pins should have the same electrical potential. Applying the electrical potential to only one side
causes malfunction. Also the same electrical potential should be applied to the P_VSS1, P_VSS2 and A_VSS pins.
3. The XC9515 series is designed for use with ceramic output capacitors. If, however, the potential difference between
dropout voltage or output current is too large, a ceramic capacitor may fail to absorb the resulting high switching energy and
the output could be unstable. If the input-output potential difference is large, use a larger output capacitor to compensate for
insufficient capacitance.
4. When the peak current, which exceeds limit current flows within the specified time, the built-in driver transistor is turned off
(the integral latch circuit). During the time until it detects limit current and before the built-in transistor can be turned off, the
current for limit current flows; therefore, care must be taken when selecting the rating for the coil.
5. When the input voltage is low, limit current may not be reached because of voltage falls caused by ON resistance or serial
resistance of the coil.
6. Since the potential difference for input voltage has occurred to the both ends of a coil, the time changing rate of the coil
current is large when the P-channel driver transistor is ON. On the other hand, since the VOUT pin short-circuits to the GND
when the N-channel transistor is ON and there is almost no potential difference of the coil both ends, the time changing rate
of the coil current becomes very small.
This operation is repeated and the delay time of the circuit also influences, therefore, the coil current is converged on the
current value beyond the amount of current which should be restricted essentially.
The short-circuit protection does not operate during the soft-start time. As soon as the soft-start time finishes, the
short-circuit protection starts to operate and the circuit becomes disable.
The delay time of the circuit also influences when step-down ratio is large, as the result, a current more than over current
limit may flow. Please do not exceed the absolute maximum ratings of the coil.
①
②
A current flows to the driver transistor up to the current limit (ILIM).
For the delay time of the circuit, a current more than the ILIM flows after the ILIM decide until the P channel driver
transistor turns off.
③
Time changing rate of the coil current becomes very small because there is no potential difference between both ends
of the coil.
④
⑤
The Lx pin oscillates a narrow pulse during the soft-start time because of the current limit.
The circuit is latched since the short-circuit protection operates and the P-channel driver transistor is turned off.
# ms
12/21
XC9515
Series
■NOTES ON USE (Continued)
7. Driving current below the minimum operating voltage may lead malfunction to the UVLO circuit because of the noise.
8. Depending on the PC board condition, the latch function may be released from limit current detection state and the latch
time may extend or fail to reach the latch operation. Please locate the input capacitance as close to the IC as possible.
9. Spike noise and ripple voltage arise in a switching regulator as with a DC/DC converter. These are greatly influenced by
external component selection, such as the coil inductance, capacitance values, and board layout of external components.
Once the design has been completed, verification with actual components should be done.
10. With the DC/DC converter block of the IC, the peak current of the coil is controlled by the current limit circuit. Since the
peak current increases when dropout voltage or load current is high, current limit starts operating, and this can lead to
instability. When peak current becomes high, please adjust the coil inductance value and fully check the circuit operation.
In addition, please calculate the peak current according to the following formula:
Peak current: Ipk = (VIN - VOUT) x OnDuty / (2 x L x fosc) + IOUT
L: Coil Inductance Value, fOSC: Oscillation Frequency
11. When the load current is light in PWM control, very narrow pulses will be outputted, and there is the possibility that some
cycles may be skipped completely.
12. When the difference between VIN and VOUT is small, and the load current is heavy, very wide pulses will be outputted and
there is the possibility that some cycles may be skipped completely.
13. If the power input pin voltage is assumed to decrease rapidly (ex. from 6.0V to 0V) at the release of the operation
although delay capacitance (Cd) pin is connected, please connect an Shottky barrier diode between the power input
(P_VDD1) pin and the delay capacitance (Cd) pin.
14. Please connect a pull-up resistor with 100 to 200kΩ to the output pin of the voltage detector block (VDOUT).
15. The delay time of the voltage detector block in heavy load may extend because of the noise of the DC/DC block.
Precipitous and large voltage fluctuation at the power input pin may cause malfunction of the IC.
16. Use of the IC at voltages below the minimum operating voltage may lead the output voltage drop before achieving over
current limit.
17. When P_VDD1 and P_VDD2 power supply pins and EN1 and EN2 enable pins are in undefined states, the latch
protection circuit may not be reset so that the IC operation does not start correctly. Power supply and enable pins
(EN1,EN2) should be grounded before starting the IC operation.
【Undefined state conditions for each pin】
P_VDD1=P_VDD2=0.1V ~ 1.2V
VEN1=VNE2= 0.4V ~ 1.2V
18. UVLO function works even if when VIN input voltage falls below the UVLO voltage in very short time period like a few ten
nanoseconds.
●Instruction on Pattern Layout
1. In order to stabilize VIN's voltage level, we recommend that a by-pass capacitor (CIN1 and CIN2) be connected as close
as possible to the P_VDD1・P_VDD2 pins and P_VSS1・P_VSS2 pins.
2. Please mount each external component as close to the IC as possible.
3. Wire external components as close to the IC as possible and use thick, short connecting traces to reduce the circuit
impedance.
4. Make sure that the VSS traces are as thick as possible, as variations in the VSS potential caused by high VSS currents
at the time of switching may result in instability of the DC/DC converter.
13/21
XC9515 Series
■TEST CIRCUITS
Wave Form Measurement Point
< Test Circuit No.1 >
A
L
LX1
EN1
EN2
PVDD1
CL
CL
CIN
PVSS1
PVSS2
VOUT1
MR
AVSS
CD
VOUT2
VDOUT
CIN
PVDD2
LX2
L
V
A
V
Wave Form Measurement Point
※ꢀExternal Components
L
: 4.7μH(CDRH4D28C : SUMIDA)
CIN : 10μF (ceramic)
CL : 10μF (ceramic)
Wave Form Measurement Point
< Test Circuit No.2 >
A
LX1
PVDD1
EN1
EN2
A
PVSS1
PVSS2
VOUT1
MR
1μF
AVSS
CD
VOUT2
VDOUT
V
V
PVDD2
LX2
A
V
Wave Form Measurement Point
< Test Circuit No.3 >
100mA
A
LX1
EN1
EN2
V
V
PVDD1
PVSS1
PVSS2
VOUT1
MR
AVSS
CD
VOUT2
VDOUT
1μF
PVDD2
LX2
100mA
A
14/21
XC9515
Series
■TEST CIRCUITS (Continued)
Wave Form Measurement Point
Wave Form Measurement Point
15/21
XC9515 Series
■TYPICAL PERFORMANCE CHARACTERISTICS
(1) Efficiency vs. Output Current
VIN=5V,FOSC=1MHz
L=4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
100
90
80
70
60
50
40
30
20
10
0
VOUT=3.3V
VOUT=1.5V
VOUT=1.8V
1
10
100
Output Current: IOUT (mA)
1000
utput rent : IT [m]
(2) Output Voltage vs. Output Current
VOUT=1.5V
L:4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
VOUT=1.8V
VIN=5. 0V
L:4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
VIN=5.0V
1.60
1.90
1.85
1.80
1.75
1.70
1.55
1.50
1.45
1.40
1
10
100
Output Current: IOUT (mA)
1000
1
10
100
1000
Output Current: IOUT (mA)
VOUT=3.3V
VIN=5.0V
L:4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
3.40
3.35
3.30
3.25
3.20
1
10
100
Output Current: IOUT (mA)
1000
16/21
XC9515
Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(3) Output Voltage vs. Ambient Temperature
VOUT=1.2V
VOUT=1.5V
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
L:4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
L:4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
1.30
1.25
1.20
1.15
1.10
1.05
1.00
1.60
1.55
1.50
1.45
1.40
1.35
1.30
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
℃
℃
]
Ambient Temperature:Ta[
]
Ambient Temperature:Ta[
VOUT=1.8V
L:4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
V
=3.3V
OUT
L:4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
VIN=4.0V,5.0V,5.5V
3.40
3.35
3.30
3.25
3.20
3.15
3.10
1.90
1.85
1.80
1.75
1.70
1.65
1.60
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
VIN=4.0V,5.0V,5.5V
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature:Ta[
]
℃
℃
Ambient Temperature:Ta[
]
(4) Oscillation Frequency vs. Ambient Temperature
fOSC=1MHz
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
L:4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
1.2
1.1
1.0
0.9
0.8
0.7
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
-50
-25
0
25
50
75
100
℃
Ambient Temperature:Ta[
]
17/21
XC9515 Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(5) Load Transient Response
VIN=5V, VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz
VOUT1=200mV/div
VOUT1=200mV/div
VOUT2=200mV/div
VOUT2=200mV/div
IOUT1=200mA
IOUT1=200mA
IOUT1=1mA
IOUT1=1mA
50μs/div
200μs/div
VIN=5V, VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz
VOUT1=200mV/div
VOUT1=200mV/div
VOUT2=200mV/div
VOUT2=200mV/div
IOUT1=800mA
IOUT1=200mA
IOUT1=800mA
IOUT1=200mA
50μs/div
200μs/div
V =5V, V
=1.5V, V
=3.3V, f =1MHz
IN
OUT1
OUT2 OSC
VOUT1=200mV/div
VOUT1=200mV/div
VOUT2=200mV/div
VOUT2=200mV/div
IOUT2=200mA
IOUT2=200mA
IOUT2=1mA
IOUT2=1mA
200μs/div
50μs/div
VIN=5V, VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz
VOUT1=200mV/div
VOUT1=200mV/div
VOUT2=200mV/div
VOUT2=200mV/div
IOUT2=800mA
IOUT2=200mA
IOUT2=800mA
IOUT2=200mA
50μs/div
200μs/div
18/21
XC9515
Series
■PACKAGING INFORMATION
●QFN-20
Unit: mm
(0.2)
1 PIN INDENT
+0.03
-0.02
0.02
4.00±0.10
0.75±0.05
0.40±0.05
2.70±0.05
6
7
9
10
8
11
12
13
14
15
5
4
3
2
1
*The solder filet may not be formed because of no plating at side.
20 19
18 17 16
●QFN-20 Reference Pattern Layout
●QFN-20 Reference Metal Mask Design
4.6
3.2
4.5
3.3
0.3
0.5
1.1
0.5
2.7
0.3
Thickness of solder paste:120μm (reference)
19/21
XC9515 Series
■MARKING RULE
●Standard Product
●QFN-20
①②③Represent product series
MARK
PRODUCT SERIES
XC9515******
①
②
③
1pin
5
1
5
①②③④⑤⑥
⑦⑧⑨
④⑤⑥⑦Represents integer number of setting voltage
MARK
PRODUCT SERIES
④
⑤
⑥
⑦
0
0
0
1
XC95150001**
QFN-20
⑧⑨Represents production lot number
Order of 01, …09, 10, 11, …99, 0A, …0Z, 1A, …9Z, A0, …Z9, AA, …ZZ.
(G, I, J, O, Q, W excepted)
(TOP VIEW)
*No character inversion used.
20/21
XC9515
Series
1. The products and product specifications contained herein are subject to change without
notice to improve performance characteristics. Consult us, or our representatives
before use, to confirm that the information in this datasheet is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this datasheet.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this datasheet.
4. The products in this datasheet are not developed, designed, or approved for use with
such equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this datasheet within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this datasheet may be copied or reproduced without the
prior permission of TOREX SEMICONDUCTOR LTD.
21/21
相关型号:
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