XD9263D75DER-Q [TOREX]
18V Operation 500mA Synchronous Step-Down DC/DC Converters;
| 型号： | XD9263D75DER-Q |
| 厂家： | 
Torex Semiconductor |
| 描述： | 18V Operation 500mA Synchronous Step-Down DC/DC Converters |
| 文件： | 总28页 (文件大小：1357K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
XD9263/XD9264Series
ETR05066-001a
18V Operation 500mA Synchronous Step-Down DC/DC Converters
☆AEC-Q100 Grade2
■GENERAL DESCRIPTION
The XD9263/XD9264 series are synchronous step-down DC/DC converter ICs. The XD9263/64 series have operating voltage
range of 3V~18V and switching frequency is 2.2 MHz and it can support 500mA as an output current with high-efficiency. Compatible
with Low ESR capacitors such as ceramic capacitors for the output capacitor.
0.75V reference voltage source is incorporated in the IC, and the output voltage can be set to a value from 1.0V to 15.0V using
external resistors.
XD9263/XD9264 has a fixed internal Soft Start time which is 1.0ms (TYP.), additionally the time can be extended by using an
external resistor and capacitor.
UVLO and over current protection and short-circuit protection and thermal shutdown are embedded and they secure a safety
operation. As an option, timer latch off over current protection (Integral Latch Method) can be selected.
■FEATURES
■APPLICATIONS
Input Voltage Range
Output Voltage Range
FB Voltage
:
3.0V ~ 18.0V (Absolute Max 20V)
1.0V ~ 15.0V
● Automotive Body Control ECU
● Automotive Infotainment
● Automotive accessories
・Drive recorder
:
:
0.75V ± 1.5% (Ta=25℃)
2.2MHz
Oscillation Frequency
Output Current
・Car-mounted camera
・ETC
● Industrial Equipment
500mA
Quiescent Current
Control Methods
:
:
13.5μA
PWM control (XD9263)
PWM/PFM Auto (XD9264)
Efficiency 85%@12V→5V, 300mA
Soft-Start External settings
Power Good (USP-6C Package only)
Function
:
:
Protect Function
Over Current Protection
・Automatic Recovery
(XD9263D/XD9264D)
・Integral Latch Method
(XD9263C/XD9264C)
UVLO
Thermal Shutdown
Output Capacitor
:
:
:
Ceramic Capacitor
Operating Ambient Temperature
Package
-40℃ ~ 105℃
SOT-25 (Without Power Good)
USP-6C (With Power Good)
EU RoHS Compliant, Pb Free
Environmentally Friendly
:
■TYPICAL APPLICATION CIRCUIT
■TYPICAL PERFORMANCE
CHARACTERISTICS
VOUT
L
VIN
Lx
CIN
RFB1
CFB
EN/SS
FB
CL
RFB2
RPG
GND
PG
1/28
XD9263/XD9264 Series
■BLOCK DIAGRAM
VIN
Current
SENSE
LocalReg
Chip
Enable
EN/SS
each
circuit
Current
Limit PFM
(XD9264
Only)
Current
feed
back
Current
Limit
High
Side
Buffer
Gate
Under
Lx
CLAMP
Voltage
Lock Out
Low
Side
Buffer
Thermal
Shutdown
each
circuit
Operation
Enable
Vref
Soft Start
+
Err Amp
-
+
PWM
PWM/PFM
ControlLOGIC
FB
Comparator
-
GND
Ramp
Wave
OSC
PG(USP-6C Package Only)
+
-
Power-Good
Comparator
*Diodes inside the circuit are an ESD protection diodes and a parasitic diodes.
2/28
XD9263/XD9264
Series
■PRODUCT CLASSIFICATION
●Ordering Information
(*1)
XD9263①②③④⑤⑥-⑦
XD9264①②③④⑤⑥-⑦
PWM control
(*1)
PWM/PFM Auto
DESIGNATOR
ITEM
SYMBOL
DESCRIPTION
Refer to Selection Guide
C
D
①
Type
②③
FB Voltage
75
Output voltage can be adjusted in 1V to 15V
2.2MHz
④
Oscillation Frequency
D
MR-Q (*1)
SOT-25 (3,000pcs/Reel)
⑤⑥-⑦
Packages (Order Unit)
ER-Q (*1)
USP-6C (3,000pcs/Reel)
(*1) The “-Q” suffix denotes “AEC-Q100” and “Halogen and Antimony free” as well as being fully EU RoHS compliant.
●Selection Guide
C TYPE
D TYPE
FUNCTION
SOT-25
USP-6C
SOT-25
USP-6C
Chip Enable
UVLO
Yes
Yes
Yes
Yes
-
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
-
Yes
Yes
Yes
Yes
Yes
Thermal Shutdown
Soft Start
Power-Good
Current Limiter
(Automatic Recovery)
Current Limiter
-
-
Yes
-
Yes
-
Yes
Yes
(Latch Protection (*2)
)
(*2) The over-current protection latch is an integral latch type.
3/28
XD9263/XD9264 Series
■PIN CONFIGURATION
Lx
FB
5
4
1
6
5
4
VIN
Lx
2
3
GND
FB
EN/SS
PG
1
2
3
GND
VIN
EN/SS
USP-6C
(BOTTOM VIEW)
SOT-25
(TOP VIEW)
* The dissipation pad for the USP-6C package should be solder-plated in recommended mount pattern and metal
masking so as to enhance mounting strength and heat release. If the pad needs to be connected to other
pins, it should be connected to the GND (No. 2) pin.
■PIN ASSIGNMENT
PIN NUMBER
PIN NAME
FUNCTION
SOT-25
USP-6C
1
3
-
6
5
4
3
2
1
VIN
EN/SS
PG
Power Input
Enable Soft-Start
Power-Good Output
Output Voltage Sense
Ground
4
2
5
FB
GND
Lx
Switching Output
4/28
XD9263/XD9264
Series
■FUNCTION CHART
PIN NAME
SIGNAL
STATUS
Stand-by
L
H
EN/SS
Active
OPEN
Undefined State(*1)
(*1) Please do not leave the EN/SS pin open. Each should have a certain voltage.
PIN NAME CONDITION
SIGNAL
VFB > VPGDET
H (High impedance)
L (Low impedance)
L (Low impedance)
VFB ≦ VPGDET
EN/SS = H
EN/SS = L
Thermal Shutdown
UVLO
PG
Undefined State
(VIN < VUVLO1
)
Stand-by
L (Low impedance)
■ABSOLUTE MAXIMUM RATINGS
PARAMETER
VIN Pin Voltage
EN/SS Pin Voltage
FB Pin Voltage
PG Pin Voltage (*1)
PG Pin Current (*1)
Lx Pin Voltage
SYMBOL
VIN
RATINGS
UNITS
-0.3 ~ 20
-0.3 ~ 20
V
V
VEN/SS
VFB
-0.3 ~ 6.2
V
VPG
-0.3 ~ 6.2
V
IPG
8
mA
V
VLx
-0.3 ~ VIN + 0.3 or 20 (*2)
1800
Lx Pin Current
ILx
mA
SOT-25
USP-6C
760 (JESD51-7 Board) (*3)
1250 (JESD51-7 Board) (*3)
-40 ~ 105
Power Dissipation
(Ta=25℃)
Pd
mW
Operating Ambient Temperature
Storage Temperature
Topr
Tstg
℃
℃
-55 ~ 125
* All voltages are described based on the GND pin.
(*1) For the USP-6C Package only.
(*2) The maximum value should be either VIN+0.3V or 20V in the lowest.
(*3) The power dissipation figure shown is PCB mounted and is for reference only.
The mounting condition is please refer to PACKAGING INFORMATION.
5/28
XD9263/XD9264 Series
■ELECTRICAL CHARACTERISTICS
XD9263/XD9264 Series
Ta=25℃
PARAMETER
SYMBOL
VFB
CONDITIONS
VFB=0.731V → 0.769V
MIN.
TYP.
MAX. UNIT CIRCUIT
0.739 0.750 0.761
0.731 0.750 0.769
FB Voltage
VFB Voltage when Lx pin voltage
changes from "H" level to "L" level
V
②
-40℃≦Ta
-40℃≦Ta
≦
105
105
℃
℃
Output Voltage Setting
Range(*1)
VOUTSET
VIN
-
-
≦
1.0
3.0
-
-
15.0
18.0
V
V
-
-
Operating Voltage
Range
-40℃≦Ta
≦
105
℃
VIN=2.87V→2.53V, VFB=0.675V,
VIN Voltage when Lx pin voltage
changes from "H" level to "L" level
VIN=2.63V→2.97V, VFB=0.675V
VIN Voltage when Lx pin voltage
changes from "L" level to "H" level
2.60
2.53
2.70
2.63
2.70
2.80
2.87
2.90
2.97
UVLO Detect Voltage
UVLO Release Voltage
VUVLO1
V
V
②
②
-40℃≦Ta
-40℃≦Ta
≦
≦
105
105
℃
℃
-
2.80
-
VUVLO2
-
-
-
-
-
-
145
238
257
XD9263
VFB=0.825V
-40℃≦Ta
-40℃≦Ta
-40℃≦Ta
≦
≦
≦
105
105
105
℃
℃
℃
-
13.5
-
Quiescent Current
Iq
μA
④
18.5
20.0
2.50
2.80
XD9264
1.65
-
Stand-by Current
ISTB
VEN/SS=0V
μA
⑤
①
Connected to external
components
2013
2200
2387
Oscillation Frequency
fOSC
kHz
-40℃≦Ta
≦
105
℃
1813
-
-
-
2531
0
IOUT=100mA
Minimum Duty Cycle
Maximum Duty Cycle
DMIN
VFB=0.825V
VFB=0.675V
-40℃≦Ta
-40℃≦Ta
≦
≦
105
105
℃
℃
%
%
②
②
DMAX
100
-
-
1.10
1.14
-
USP-6C
SOT-25
USP-6C
SOT-25
-
-
-
-
0.95
Lx SW "H" On
Resistance
RLxH
VFB=0.675V, ILX=200mA
Ω
②
0.99
0.69(*2)
0.73(*2)
Lx SW "L" On
Resistance
RLxL
IPFM
ILIMH
tLAT
VFB=0.825V, ILX=200mA
XD9264 only
Ω
②
①
②
⑥
②
-
PFM Switch Current
-
370
1100
1.0
-
mA
mA
ms
ms
Connected to external components, IOUT=1mA
Highside Current
Limit(*3)
VFB=0.675V
920
0.5
0.5
-
Type C only
Latch Time
1.7
1.7
Connected to external components, VFB=0V
VEN/SS=0V→12V, VFB=0.675V
Time until Lx pin oscillates
VEN/SS=0V→12V, VFB=0.675V
RSS=430kΩ, CSS=0.47μF
Internal Soft-Start Time
tSS1
1.0
External Soft-Start Time
tSS2
17
26
35
ms
③
Time until Lx pin oscillates
Test Condition: Unless otherwise stated, VIN=12V, VEN/SS=12V.
The ambient temperature range (-40℃≦Ta≦105℃) is design Value.
(*1) Please use within the range of VOUT/VIN≧0.17.
(*2) Design reference value. This parameter is provided only for reference.
(*3) Current limit denotes the level of detection at peak of coil current.
6/28
XD9263/XD9264
Series
■ELECTRICAL CHARACTERISTICS (Continued)
XD9263/XD9264 Series
Ta=25℃
PARAMETER
SYMBOL
CONDITIONS
VFB=0.720V→0.630V,
MIN.
TYP.
MAX.
UNIT CIRCUIT
0.638 0.675 0.712
V
RPG:100kΩ pull-up to 5V
VFB Voltage when PG pin voltage
changes from "H" level to "L" level
VFB=0.6V, IPG=1mA
Connected to external components
VOUTSET=5V, IOUT=300mA
VIN=VEN/SS=18V,
PG Detect Voltage(*4)
VPGDET
②
-40℃≦Ta
-40℃≦Ta
≦
≦
105
105
℃
℃
0.630
-
-
0.720
0.3
-
PG Output Voltage(*4)
Efficiency
VPG
-
-
V
②
①
EFFI (*5)
85(*2)
%
FB "H" Current
FB "L" Current
IFBH
IFBL
IEN/SSH
IEN/SSL
-40℃≦Ta
-40℃≦Ta
-40℃≦Ta
-40℃≦Ta
≦
≦
≦
≦
105
105
105
105
℃
℃
℃
℃
-0.1
-0.1
-
0.0
0.0
0.1
0.0
0.1
0.1
0.3
0.1
μA
μA
μA
μA
④
④
④
④
VFB=3.0V
VIN=VEN/SS=18V,
VFB=0V
VIN=VEN/SS=18V,
EN/SS "H" Current
EN/SS "L" Current
VFB=0.825V
VIN=18V, VEN/SS=0V,
VFB=0.825V
-0.1
VEN/SS=0.3V→2.5V, VFB=0.71V
EN/SS "H" Voltage
EN/SS "L" Voltage
VEN/SSH
VEN/SS Voltage when Lx pin voltage -40℃≦Ta
changes from "L" level to "H" level
≦
≦
105
105
℃
℃
2.5
-
-
18.0
0.3
V
V
②
②
VEN/SS=2.5V→0.3V, VFB=0.71V
VEN/SSL
VEN/SS Voltage when Lx pin voltage -40℃≦Ta
changes from "H" level to "L" level
GND
Thermal Shutdown
Temperature
TTSD
THYS
Junction Temperature
Junction Temperature
-
-
150
25
-
-
℃
℃
-
-
Hysteresis Width
Test Condition: Unless otherwise stated, VIN=12V, VEN/SS=12V.
The ambient temperature range (-40℃≦Ta≦105℃) is design Value.
(*1) Please use within the range of VOUT/VIN≧0.17/
(*2) Design reference value. This parameter is provided only for reference.
(*3) Current limit denotes the level of detection at peak of coil current.
(*4) For the USP-6C Package only.
(*5) EFFI = {(output voltage) x (output current)} / {(input voltage) x (input current)} x 100
7/28
XD9263/XD9264 Series
■TEST CIRCUITS
CIRCUIT①
V
IN
A
Probe
EN/SS
2.2μ H
V
2.2μ F
Lx
V
47pF
PG
680kΩ
120kΩ
A
10μ F 10μ F
FB
V
GND
CIRCUIT②
Probe
V
IN
V
Probe
EN/SS
PG
2.2μ
F
Lx
100kΩ
V
FB
V
A
A
V
GND
1.2kΩ
V
Probe
CIRCUIT③
Probe
V
IN
430kΩ
Probe
EN/SS
Lx
2.2μ F
V
V
PG
0.47μ F
FB
V
GND
1.2kΩ
V
* PG Pin is USP-6C Package only.
8/28
XD9263/XD9264
Series
■TEST CIRCUITS (Continued)
CIRCUIT④
V
IN
A
EN/SS
PG
A
Lx
V
V
FB
A
GND
V
CIRCUIT⑤
V
IN
A
EN/SS
PG
Lx
V
FB
V
GND
CIRCUIT⑥
V
IN
Probe
EN/SS
2.2μ
H
V
2.2μ
F
Lx
V
47pF
PG
680kΩ
120kΩ
10μ
F
10μ F
FB
V
GND
* PG Pin is USP-6C Package only.
9/28
XD9263/XD9264 Series
■TYPICAL APPLICATION CIRCUIT / PARTS SELECTION METHOD
L
VOUT
VIN
Lx
CIN
RFB1
CFB
EN/SS
FB
CL
RFB2
RPG
GND
PG
【Typical Examples】
MANUFACTURER
PRODUCT NUMBER
CLF6045NIT-2R2N-D
VALUE
2.2μH
L
TDK
TDK
(*1)
CIN
CGA4J3X7R1E225K125AB
GRT21BR71A106KE13
CGA5L1X7R1C106K160AC
GRT32DC81E106KE01
2.2μF/25V
Murata
TDK
10μF/10V 2parallel
10μF/16V 2parallel
10μF/25V 2parallel
(*2)
CL
Murata
Select parts considering the DC bias characteristics and rated voltage of ceramic capacitors.
(*1) For CIN, use a capacitor with the same or higher effective capacity value as the recommended components.
(*2) For CL, use a capacitor with the same or higher effective capacity value as the recommended components.
If a capacitor with a low effective capacity value is used, the output voltage may become unstable.
However, if large capacity capacitors, such as electrolytic capacitors, are connected in parallel,
the inrush current during startup could increase or the output could become unstable.
10/28
XD9263/XD9264
Series
■TYPICAL APPLICATION CIRCUIT / PARTS SELECTION METHOD
<Output voltage setting Value VOUTSET Setting >
The output voltage can be set by adding an external dividing resistor.
The output voltage is determined by the equation below based on the values of RFB1 and RFB2
.
VOUT=VFB×(RFB1+RFB2)/RFB2
With RFB1+RFB2≦1MΩ
<CFB setting>
Adjust the value of the phase compensation speed-up capacitor CFB using the equation below.
1
CFB
2 fzfb RFB1
* A target value for fzfb of about 5kHz is optimum.
【Output voltage Setting Example】
To set output voltage to 5V.
When RFB1=680kΩ, RFB2=120kΩ, VOUTSET=0.75V×(680kΩ+120kΩ) / 120kΩ=5.0V,
and fzfb is set to a target of 5kHz using the above equation,
CFB=1/(2×π×5kHz×680kΩ)=46.8pF.
* The setting range for the output voltage is 1.0V to 15.0V.
The condition VOUT/VIN ≧0.17 must be satisfied.
【Setting Example】
CFB[pF]
VOUTSET
RFB1[kΩ]
RFB2[kΩ]
1.2
3.3
5.0
12
91
150
150
120
24
360
62
510
680
360
47
91
11/28
XD9263/XD9264 Series
■OPERATIONAL EXPLANATION
The XD9263/XD9264 series consist internally of a reference voltage supply with Soft Start function, a ramp wave circuit, an error
amp, a PWM comparator, a High side driver FET, a Low side driver FET, a High side buffer circuit, a Low side buffer circuit, a
current sense circuit, a phase compensation (Current feedback) circuit, a current limiting circuit, an under voltage lockout (UVLO)
circuit, an internal power supply (Local Reg) circuit, a gate clamp (CLAMP) circuit and other elements.
The control method is the current mode control method for handling low ESR ceramic capacitors.
VIN
Current
SENSE
LocalReg
Chip
Enable
EN/SS
each
circuit
Current
Limit PFM
(XD9264
Only)
Current
feed
back
Current
Limit
High
Side
Buffer
Gate
CLAMP
Under
Voltage
Lx
Low
Side
Lock Out
Buffer
Thermal
Shutdown
each
circuit
Operation
Enable
Vref
Soft Start
+
Err Amp
-
+
PWM
PWM/PFM
ControlLOGIC
FB
Comparator
-
GND
Ramp
Wave
OSC
PG(USP-6C Package Only)
+
-
Power-Good
Comparator
*Diodes inside the circuit are ESD protection diodes and parasitic diodes.
12/28
XD9263/XD9264
Series
■OPERATIONAL EXPLANATION(Continued)
< Normal Operation >
The standard voltage Vref and FB pin voltage are compared using an error amplifier and then the control signal to which phase
compensation has been added to the error amplifier output is input to the PWM comparator. The PWM comparator compares the
above control signal and lamp wave to control the duty width during PWM control. Continuously conducting these controls
stabilizes the output voltage.
In addition, the current detecting circuit monitors the driver FET current for each switching and modulates the error amplifier
output signal into a multiple feedback signal (current feedback circuit). This achieves stable feedback control even when low ESR
capacitors, such as ceramic capacitors, are used to stabilize the output voltage.
XD9263 Series
The XD9263 Series (PWM control) performs switching at a set switching frequency fOSC regardless of the output current. At light
loads the on time is short and the circuit operates in discontinuous mode, and as the output current increases, the on time becomes
longer and the circuit operates in continuous mode.
fOSC
fOSC
tON
tON
Lx
Lx
0V
0V
IOUT
Coil
Current
Coil
Current
IOUT
0mA
0mA
XD9263 Series: Example of light load operation
XD9263 Series: Example of heavy load operation
XD9264 Series
The XD9264 Series (PWM/PFM automatic switching control) lowers the switching frequency during light loads by turning on the
High side driver FET when the coil current reaches the PFM current (IPFM). This operation reduces the loss during light loads and
achieves high efficiency from light to heavy loads. As the output current increases, the switching frequency increases proportional
to the output current, and when the switching frequency increases fOSC, the circuit switches from PFM control to PWM control and
the switching frequency becomes fixed.
fOSC
tON
tON
Lx
Lx
0V
0V
IPFM
IOUT
Coil
Current
Coil
Current
IOUT
0mA
0mA
XD9264 Series: Example of light load operation
< 100% Duty Cycle Mode >
XD9264 Series: Example of heavy load operation
When the dropout voltage is low or there is a transient response, the circuit might change to the 100% Duty cycle mode where
the High side driver FET is continuously on.
The 100% Duty cycle mode operation makes it possible to maintain the output current even when the dropout voltage is low
such as when the input voltage declines due to cranking, etc.
13/28
XD9263/XD9264 Series
■OPERATIONAL EXPLANATION(Continued)
< CE Function >
When an “H” voltage (VEN/SSH) is input to the EN/SS pin, normal operation is performed after the output voltage is started up by
the Soft Start function, normal operation is performed. When the “L” voltage (VEN/SSL) is input to the EN/SS pin, the circuit enters
the standby state, the supply current is suppressed to the standby current ISTB (TYP. 1.65μA), and the High side driver FET and
Low side driver FET are turned off.
< Soft Start Function >
This function gradually starts up the output voltage to suppress the inrush current.
The Soft Start time is the time until the output voltage from VEN/SSH reaches 90% of the output voltage set value, and when the
output voltage increases further, the Soft Start function is cancelled to switch to normal operation.
Internal Soft Start Time
The internal Soft Start time (tSS1) is configured so that after the “H” voltage (VEN/SSH) is input to the EN/SS pin, the standard
voltage connected to the error amplifier increases linearly during the Soft Start period. This causes the output voltage to increase
proportionally to the standard voltage increase. This operation suppresses the inrush current and smoothly increases the output
voltage.
tss1
V1
EN/SS
V1
90% of setting voltage
VOUT
< Overview of internal Soft Start >
< Internal Soft Start EN/SS circuit >
External Setting Soft Start Time
The external setting Soft Start time (tSS2) can adjust the increase speed of the standard voltage in the IC by adjusting the EN/SS
pin voltage inclination during startup using externally connected component RSS and CSS. This makes it possible to externally
adjust the Soft Start time.
Soft Start time (tSS2) is approximated by the equation below according to values of V1, RSS, and CSS.
When tss2 is shorter than tss1, the output voltage rises at the internal Soft Start time.
tSS2=CSS×RSS× ln (V1 / (V1-1.45V))
【Setting Example】
CSS = 0.47μF, RSS = 430kΩ, V1 = 12V
tSS2 = 0.47μF x 430kΩ x (ln (12V/(12V-1.45V)) = 26ms
tss2
V1
RSS
EN/SS
CSS
V1
1.45V
EN/SS
VOUT
90% of setting voltage
< External Soft Start EN/SS circuit >
< Overview of external Soft Start >
14/28
XD9263/XD9264
Series
■OPERATIONAL EXPLANATION (Continued)
< Power Good >
The output state can be monitored using the power good function. The PG pin is an Nch open drain output, therefore a pull-up
resistor (approx. 100kΩ) must be connected to the PG pin.
The pull-up voltage should be 5.5V or less. When not using the power good function, connect the PG terminal to GND or leave
it open.
CONDITION
SIGNAL
VFB > VPGDET
H (High impedance)
L (Low impedance)
L (Low impedance)
Undefined State
VFB ≦ VPGDET
EN/SS = H
EN/SS = L
Thermal Shutdown
UVLO (VIN < VUVLOD
Stand-by
)
L (Low impedance)
< UVLO Function >
When the VIN pin voltage falls below VUVLOD (TYP. 2.7V), the high side driver FET and low side driver FET are forcibly turned off
to prevent false pulse output due to instable operation of the internal circuits. When the VIN pin voltage rises above VUVLOR (TYP.
2.8V), the UVLO function is released, the Soft Start function activates, and output start operation begins. Stopping by UVLO is
not shutdown; only pulse output is stopped and the internal circuits continue to operate.
< Thermal Shutdown Function >
Athermal shutdown (TSD) function is built in for protection from overheating. When the junction temperature reaches the thermal
shutdown detection temperature TTSD, the High side driver FET and Low side driver FET are compulsorily turned off.
If the driver FET continues in the off state, the junction temperature declines, and when the junction temperature falls to the
thermal shutdown cancel temperature, the thermal shutdown function is cancelled and the Soft Start function operates to start up
the output voltage.
15/28
XD9263/XD9264 Series
■OPERATIONAL EXPLANATION (Continued)
<Current limiting>
The current limiting circuit of the XD9263/XD9264 series monitor the current that flows through the High side driver transistor
and Low side driver transistor, and when over-current is detected, the current limiting function activates.
① High side driver Tr. current limiting
The current in the High side driver Tr. is detected to equivalently monitor the peak value of the coil current. The High side driver
Tr. current limiting function forcibly turns off the High side driver Tr. when the peak value of the coil current reaches the High side
driver current limit value ILIMH
.
High side driver Tr. current limit value ILIMH=1.1A (TYP.)
② Low side driver Tr. current limiting
The current in the Low side driver Tr. is detected to equivalently monitor the bottom value of the coil current. The Low side
driver Tr. current limiting function operates when the High side driver Tr. current limiting value reaches ILIMH. The Low side driver
Tr. current limiting function prohibits the High side driver Tr. from turning on in an over current state where the bottom value of
the coil current is higher than the Low side driver Tr. current limit value ILIML
.
Low side driver Tr. current limit value ILIML=0.9A (TYP.)
When the output current increases and reaches the current limit value, the current foldback circuit operates and lowers the
output voltage and FB voltage. The ILIMH and ILIML decline accompanying the FB voltage decrease to restrict the output current.
When the overcurrent state is removed, the foldback circuit operation increases the ILIMH and ILIML together with output voltage
to return the output to the output voltage set value.
③ Over current latch (Type C)
Type C turns off the High side and Low side driver Tr. when state ① or ② continues for tLAT (TYP. 1.0ms). The LX pin is latch
stopped at the GND level (0V).
The latch stopped state only stops the pulse output from the Lx pin; the internal circuitry of the IC continues to operate. To restart
after latch stopping, L level and then H level must be input into the EN/SS pin, or VIN pin re-input must be performed (after lowering
the voltage below the UVLO detection voltage) to resume operation by Soft-Start.
The over current latch function may occasionally be released from the current limit detection state by the effects of ambient noise,
and it may also happen that the latch time becomes longer or latching does not take place due to board conditions. For this reason,
place the input capacitor as close as possible to the IC.
Type D is an automatic recovery type that performs the operation of ① or ② until the over current state is released.
t
LAT (TYP. 1ms)
Latch Protection (Type C)
ILIMH (TYP. 1.1A)
ILIML (TYP. 0.9A)
ILX
VLX
VOUT
VEN/SS
Current limiting timing chart
16/28
XD9263/XD9264
Series
■NOTES ON USE
1) In the case of a temporary and transient voltage drop or voltage rise.
If the absolute maximum ratings are exceeded, the IC may be deteriorate or destroyed.
If a voltage exceeding the absolute maximum voltage is applied to the IC due to chattering caused by a mechanical switch
or an external surge voltage, please use a protection element such as a TVS and a protection circuit as a countermeasure.
Please see the countermeasures from (a) to (d) shown below.
(a) When voltage exceeding the absolute maximum ratings comes into the VIN pin due to the transient change on the
power line, there is a possibility that the IC breaks down in the end.
To prevent such a failure, please add a TVS between VIN and GND as a countermeasure.
(b) When the input voltage decreases below the output voltage, there is a possibility that an overcurrent will flow in the IC’s
Internal parasitic diode and exceed the absolute maximum rating of the Lx pin.
If the current is pulled into the input side by the low impedance between VIN and GND, then countermeasures, such as
adding an SBD between VOUT and VIN, should be taken.
(c) When a negative voltage is applied to the input voltage by a reverse connection or chattering, an overcurrent could flow
in the IC’s parasitic diode and damage the IC. Take countermeasures, such as adding a reverse touching protection diode.
(d) When a sudden surge of electrical current travels along the VOUT pin and GND due to a short-circuit, electrical resonance
of a circuit involving parasitic inductor of cable related to short circuit and an output capacitor (CL) and impedance such as
VOUT line generates a negative voltage exceeding the breakdown voltage and may damage the device.
Take countermeasures, such as connecting a schottky diode between the VOUT and GND.
(b)SBD
(c)Reverse-Touching
Protection Diode
L
VIN
Lx
RFB1
CFB
CIN
CIN1
(a)TVS
EN/SS
FB
(d)SBD
CL2
RFB2
CL1
RPG
GND
PG
17/28
XD9263/XD9264 Series
■NOTES ON USE(Continued)
2) Make sure that the absolute maximum ratings of the external components and of this IC are not exceeded.
3)
The DC/DC converter characteristics depend greatly on the externally connected components as well as on the
characteristics of this IC, so refer to the specifications and standard circuit examples of each component when carefully
considering which components to select.
Be especially careful of the capacitor characteristics and use X7R or X5R (EIA standards) ceramic capacitors.
The capacitance decrease caused by the bias voltage may become large depending on the external size of the capacitor.
4)
The current limit value is the coil current peak value when switching is not conducted.
The coil current peak value when the actual current limit function begins to operate may exceed the current limit of the
electrical characteristics due to the effect of the propagation delay inside the circuit.
5)
6)
7)
When the On time is less than the Minimum On Time (tONMIN) and the dropout voltage is large or the load is low, the PWM
control operates intermittently and the VOUT ripple voltage may become large or the output voltage may become unstable.
The VOUT ripple voltage could be increased when switching from discontinuous conduction mode to continuous conduction
mode and when switching to 100% Duty cycle.
The PWM/PFM auto series may cause superimposed VOUT ripple voltage by continuous pulses if used in high temperature
and no load conditions. It is necessary to set an idle current of higher than 100μA from VOUT if used at no load.
It can have the same effect as when RFB2 is lower than 7.5kΩ. Please refer to the
< Output Voltage Setting Value VOUTSET Setting > section under TYPICAL APPLICATION CIRCUIT.
8)
9)
If the voltage at the EN/SS Pin does not start from 0V but it is at the midpoint potential when the power is switched on, the
Soft Start function may not work properly and it may cause larger inrush current and bigger VOUT ripple voltages.
The effects of ambient noise and the state of the circuit board may cause release from the current limiting state, and the
latch time may lengthen or latch operation may not take place. Please evaluate IC well on customer’s PCB.
10) Torex places an importance on improving our products and their reliability. We request that users incorporate fail safe
designs and post aging protection treatment when using Torex products in their systems.
18/28
XD9263/XD9264
Series
■NOTES ON USE(Continued)
11) Instructions of pattern layouts.
The operation may become unstable due to noise and/or phase lag from the output current when the wire impedance is high,
please place the input capacitor(CIN) and the output capacitor (CL) as close to the IC as possible.
(1)
In order to stabilize VIN voltage level, we recommend that a by-pass capacitor (CIN1) be connected as close as
possible to the VIN and GND pins.
(b)SBD
(c)Reverse-Touching
Protection Diode
L
VIN
Lx
RFB1
CFB
(1)CIN1
CIN
(a)TVS
EN/SS
FB
(d)SBD
CL2
RFB2
CL1
RPG
GND
PG
(2)
Please mount each external component as close to the IC as possible.
Please place the external parts on the same side of the PCB as the IC, not on the reverse side of the PCB and
elsewhere.
(3)
(4)
(5)
Wire external components as close to the IC as possible and use thick, short connecting traces to reduce the circuit
impedance.
Make sure that the GND traces are as thick as possible, as variations in ground potential caused by high ground
currents at the time of switching may result in instability of the IC.
This product has a built in driver FET, which causes heat generation from the on resistance, so take measures to
dissipate the heat when necessary.
19/28
XD9263/XD9264 Series
■NOTE ON USE (Continued)
<Reference Pattern Layout>
●USP-6C
Layer 1
Layer 2
Layer 3
Layer 4
●SOT-25
Layer 1
Layer 2
Layer 3
Layer 4
20/28
XD9263/XD9264
Series
■TYPICAL PERFORMANCE CHARACTERISTICS
(1) Efficiency vs. Output current
XD9263x75D/XD9264x75D
XD9263x75D/XD9264x75D
(VIN=12V, VOUT=3.3V)
(VIN=12V, VOUT=5V)
L=2.2μ H(CLF6045NIT-2R2), CIN=2.2μ F(GRT31CC81H225KE01),
CL=10μ F×2 (GRT32DC81E106KE01)
L=2.2μH(CLF6045NIT-2R2), CIN=2.2μF(GRT31CC81H225KE01),
CL=10μF×2 (GRT32DC81E106KE01)
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
XD9263x75D
XD9264x75D
XD9263x75D
XD9264x75D
0.1
1
10
100
0.1
1
10
100
Output Current :IOUT[mA]
Output Current :IOUT[mA]
(2) Output Voltage vs. Output Current
XD9263x75D/XD9264x75D
XD9263x75D/XD9264x75D
(VIN=12V, VOUT=3.3V)
(VIN=12V, VOUT=5V)
L=2.2μ H(CLF6045NIT-2R2), CIN=2.2μ F(GRT31CC81H225KE01),
CL=10μ F×2 (GRT32DC81E106KE01)
L=2.2μ H(CLF6045NIT-2R2), CIN=2.2μ F(GRT31CC81H225KE01),
CL=10μ F×2 (GRT32DC81E106KE01)
3.60
3.50
3.40
3.30
3.20
3.10
3.00
5.30
5.20
5.10
5.00
4.90
4.80
4.70
XD9263x75D
XD9264x75D
XD9263x75D
XD9264x75D
1
10
100
1000
1
10
100
1000
Output Current :IOUT[mA]
(3) Ripple Voltage vs. Output Current
XD9263x75D/XD9264x75D
Output Current :IOUT[mA]
(4) FB Voltage vs. Ambient Temperature
(VIN=12V, VOUT=5V)
XD9263/XD9264
VIN=12V
0.760
L=2.2μ H(CLF6045NIT-2R2), CIN=2.2μ F(GRT31CC81H225KE01),
CL=10μ F×2 (GRT32DC81E106KE01)
100
90
80
70
60
50
40
30
20
10
0
XD9263x75D
XD9264x75D
0.755
0.750
0.745
0.740
-50
-25
0
25
50
75
100
125
0.1
1
10
100
Ambient Temperature :Ta[℃]
Output Current :IOUT[mA]
21/28
XD9263/XD9264 Series
■TYPICAL PERFORMANCE CHARACTERISTICS(Continued)
(5) UVLO Voltage vs. Ambient Temperature
(6) Oscillation Frequency vs. Ambient Temperature
XD9263x75D/XD9264x75D
XD9263x75D/XD9264x75D
VIN=12V
3.0
2650
2500
2350
2200
2050
1900
1750
2.9
VUVLO2 (Release Voltage)
2.8
2.7
VUVLO1 (Detect Voltage)
2.6
2.5
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Ambient Temperature :Ta[℃]
Ambient Temperature :Ta[℃]
(7) Stand-by Current vs. Ambient Temperature
(8) Lx SW ON Resistance vs. Ambient Temperature
XD9263x75D/XD9264x75D
XD9263x75D/XD9264x75D
VIN=12V
VIN=12V
2.0
1.5
1.0
0.5
0.0
4
3
2
1
0
RLXH
RLXL
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Ambient Temperature :Ta[℃]
Ambient Temperature :Ta[℃]
(9) Quiescent Current vs. Ambient Temperature
(10) Internal Soft-Start Time vs. Ambient Temperature
XD9263x75D/XD9264x75D
XD9263x75D/XD9264x75D
VIN=12V
200
VIN=12V
1.6
XD9263x75D
XD9264x75D
1.4
1.2
1.0
0.8
0.6
0.4
150
100
50
0
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Ambient Temperature :Ta[℃]
Ambient Temperature :Ta[℃]
22/28
XD9263/XD9264
Series
■TYPICAL PERFORMANCE CHARACTERISTICS(Continued)
(11) External Soft-Start Time vs. Ambient Temperature
XD9263x75D/XD9264x75D
(12) PFM Switch Current vs. Ambient Temperature
XD9264x75D
(VIN=12V, VOUT=5V)
VIN=12V, RSS=430kΩ, CSS=0.47μF
L=2.2μH(CLF6045NIT-2R2N-D), CIN=2.2μF(CGA4J3X7R1E225K125AB),
35
CL=10μF×2 (CGA5L1X7R1C106K160AC)
500
30
25
20
15
450
400
350
300
250
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Ambient Temperature :Ta[℃]
Ambient Temperature :Ta[℃]
(13) PG Detect Voltage vs. Ambient Temperature
(14) PG Output Voltage vs. Ambient Temperature
XD9263x75D/XD9264x75D
XD9263x75D/XD9264x75D
VIN=12V
VIN=12V, IPG=1mA
0.75
0.4
0.3
0.2
0.1
0.0
0.70
0.65
0.60
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Ambient Temperature :Ta[℃]
Ambient Temperature :Ta[℃]
(15) EN/SS Voltage vs. Ambient Temperature
XD9263x75D/XD9264x75D
VIN=12V
2.5
EN/SS "H"
EN/SS "L"
2.0
1.5
1.0
0.5
0.0
-50
-25
0
25
50
75
100
125
Ambient Temperature :Ta[℃]
23/28
XD9263/XD9264 Series
■TYPICAL PERFORMANCE CHARACTERISTICS(Continued)
(16) V -VOUT Operation Area
IN
XD9263/XD9264
20
18
16
14
Operation
12
10
8
Area
6
4
2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Output Voltage:VOUT[V]
(17) Output Current Operation Area
XD9263/XD9264 (VOUT=3.3V)
XD9263/XD9264 (VOUT=5V)
θja=80℃/W
VIN=12V
VIN=12V
θja=80℃/W
θja=131℃/W
600
500
400
300
200
100
0
600
500
400
300
200
100
0
θja=131℃/W
Operation
Area
Operation
Area
-40 -20
0
20 40 60 80 100 120
-40 -20
0
20 40 60 80 100 120
Ambient Temperature :Ta[℃]
Ambient Temperature :Ta[℃]
24/28
XD9263/XD9264
Series
■TYPICAL PERFORMANCE CHARACTERISTICS(Continued)
(18) Load Transient Response
XD9263x75D
XD9264x75D
VIN=12V, VOUT=5.0V, IOUT=1mA⇔300mA
VIN=12V, VOUT=5.0V, IOUT=1mA⇔300mA
L=2.2μH(CLF6045NIT-2R2N-D), CIN=2.2μF(CGA4J3X7R1E225K125AB),
CL=10μF×2 (CGA5L1X7R1C106K160AC)
L=2.2μH(CLF6045NIT-2R2N-D), CIN=2.2μF(CGA4J3X7R1E225K125AB),
CL=10μF×2 (CGA5L1X7R1C106K160AC)
Tr=10us
Tr=10us
200us/div
200us/div
Tf=10us
IOUT=1mA⇔300mA
IOUT=1mA⇔300mA
Tf=10us
VOUT: 100mV/div
VOUT: 100mV/div
(19) Input Transient Response
XD9263x75D
XD9264x75D
VIN=12V⇔18V, VOUT=5V, IOUT=300mA
VIN=12V⇔18V, VOUT=5V, IOUT=300mA
L=2.2μH(CLF6045NIT-2R2N-D), CIN=2.2μF(CGA4J3X7R1E225K125AB),
CL=10μF×2 (CGA5L1X7R1C106K160AC)
L=2.2μH(CLF6045NIT-2R2N-D), CIN=2.2μF(CGA4J3X7R1E225K125AB),
CL=10μF×2 (CGA5L1X7R1C106K160AC)
Tr=10us
Tr=10us
100us/div
100us/div
Tf=10us
VIN=12V⇔18V
VOUT: 100mV/div
VN=12V⇔18V
Tf=10us
VOUT: 100mV/div
(20) EN/SS Rising Response
XD9263x75D
XD9264x75D
VIN=12V, VEN/SS=0V→12V, VOUT=5V, IOUT=300mA
VIN=12V, VEN/SS=0V→12V, VOUT=5V, IOUT=300mA
L=2.2μH(CLF6045NIT-2R2N-D), CIN=2.2μF(CGA4J3X7R1E225K125AB),
CL=10μF×2 (CGA5L1X7R1C106K160AC)
L=2.2μH(CLF6045NIT-2R2N-D), CIN=2.2μF(CGA4J3X7R1E225K125AB),
CL=10μF×2 (CGA5L1X7R1C106K160AC)
200μs/div
200μs/div
VEN/SS=0V→12V
VEN/SS=0V→12V
VOUT : 2V/div
VOUT : 2V/div
25/28
XD9263/XD9264 Series
■PACKAGING INFORMATION
For the latest package information go to, www.torexsemi.com/technical-support/packages/
PACKAGE
SOT-25
OUTLIN / LAND PATTERN
SOT-25 PKG
THERMAL CHARACTERISTICS
SOT-25 Power Dissipation
USP-6C Power Dissipation
JESD51-7 Board
JESD51-7 Board
USP-6C
USP-6C PKG
26/28
XD9263/XD9264
Series
■MARKING RULE
●SOT-25 / USP-6C
(*) SOT-25 has a dot mark, which is printed under MARK ① (refer to drawings below).
●SOT-25(Under dot)
●USP-6C
Enlarge
5
4
1
2
3
6
①
②
③
④
⑤
5
4
1
2
3
①②③represents products series, products type, Oscillation Frequency
MARK
OSCILLATION
FREQUENCY
SERIES
TYPE
PRODUCT SERIES
①
L
②
4
③
1
XD9263C75D**-Q
XD9263D75D**-Q
XD9264C75D**-Q
XD9264D75D**-Q
XD9263
XD9263
XD9264
XD9264
C
D
C
D
D
D
D
D
L
4
2
L
4
3
L
4
4
④,⑤ represents production lot number
01～09, 0A～0Z, 11～9Z, A1～A9, AA～AZ, B1～ZZ in order.
(G, I, J, O, Q, W excluded)
* No character inversion used.
27/28
XD9263/XD9264 Series
1. The product and product specifications contained herein are subject to change without notice to
improve performance characteristics. Consult us, or our representatives before use, to confirm that
the information in this datasheet is up to date.
2. The information in this datasheet is intended to illustrate the operation and characteristics of our
products. We neither make warranties or representations with respect to the accuracy or
completeness of the information contained in this datasheet nor grant any license to any intellectual
property rights of ours or any third party concerning with the information in this datasheet.
3. Applicable export control laws and regulations should be complied and the procedures required by
such laws and regulations should also be followed, when the product or any information contained in
this datasheet is exported.
4. The product is neither intended nor warranted for use in equipment of systems which require
extremely high levels of quality and/or reliability and/or a malfunction or failure which may cause loss
of human life, bodily injury, serious property damage including but not limited to devices or equipment
used in 1) nuclear facilities, 2) aerospace industry, 3) medical facilities, 4) automobile industry and
other transportation industry and 5) safety devices and safety equipment to control combustions and
explosions, excluding when specified for in-vehicle use or other uses.
Do not use the product for in-vehicle use or other uses unless agreed by us in writing in advance.
5. Although we make continuous efforts to improve the quality and reliability of our products;
nevertheless Semiconductors are likely to fail with a certain probability. So in order to prevent personal
injury and/or property damage resulting from such failure, customers are required to incorporate
adequate safety measures in their designs, such as system fail safes, redundancy and fire prevention
features.
6. Our products are not designed to be Radiation-resistant.
7. Please use the product listed in this datasheet within the specified ranges.
8. We assume no responsibility for damage or loss due to abnormal use.
9. All rights reserved. No part of this datasheet may be copied or reproduced unless agreed by Torex
Semiconductor Ltd in writing in advance.
TOREX SEMICONDUCTOR LTD.
28/28
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