T6LE2 [TOSHIBA]
Gate Driver for TFT LCD Panels; 栅极驱动器，用于TFT LCD面板
| 型号： | T6LE2 |
| 厂家： | 
TOSHIBA |
| 描述： | Gate Driver for TFT LCD Panels |
| 文件： | 总12页 (文件大小：199K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
T6LE2
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
T6LE2
Gate Driver for TFT LCD Panels
The T6LE2 is a 300 / 263 / 256-channel output gate driver for
TFT LCD panels.
Unit: mm
User Area Pitch
IN OUT
T6LE2
Features
• LCD drive output pins
• LCD drive voltage
• Data transfer method
• Operating temperature
• Package
: Switchable 300 / 263 / 256 pins
: max 43.5 V
Please contact Toshiba or a distributor for
the latest COF specification and product
line-up.
: Bidirectional shift register
: −20 to 75°C
: COF
COF (Chip On Film)
Application
Module for PC monitors, LCDs for TV and Module for amusement
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2006-09-20
T6LE2
Block Diagram
DO/I
DI/O
CPVL/R
U/D
Shift register
MODE1
MODE2
Input circuit unit
OE L/R
XDON
Control circuit unit
V
GG
Output circuit unit
V
EE
V
DD
V
SS
G1 G2 G3
G298 G299 G300
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2006-09-20
T6LE2
Pin Assignment
G300 327
G299 326
G298 325
V
V
V
V
V
1
2
3
4
5
GG
EE
DD
SS
DD
DO/I
6
(V
)
7
SS
MODE2
(V
8
9
)
DD
OE R
CPVR
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
V
SS
T6LE2
(chip top view)
XDON
(V
)
DD
U/D
(V
)
SS
CPVL
OE L
(V
(V
)
SS
)
DD
MODE1
(V
)
SS
DI/O
V
SS
V
DD
V
EE
G3 30
G2 29
G1 28
V
GG
The above diagram shows the device’s pin configuration only and does not necessarily correspond to the pad
layout on the chip. Please contact Toshiba or our distributors for the latest COF specification.
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2006-09-20
T6LE2
Pin Function
Pin Name
I/O
Function
Vertical shift clock, output enable input / output select pin
These pins are used to input and output shift data. These pins are switched between input and
output by setting the U/D pin as shown below.
U/D
H
DI/O
Input
DO/I
Output
Input
DI/O
DO/I
I/O
L
Output
• When set for input
This pin is used to feed data into the shift registers at the first stage of the LCD driver. The data is
latched into the shift registers at the rising edge of CPVL/R.
• When set for output
When two or more T6LE2 are cascaded, this pin outputs the data to be fed into the next stage.
This data changes state synchronously with the falling edge of CPVL/R.
Transfer direction select / vertical shift clock, output enable input / output select pin
This pin specifies the direction in which data is transferred through the shift registers.
The shift register data is shifted synchronously with the rising edge of CPV as follows:
When U/D is high, data is shifted in the direction
U/D = “H”: G1 → G2 → G3 → G4 → ··· → G300
When U / D is low, the direction is reversed to give
U/D = “L”: G300 → G299 → G298 → G297 → ··· → G1
This pin is used to perform input / output settings for CPVL, CPVR, OE L, OE R.
U/DL
U/DR
U/D
L
Input
CPVR
OE R
CPVL
OE L
Output
CPVL
OE L
I/O
CPVR
OE R
H
The voltage applied to this pin must be a DC-level voltage that is either high (V ) or low (V ).
DD
SS
Vertical shift clock
• When set for input:
This is the shift clock for the shift registers. Data is shifted through the shift registers
synchronously with the rising edge of CPVL/R.
• When set for output:
The signal input to CPVL/R is output to CPVR/L asynchronous to other signals.
These pins are switched between input and output by setting the U/D pin as below.
CPVL
CPVR
I/O
U/D
H
CPVL
Input
CPVR
Output
Input
L
Output
Output enable pin
When set for input:
These signals control the data appearing at the LCD panel drive pins (G1 through G300).
OE L/R doesn’t synchronize with the CPVL/R.
When OE L/R is low : outputs shift data and data contents.
When OE L/R is high : controls the LCD panel drive output to V level.
EE
When set for output:
OE L
OE R
I/O
The signal input to OE L/R is output to OE R/L.
These pins are switched between input and output by setting the U/D pin as below.
U/D
H
OE L
Input
OE R
Output
Input
L
Output
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2006-09-20
T6LE2
Pin Name
I/O
Function
Output channels select pins
This signal selects 300 / 263 / 256-pin mode for the LCD panel driver.
LCD drive
output pins
MODE1
MODE2
Non-output pins
MODE1
MODE2
I
H
H
L
H
L
300-out
⎯
263-out
G133 to G169 (V level )
EE
H
L
256-out
G129 to G172 (V level )
EE
L
⎯
Display-ON input pin
When XDON = low, the V
voltage is output all output pins irrespective of the shift data and the
GG
content of input data. After, the contents of the shift registers becomes unfixed the data.
XON operates asynchronously with CPV. This pin is pulled-up to the V
.
DD
XDON
I
Since all LCD drive outputs output (G1 to G300) the V
momentarily.
level, much current may generate them
GG
When 263 / 256-pin mode, unapplied LCD panel drive pins fixed V
.
EE
The voltage applied to this pin must be a DC-level voltage that is either high (V ) or low (V ).
DD
SS
LCD panel drive pins
G1 to G300
O
These pins output the shift register data or the voltage of V
signals OE and XDON.
or V
depending on the control
EE
GG
V
⎯
⎯
Power supply for LCD drive
Power supply for LCD drive
Power supply for the internal logic
GG
V
EE
V
⎯
⎯
DD
The (V ) is the MODE1, MODE2 and U/D pin for connection.
DD
Power supply for the internal logic
V
SS
The (V ) is the MODE1, MODE2 and U/D pin for connection.
SS
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2006-09-20
T6LE2
Device Operation
z Shift data transfer method
Shift Data
Input
Output
Mode
U/D
Pin
MODE1
MODE2
Data Transfer Method
Output
DO/I
DI/O
DO/I
DI/O
DO/I
DI/O
H
L
DI/O
DO/I
DI/O
DO/I
DI/O
DO/I
G1 → G2 → G3 → G4 → ··· → G300
G300 → G299 → G298 → ··· → G1
H
H
H
L
300-out
263-out
256-out
H
L
G1 → G2 → G3 → G4 → ··· → G132 → G170 → ··· → G300
G300 → G299 → G298 → ··· → G170 → G132 →··· → G1
G1 → G2 → G3 → G4 → ··· → G128 → G173 → ··· → G300
G300 → G299 → G298 → ··· → G173 → G128 →··· → G1
Don't use
H
L
L
L
H
L
The input data (DI/O or DO/I) is latched into the internal register synchronously with the rising edge of the
shift clock CPV. At the same time that the data is shifted to the next register at the next rise of CPV, new
vertical shift data is latched into.
In the output operation, the data in the last shift register (G300 or G1) is output synchronously with the
falling edge of CPV. (The output high voltage is the V
level; the output low voltage is the V level.)
SS
DD
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2006-09-20
T6LE2
Timing Diagram 1
(300-out mode, U/D = high level, MODE1 = high level, MODE2 = high level)
DI/O
(Input)
1
2
3
4
5
300
301
CPVL/R
OE L/R
XDON
G1
G2
G3
G4
G300
DO/I
(Output)
: This part is output which is controlled ( fixed to V ) by
pin
OE
EE
Timing Diagram 2
(300-out mode, U/D = low level, MODE1 = high level, MODE2 = high level)
DO/I
(Input)
1
2
3
4
5
300
301
CPVL/R
OE L/R
XDON
G300
G299
G298
G297
G1
high level
DI/O
(Output)
: This part is output which is controlled ( fixed to V ) by
pin
OE
EE
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2006-09-20
T6LE2
Timing Diagram 3
(263-out mode, U/D = high level, MODE1 = high level, MODE2 = low level)
DI/O
(Input)
1
2
3
4
5
263
264
CPVL/R
OE L/R
high level
XDON
G1
G2
G3
G4
G133 to G169
G300
V
EE
DO/I
(Output)
: This part is output which is controlled ( fixed to V ) by
pin
OE
EE
Timing Diagram 4
(256-out mode, U/D = high level, MODE1 = low level, MODE2 = high level)
DI/O
(Input)
1
2
3
4
5
256
257
CPVL/R
OE L/R
high level
XDON
G1
G2
G3
G4
G129 to G172
G300
V
EE
DO/I
(Output)
: This part is output which is controlled ( fixed to V ) by
pin
OE
EE
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2006-09-20
T6LE2
Absolute Maximum Ratings (V = 0 V)
SS
Parameter
Supply voltage (1)
Symbol
Rating
Unit
V
−0.3 to 4.0
−0.3 to 48.0
−20.0 to 0.3
−0.3 to 45.0
DD
Supply voltage (2)
Supply voltage (3)
Supply voltage (4)
Input voltage
V
GG
V
V
EE
V
− V
GG
EE
V
−0.3 to V
+ 0.3
DD
IN
Storage temperature
T
−55 to 125
°C
stg
Recommended Operating Conditions (V = 0 V)
SS
Parameter
Supply voltage (1)
Symbol
Rating
Unit
V
V
2.3 to 3.6
10 to 35
DD
Supply voltage (2)
V
GG
Supply voltage (3)
V
−15 to −5
15.0 to 43.5
−20 to 75
150 (max）
300 (max)
EE
Supply voltage (4)
V
− V
GG
EE
Operating temperature
Operating frequency
Output Load capacitance
T
°C
kHz
opr
f
CPV
C
pF/PIN
L
Electrical Characteristics
DC Characteristics
(V
− V = 30.0 to 43.5 V, V = 2.3 to 3.6 V, V = 0 V, Ta = −20 to 75°C)
DD SS
GG
EE
Test
circuit
Parameter
Symbol
Test Conditions
Min
Max
Unit
V
Relevant
(Note1)
0.3 ×
Low Level
High Level
Low Level
High Level
Low Level
High Level
V
⎯
⎯
⎯
⎯
V
SS
IL1
V
DD
Input voltage (1)
Input voltage (2)
Output voltage
⎯
⎯
⎯
0.7 ×
V
V
IH1
DD
V
DD
(0.3 ×
V
V
SS
IL2
V
)
DD
V
V
XDON
(0.7 ×
V
V
DD
IH2
V
)
DD
V
0.4
+
SS
V
I
I
= 40 μA
V
SS
OL
OL
DI/O
DO/I
V
−
DD
V
= −40 μA
V
DD
OH
OH
0.4
Low Level
High Level
R
V
V
= V + 0.5 V
EE
OL
OH
IN1
IN2
GG
OUT
OUT
Output
resistance
⎯
⎯
⎯
1000
Ω
G1 to G300
R
= V
− 0.5 V
GG
I
I
I
⎯
−1
−1
⎯
⎯
⎯
1
(Note1)
XDON
Input leakage current
μA
V
= V
1
IN
DD
Current consumption (1)
Current consumption (2)
Current consumption (3)
T.B.D.
T.B.D.
T.B.D.
V
GG
⎯
no load
(Note2)
μA
I
V
DD
DD
I
V
EE
EE
Note1: Input pins : DI/O, DO/I, CPVL/R, OE L/R
Note2: fCPV = 50kHz, Shift data input : 60Hz, OE = low level, XDON = high level, MODE1 / MODE2 = high level
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2006-09-20
T6LE2
AC Characteristics
V
t
− V = 30.0 to 43.5 V, V = 2.3 to 3.6 V, V = 0 V, Ta = −20 to 75°C
GG
EE DD SS
= 100ns (Max）、t = 100ns (Max)
rIN
fIN
Test
circuit
Parameter
Symbol
Test Conditions
Min
Max
Unit
kHz
Clock frequency
t
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
500
500
200
200
1
150
⎯
CPV
CPV pulse width (H)
CPV pulse width (L)
Data set-up time
t
CPVH
t
⎯
CPVL
ns
t
t
⎯
sDI
Data hold time
⎯
hDI
OE enable time
t
⎯
wOE
wON
μs
Display-ON pulse width
Output delay time (1)
Output delay time (2)
Output delay time (3)
Output delay time (4)
Output delay time (5)
t
C
L
C
L
C
L
C
L
C
L
C
L
= 300 pF
= 30 pF
100
⎯
⎯
t
250
800
800
10
pdDO
ns
t
= 300 pF
= 300 pF
= 300 pF
= 30 pF
⎯
pdG
t
t
⎯
pdOE
pdON
⎯
μs
t
⎯
50
ns
dlO
t
t
CPVL
CPVH
CPVL/R
50%
50%
50%
50%
50%
t
t
hDI
sDI
DI/O, DO/I
(Input)
50%
50%
t
t
t
pdG
pdG
pdG
V
V
GG
EE
G1
50%
50%
t
pdG
V
V
GG
EE
G2 to G300
50%
50%
CPVL/R
G300
50%
50%
V
V
GG
EE
t
t
pdDO
pdDO
DO/I, DI/O
(Output)
50%
50%
t
wOE
50%
50%
OE
t
t
pdOE
pdOE
V
V
GG
EE
G1 to G300
50%
50%
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2006-09-20
T6LE2
t
wON
XDON
50%
50%
t
t
pdON
pdON
V
V
GG
EE
G1 to G300
50%
50%
t
t
fIN
rIN
Input
OE L/R, CPVL/R
80%
20%
50%
50%
20%
t
t
dlO
dlO
Output
OE L/R, CPVL/R
50%
50%
Power Supply Sequence
Turn power on in the order V
DD
→ V
EE
→ Input signal → V . Turn power off in th reverse order.
GG
However, if can be turned off at the same time, V , V , Input signals and V
GG DD EE
under the condition of
V
EE
≤ V ≤ Input signals ≤ V
SS DD
≤ V .
GG
The T6LE2 has a self Power on reset function. Keep the reset period : T ≥ 10μs
rG
T
rG
V
GG
V
DD
V
SS
V
EE
Instruction for operating circumstances
• Light striking a semiconductor device can generate electromotive force due to photoelectric effects. In some cases
this may cause the device to malfunction.
This is more likely to be affected for the devices in which the surface (back), or side of the chip is exposed. At the
design phase, please make sure that devices are protected against incident light from external sources. Please take
into account of incident light from external sources during actual operation and during inspection.
• Polyimide base film is hard and thin. Be careful not to injure yourself on the film or to scratch any other parts with the
film. Please design and manufacture products so that there is no chance of users touching the film after assembly, or
if they do that, there is no chance of them injuring themselves. When cutting out the film, please ensure that the film
shavings do not cause accidents. After use, please treat the leftover film and reel spacers as industrial waste.
11
2006-09-20
T6LE2
RESTRICTIONS ON PRODUCT USE
• The information contained herein is subject to change without notice. 021023_D
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability
Handbook” etc. 021023_A
• The TOSHIBA products listed in this document are intended for usage in general electronics applications
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,
etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc. Unintended Usage of TOSHIBA products listed in this
document shall be made at the customer’s own risk. 021023_B
• The products described in this document shall not be used or embedded to any downstream products of which
manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_Q
• The information contained herein is presented only as a guide for the applications of our products. No
responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of
TOSHIBA or others. 021023_C
• Please use this product in compliance with all applicable laws and regulations that regulate the inclusion or use of
controlled substances.
Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws
and regulations.
• The products described in this document are subject to foreign exchange and foreign trade control laws. 021023_E
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2006-09-20
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