TB62216FTG [TOSHIBA]
Brushed DC Motor Driver ICs (Bridge Drivers), TB62216FTG;型号: | TB62216FTG |
厂家: | TOSHIBA |
描述: | Brushed DC Motor Driver ICs (Bridge Drivers), TB62216FTG 电动机控制 CD |
文件: | 总24页 (文件大小:482K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TB62216FTG
TOSHIBA BiCD Integrated Circuit Silicon Monolithic
TB62216FTG
PWM Chopper-Type Motor Driver IC
The TB62216FTG is a motor driver using internal PWM signals.
The TB62216FTG is capable of driving 2 DC brushed motors.
Fabricated with the BiCD process, the TB62216FTG is rated at 40V/2.5A.
The internal voltage regulator allows control of the motor with a single
VM power supply.
Features
QFN48-P-0707-0.50
Package weight: 0.14g (typ)
・Monolithic IC by using BiCD process
・PWM controlled constant-current drive
・Low on-resistance of output stage transistor is low by using BiCD process.
・High Voltage and current (For specification, please refer to absolute maximum ratings and operation ranges)
・Thermal shutdown (TSD)、over-current shutdown (ISD), abnormally current detection (VRS) and power-on reset (POR)
・Built-in regulator allows the TB62216FTG to function with only VM power supply.
・Able to customize PWM signal frequency by external condenser.
・Package: QFN48-P-0707-0.50
Note) Please be careful about thermal conditions during use.
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TB62216FTG
Block Diagram
IN_A1
IN_A2
PWM_A
PWM_B
IN_B1
VMR
VCC
VCC_REG
Control Logic
IN_B2
Chopper OSC
OSC
OSCM
TBLK_A
TBLK_B
VREF
Current Level Control
CR-CLK
Converter
Current Feedback
VM
VRS
Output Control
RS COMP
RS_A
RS_B
ISD
TSD
Output
(H-Bridge ×2)
ENABLE
VMR
Detect
VM
Detection Circuit
Stepping
Motor
* Please note that in the block diagram, functional blocks or constants may be omitted or simplified for explanatory purposes.
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TB62216FTG
Notes:
All the grounding wires of the TB62216FTG must run on the solder within the mask of the PCM. It must also be
externally terminated at a single point. Also, the grounding method should be considered for efficient heat
dissipation.
Logic input pins must be correctly wired. While using switches to control input levels, make sure to pull up to VCC
or pull down to GND to avoid high impedance.
Please take extra care while tracing the layout of the VM, GND and output patterns to avoid shortage across output, GND
or power supplies. If such shortage occurs, the TB62216FTG may be permanently damaged.
The utmost care should also be taken for pattern designing and implementation of the TB62216FTG. If power-relevant pins such as
VM, RS, OUT, and GND (which is capable of running particularly large current) are wired incorrectly, an operation error may occur or
the TB62216FTG may be destroyed.
The logic input pins must also be wired correctly. Otherwise, the TB62216FTG may be damaged by a current
larger than the specified current running through the IC.
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TB62216FTG
Pin assignment (TB62216FTG)
(Top View)
34
31
28
30 29 27 26 25
33 32
36
35
24
23
22
NC
37
38
39
NC
NC
NC
NC
GND
21
20
19
18
17
16
15
14
13
OUT_B-
40
41
42
43
44
45
46
47
48
GND
OUT_B-
GND
VREF
TBLK_A
OSCM
TB62216FTG
GND
OUT_A-
OUT_A-
IN_A1
IN_A2
GND
NC
PWM_A
PWM_B
NC
NC
3
6
9
12
10 11
1
2
4
5
7
8
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TB62216FTG
Pin Function
TB62216FTG (QFN48)
Function explanation
Pin No.
Pin Name
Function
Pin No.
Pin Name
NC
Function
1
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
NC
IN_B1
IN_B2
TBLK_B
GND
NC
Not connected
Not connected
2
Bridge B excitation control input
Bridge B excitation control input
Bridge B Digital tBLK input
Ground pin for Logic input
Not connected
OUT_B Bridge B + output
OUT_B Bridge B + output
3
4
NC
RS_B
RS_B
NC
Not connected
5
Bridge B sense output
Bridge B sense output
Not connected
6
7
RS_A
RS_A
NC
Bridge A sense output
Bridge A sense output
Not connected
8
VM
Motor Voltage supply
Not connected
9
NC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
OUT_A
OUT_A
NC
Bridge A + output
VCC
NC
Internal regulator voltage monitor
Not connected
Bridge A + output
Not connected
NC
Not connected
NC
Not connected
NC
Not connected
NC
Not connected
NC
Not connected
GND
Ground pin for Bridge A
NC
Not connected
OUT_A- Bridge A – output
OUT_A- Bridge A – output
GND
VREF
Ground pin for Logic input
Current customize for Bridge A and B
GND
GND
Ground pin for Bridge A
Ground pin for Bridge B
TBLK_A Bridge A Digital tBLK input
OSCM
IN_A1
IN_A2
Oscillator pin for internal PWM signal
OUT_B- Bridge B - output
OUT_B- Bridge B - output
Bridge A excitation control input
Bridge A excitation control input
GND
NC
Ground pin for Bridge B
PWM_A Bridge A short brake input
PWM_B Bridge B short brake input
Not connected
Not connected
NC
NC
Not connected
・Please do not connect any pattern to the NC pin.
・Please connect the pins with the same names, at the nearest point of the device.
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TB62216FTG
Logic Input Function Table
(1) IN_A1, IN_A2 (Bridge A Controller)
Setting the drive mode of Bridge A
PWM_A
IN_A1
IN_A2
L
OUT_A
OUT_A-
Function
L
H
L
OFF
(High impedance)
OFF
(High impedance)
L
STOP(OFF)
L
L
L
H
L
H
L
L
Short brake
CCW
L
H
H
H
L
H
L
INPUT
Short brake
CW
H
L
H
L
L
Short brake
H
(2) IN_B1, IN_B2 (Bridge B Controller)
Setting the drive mode of Bridge B
PWM_B
IN_B1
IN_B2
L
OUT_B
OUT_B-
Function
L
H
L
OFF
(High impedance)
OFF
(High impedance)
L
Stop(OFF)
L
L
L
H
L
H
L
L
Short brake
CCW
L
H
H
H
L
H
L
INPUT
Short brake
CW
H
L
H
L
L
Short brake
H
(3) TBLK_A,B (Digital tBLK Controller)
Setting the noise reject timer
Name
Function
Input
Low
High
Note
OSCM*4clk
OSCM*6clk
TBLK_A,B
Digital tBLK (Noise Reject timer)
Equivalent Input Circuit
CC
INPUT
IN_A1
IN_A2
150 Ω ±30%
IN_B1
INPUT
IN_B2
PWM_A
PWM_B
TBLK_A
TBLK_B
100k Ω ±30%
GND
Please note that in the equivalent input circuit, functional blocks or constants may be omitted or simplified for explanatory purposes.
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TB62216FTG
■The example of combination of H-SW in each motor drive mode (the H-SW Connection)
●Connection example for 1 DC Motor
VM
Bridge A
R
RS
RS_A
OUT_A
OUT_A-
GND
Please note that the functional blocks or constants may be omitted or simplified for explanatory purposes.
・Current feedback and current level set circuits
Note: Logic input pins are pulled down by 100k Ω internally; be sure to short unused logic pins to GND to avoid operation error.
VCC Power
on Reset
VM Power on
Reset
Internal
VM
Regulator
VREF
RS_A/B
RS Comparator
VRS Detect
Current
Feedback
Circuit
IN_A1/A2
IN_B1/B2
TBLK_A/B
PWM_A
PWM_B
Logic
OSCM
Oscillator
ISD
H-Bridge
Controller
Motor
Output
TSD
Error detect
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TB62216FTG
Equivalent Output Circuit (Bridge A, B)
VM
VM
RS_A
RRS_A
U1
U2
From Logic
PreDriver
OUT_A
M
L1
L2
OUT_A-
RS_B
RRS_B
U1
U2
From Logic
PreDriver
OUT_B
M
L1
L2
OUT_B-
GND
Please note that the functional blocks or constants may be omitted or simplified for explanatory purposes.
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TB62216FTG
1.Digital tBLK Function
TBLK
Blanking time
L
Digital tBLK = OSCM×4clk
Digital tBLK = OSCM×6clk
H
Count synchronize
timing
IN_1/IN_2
OSCM
TBLK
count
0
2
3
1
4
5
6
Digital tBLK
signal
Digital tBLK
(TBLK=L)
Digital tBLK
signal
Digital tBLK
(TBLK=H)
Please note that the timing charts or constants may be omitted or simplified for explanatory purposes.
The digital tBLK is used to avoid error judgment of varistor recovery current that occurs in charge
drive mode when H-bridges are used with DC motors. The digital tBLK time can be controlled through
TBLK_A and TBLK_B pins.
By setting digital tBLK, direct PWM control and constant-current control is possible, but the
motor current will rise above the predefined current level (NF) while digital tBLK is active.
Besides digital tBLK, analog tBLK settled by an internal constant of IC is also attached.
2.DC Motor Control Signal Function
PWM_A
IN_A1
L
IN_A2
L
OUT_A
OUT_A-
Function
L
H
L
OFF
(High impedance)
OFF
(High impedance)
STOP(OFF)
L
L
L
H
L
H
L
L
Short brake
CCW
L
H
H
H
L
H
L
INPUT
Short brake
CW
H
L
H
L
L
Short brake
H
OUT_X
OUT_X
OUT_X-
OUT_X-
CW
CCW
Please note that the functional blocks or constants may be omitted or simplified for explanatory purposes.
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TB62216FTG
● Absolute Maximum Ratings (Ta=25°C)
Characteristics
Symbol
Rating
Unit
Note
Motor power supply
Motor output voltage
VM
40
40
V
V
VOUT
2.5
A
* 1: per 1 H-SW
IOUT
Motor output current
RS pin voltage
5.0
A
V
*2: (tw≤500ns)
IOUT(peak)
VRS
VM ± 4.5
Logic power supply
Logic input voltage
VCC
VIN
6
V
V
V
-0.4 to 6.0
GND to 4.2V
*3
*4
VREF reference voltage
VREF
Power dissipation
Operating temperature
Storage temperature
Junction temperature
PD
1.3
W
°C
°C
°C
−20 to 85
−55 to 150
150
Topr
Tstg
Tj
*1: Motor output current is per 1 H-SW. While in use, please make sure that the motor current is controlled to be under 80 %
of the absolute maximum ratings. (In this case, about 2.0A (max) per 1 H-SW).
*2: Motor output current peak width must be less than 500ns
*3: Logic input voltage must be input less than 6.0V
*4: The value in the state where it is not mounted on the board
Ta: Ambient temperature.
Topr: Operating ambient temperature.
Tj: Operating junction temperature. The maximum junction temperature is limited by the thermal shutdown.
Note: The absolute maximum ratings
The absolute maximum ratings are a specification that must not be exceeded, even for a moment.
Exceeding the ratings may cause device breakdown, damage or deterioration, and may result in injury by
explosion or combustion.
Operating Ranges (Ta=0 to 85°C)
Characteristics
Symbol
VM
Note
Min
10
Typ
24
Max
38
Unit
V
Motor power supply
Ta=25°C, per 1 H-SW
(tw≤500ns)
-
1.2
1.2
2.0
4.0
A
A
IOUT
Motor output current
Logic input voltage
-
I
OUT(peak)
VIN(H)
VIN(L)
Logic [High] level
Logic [Low] level
2.0
3.3
-
5.5
0.8
V
V
GND
PWM signal frequency
VREF reference voltage
fchop
VM=24V
VM=24V
40
100
3.0
150
4.0
kHz
V
VREF
GND
Note: Use the maximum junction temperature (Tj) at 120°C or less.
The maximum current cannot be used under certain thermal conditions.
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TB62216FTG
Electrical Specifications 1 (Ta=25°C, VM=24V, unless specified otherwise)
Characteristics
Symbol
VIN(H)
VIN(L)
Test condition
Min
2.0
Typ
-
Max
5.4
Unit
V
High
Low
Logic input voltage
Logic input pins
GND
-0.4
GND
0.8
Logic input hysteresis voltage
Logic input current
Hys
Logic input pins
VIN(H)
0.1
-
-
0.2
50
-
0.3
70
V
IIN(H)
IIN(L)
μA
VIN(L)
1.0
Outputs: open
IN_A1/A2/B1/B2:L
fchop=100kHz
Output off
Power consumption
IM
-
5.0
7.0
mA
VRS=VM=24V, Vout=0V,
(IN_A1,IN_A2)=(L,L)
(IN_B1,IN_B2)=(L,L)
μA
High-side
IOH
−1
-
-
Output leakage current
VRS=VM=Vout=24V,
(IN_A1,IN_A2)=(L,L)
(IN_B1,IN_B2)=(L,L)
μA
Low-side
IOL
1
5
-
-
-
Bridge A,B current
differential, Iout=2.0A
Bridge-to-Bridge current differential
⊿Iout1
−5
%
Output current error relative to the
predetermined value
⊿Iout2
⊿VRS
Iout=2.0A
-
−5
-
5
%
V
RS pin voltage
0
0.6
0.8
VM=VRS=24V
IN_A1/A2/B1/B2:L
μA
RS pin current
IRS
-
-
-
10
Drain-source ON-resistance
(The sum of high side & low side)
Ron(D-S)
Iout=2.0A, Tj=25°C
1.0
1.5
Ω
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TB62216FTG
Electrical Specifications 2 (Ta=25°C, VM=24V, unless specified otherwise)
Characteristics
Internal regulator voltage
Internal regulator current
VREF input voltage
Symbol
VCC
Test condition
ICC=5.0mA
Min
4.75
-
Typ
5.0
2.5
3.0
-
Max
5.25
5.0
4.0
10
Unit
V
ICC
-
mA
V
VREF
VM=24V, Output: OFF
VREF=3.0V, Output: ON
VREF=3.0V, Output: ON
(Note 1)
GND
0
μA
-
°C
V
VREF input current
IREF
VREF gain rate
VREF(gain)
Tj TSD
VCCPOR
VMPOR
ISD
1/5.3
140
2.0
1/5.1
150
3.0
-
1/4.9
160
4.0
8.0
4.6
-
TSD threshold
VCC power on reset voltage
VM power on reset voltage
Over current threshold
Over voltage threshold
VM=24V
6.0
V
Fchop=100kHz (Note 2)
VM-RS pin voltage
2.6
3.6
1.5
A
VRS det
0.9
V
Note 1:
Note 2:
Thermal shutdown (TSD) circuit
When the junction temperature of the device reaches the TSD threshold, the TSD circuit is triggered; the
internal reset circuit then turns off the output transistors. The TSD circuit threshold is between 140 oC (min) and
160 oC (max). Once the TSD circuit is triggered, the device keeps the output off until power-on reset (POR), is
reasserted.
Over-current/voltage shutdown (ISD/VRS) circuit
When the output current or the RS pin voltage reaches the threshold, the ISD circuit is triggered; the internal
reset circuit then turns off the output transistors. Once the ISD circuit is triggered, the device keeps the output
off until power-on reset (POR), is reasserted. For fail-safe, please insert a fuse to avoid secondary trouble.
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TB62216FTG
AC Electrical Specifications (Ta=25°C, VM=24V, 6.8mH+5.7 Ω )
Characteristics
Symbol
fLogic
Test condition
Min
-
Typ
-
-
-
-
0.2
0.2
1
Max
200
-
Unit
kHz
Logic input frequency
fOSCM=1600kHz
tw(tLogic)
twp
100
50
Minimum phase pulse width
ns
-
-
twn
50
-
tr
-
-
-
tf
-
-
tpLH(IN_X)
tpHL(IN_X)
tpLH(OSC)
tpHL(OSC)
-
-
Output transistor switching
characteristics
Phase to OUT
OSC to OUT
µs
1.5
0.5
1
-
-
-
-
-
-
Iout=0.6A,VM=24V
Analog tBLK
Analog blanking time for current
spike elimination
AtBLK
250
400
2.5
550
ns
µs
µs
TBLK:L, fOSCM=1600kHz
DtBLK(L)
DtBLK(H)
-
-
-
-
Digital tBLK
Digital blanking time for current
spike elimination
TBLK:H, fOSCM=1600kHz
3.75
Digital tBLK
OSC oscillation reference frequency
Chopping frequency
fOSCM
Ω
1.2
1.6
2.0
MHz
kHz
C=270pF, R=3.6k
fchop
100
-
-
fOSCM=1.6MHz
twp
twn
90%
90%
twLOGIC
VIN/OSCM
50%
50%
10%
10%
tpLH
90%
50%
10%
90%
50%
tPHL
10%
tr
GND
tf
Fig.1 Timing Charts of Input Phase Signal and Output Transistor Switching
Timing charts may be simplified for explanatory purpose.
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TB62216FTG
Calculation of the Predefined Output Current
The peak output current can be set via the current-sensing resistor (RRS) and the reference voltage (VREF), as follows:
VREF ×VREF(gain)
IOUT
=
RRS
VREF (gain) is Vref reduction rate that is a fixed value of 1/5.1. For example, to calculate the motor output current threshold:
3.0(V)×1/5.1
IOUT
=
=1.15(A)
0.51(Ω)
1/5.1 is the VREF gain rate. For the value of VREF gain rate, see the Electrical Characteristics Table.
Calculation of the chopping frequency
The chopping frequency is 1/16 of fOSCM. When fOSCM is 1600 kHz, the chopping frequency is as follows:
fchop = fOSCM / 16 = 1600/16 = 100 (kHz)
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TB62216FTG
IC Power Consumption
The power consumed by the TB62216FTG is approximately the sum of the following:
(1) the power consumed by the output transistors
(2) the power consumed by the digital logic and pre-drivers.
(1) The power consumed by the output transistors is calculated, using the RON (D-S) value of 1.0 Ω .
Whether in Charge, Fast Decay or Slow Decay mode, two of the four transistors comprising each H-bridge contribute to its power
consumption at a given time.
Thus the power consumed by each H-bridge is given by:
P OUT=H-Bridge(ch)×IOUT(A)×VDS(V)= 1×IOUT2×RON................................. (1)
In two-phase excitation mode (in which two phases have a phase difference of 90°), the average power consumption
in the output transistors is calculated as follows:
RON=1.0 Ω
I
OUT(peak:typ)=1.0A
P OUT=1( ch )×1.02(A)×1.0( Ω )=1.0(W) .............................................................. (2)
(2) The power consumption in the IM domain is calculated separately for normal operation and standby modes:
Normal operation mode: IM=5.0mA (typ.)
The current consumed in the digital logic portion of the TB62216FTG is indicated as IM. The digital logic operates off a voltage
regulator internally connected to the VM power supply. It consists of the digital logic connected to VM(24V) and the network affected
by the switching of the output transistors. The total power consumed by IM can be estimated as:
P IM=24(V)×0.005(A)=0.12(W) .............................................................................. (3)
3)The total power consumption of the TB62216FTG
From the result of the two above-mentioned formulas
P=P OUT+P(IM)=1.12(W)
Board design should be fully verified, taking thermal dissipation into consideration.
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TB62216FTG
Current figures of Mixed Decay Mode
The regeneration after reaching setup current is controlled in the order of Fast->Slow (fast decay Æ slow decay).
The timing from fast regeneration to slow regeneration is 37.5% fixation of fchop.
fchop (OSCM×16)
OSCM
Fchop
11
12 13
14
15
0
2
3
8
9
10
1
4
5
6
7
count
MDT:16clk×37.5%=6clk
NF
NF
Motor
Output
Current
MDT
Charge Mode → NF: (set-up current value) → Slow
Mode → Mixed Decay Timing → Fast Mode
*
NF
NF
Motor
Output
Current
MDT
Charge Mode → NF: (set-up current value)
→ Mixed Decay Timing → Fast Mode
Note: About Mixed Decay Timing
Mixed Decay Timing (MDT) is a unique value of the TB62216FTG (fchop×37.5%), but when the motor output current
reaches NF (Itrip) threshold after MDT, the rest of fchop (*) becomes fast decay mode.
Timing charts may be simplified for explanatory purposes.
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TB62216FTG
Output Transistor Operation Mode
VM
VM
RS
VM
RRS
RRS
RRS
RS
RS
U1
U2
L2
U1
U2
U1
U2
L1
L1
L2
L1
L2
GND
GND
GND
Charge
Short brake
Power supply recovery
Some of the functional blocks, circuits, or constants omitted or simplified for explanatory purpose.
Output Transistor Operational Function
Mode
U1
L1
U2
L2
Charge
ON
OFF
OFF
OFF
ON
ON
OFF
OFF
ON
ON
ON
Slow/Short brake
Power supply recovery
OFF
Note: The parameters shown in the table above are examples when the current flows in the directions shown in the figures above.
For the current flowing in the reverse direction, the parameters change as shown in the table below.
Mode
U1
L1
U2
L2
Charge
OFF
OFF
ON
ON
ON
ON
OFF
OFF
OFF
ON
ON
Slow/Short brake
Power supply recovery
OFF
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TB62216FTG
Over Current Detection (ISD) and Over Voltage of RS detection of (VRS) features
・Detect timing
Count synchronize
timing
ISD/VRS
detect signal
OSCM
ISD/VRS
count
3
0
1
4
5
2
Output transistor
off signal
OFF
(TBLK=L)
Output transistor
off signal
OFF
(TBLK=H)
Timing charts may be simplified for explanatory purpose.
Over Current Eetection (ISD) and Over Voltage of RS detection (VRS) have blanking time to reject irr, switching noise
and inrush current. This blanking time is based on the internal OSC (OSCM) frequency.
ISD, VRS blanking time = OSCM × 3CLK
After detecting ISD / VRS, the detect signal and the internal OSC (OSCM) synchronizes for count up; therefore,
the output transistor is turned off after additional 1 CLK (max).
ISD, VRS detection time = OSCM × 4CLK
ISD and VRS do not necessarily guarantee complete IC safety. If the device is used beyond the specified
operating ranges, these circuits may not operate properly; then the device may be owing to an output
short circuit.
To avoid secondary trouble, please insert fuse to VM line for fail-safe.
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TB62216FTG
●tBLK (blanking time for noise cancellation) features
Two types of dead time (blanking time) are incorporated according to the motor driver structures mainly to prevent error operation due
to noise caused by switching.
<Digital tBLK>
The digital tBLK is used to avoid error judgment of varistor recovery current that occurs in charge drive mode when H-bridges are used
with DC motors. The digital tBLK time can be controlled through TBLK_A and TBLK_B pins.
・TBLK_A/B=Low level: OSCM×4clk
・TBLK_A/B=High level: OSCM×6clk
The digital tBLK is based on the internal oscillator (OSCM) frequency; therefore if the OSCM is changed by the
constant(s), the digital tBLK time will also change.
<Analog tBLK>
“The dead time for noise cancellation (analog tBLK)” specified according to the motor block AC characteristics is a fixed time
incorporated in the TB62216FTG. This is mainly used for avoiding error judgment of irr (diode recovery current). The analog tBLK time
is a unique value of the TB62216FTG (internal timer of the TB62216FTG) controlled by an inserted low-pass filter with a fixed time of
400 ns (typ.).
● Digital tBLK timing for DC motor
IN1
IN2
Iout
Digital tBLK
The digital tBLANK is inserted at the beginning of each charge period of the constant current chopping, and also when
the IN_1 or IN_2 is switched.
Timing charts may be simplified for explanatory purpose.
2012-03-29
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TB62216FTG
Application Circuit Example
TB62216FTG (QFN48)
0.51 Ω
0.1µF
3.6k Ω
NC
NC
NC
NC
NC
GND
270pF
OUT_B-
GND
VREF
OUT_B-
GND
100µF
TBLK_A
OSCM
TB62216FTG
GND
OUT_A-
OUT_A-
0.1µF
IN_A1
IN_A2
H
L
GND
NC
PWM_A
PWM_B
NC
NC
H
L
0.51 Ω
The application circuit above is an example; therefore, mass-production design is not guaranteed.
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TB62216FTG
Package Dimensions
QFN48-P-0707-0.50
Unit :mm
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TB62216FTG
Notes on Contents
Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory
purposes.
Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
Timing Charts
Timing charts may be simplified for explanatory purposes.
Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is
required at the mass production design stage. Toshiba does not grant any license to any industrial property rights by
providing these examples of application circuits.
Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components and
circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a
moment. Do not exceed any of these ratings.Exceeding the rating(s) may cause device breakdown, damage or
deterioration, and may result in injury by explosion or combustion.
Use an appropriate power supply fuse to ensure that a large current does not continuously flow in the case of
over-current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute
maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or
load, causing a large current to continuously flow and the breakdown can lead to smoke or ignition. To minimize the
effects of the flow of a large current in the case of breakdown, appropriate settings, such as fuse capacity, fusing time
and insertion circuit location, are required.
If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to
prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the
negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or
ignition. Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the
protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition.
Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of
power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute
maximum rating, and exceeding the rating(s) may cause device breakdown, damage or deterioration, and may result
in injury by explosion or combustion. In addition, do not use any device that has been inserted incorrectly.
Please take extra care when selecting external components (such as power amps and regulators) or external devices (for
instance, speakers). When large amounts of leak current occurs from capacitors, the DC output level may increase. If the
output is connected to devices such as speakers with low resist voltage, overcurrent or IC failure may cause smoke or
ignition. (The over-current may cause smoke or ignition from the IC itself.) In particular, please pay attention when
using a Bridge Tied Load (BTL) connection-type IC that inputs output DC voltage to a speaker directly.
2012-03-29
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TB62216FTG
Points to remember on handling of ICs
Over current Protection Circuit
Over current protection circuits (referred to as current limiter circuits) do not necessarily protect ICs under all
circumstances. If the Over current protection circuits operate against the over current, clear the over current status
immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the over
current protection circuit to not operate properly or IC breakdown before operation. In addition, depending on the
method of use and usage conditions, if over current continues to flow for a long time after operation, the IC may
generate heat resulting in breakdown.
Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits
operate against the over temperature, clear the heat generation status immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the
thermal shutdown circuit to not operate properly or IC breakdown before operation.
Heat Radiation Design
In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is
appropriately radiated, not to exceed the specified junction temperature (TJ) at any time and condition. These ICs
generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life,
deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the
effect of IC heat radiation with peripheral components.
Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s power
supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s motor
power supply and output pins might be exposed to conditions beyond absolute maximum ratings. To avoid this problem,
take the effect of back-EMF into consideration in system design.
2012-03-29
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TB62216FTG
RESTRICTIONS ON PRODUCT USE
•
•
•
Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in
this document, and related hardware, software and systems (collectively “Product”) without notice.
This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA’s
written permission, reproduction is permissible only if reproduction is without alteration/omission.
Though TOSHIBA works continually to improve Product’s quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury
or damage to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or
incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant
TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product
and the precautions and conditions set forth in the “TOSHIBA Semiconductor Reliability Handbook” and (b) the instructions for the
application with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or
applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b)
evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms,
sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and
applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS’ PRODUCT DESIGN OR APPLICATIONS.
•
Product is intended for use in general electronics applications (e.g., computers, personal equipment, office equipment, measuring
equipment, industrial robots and home electronics appliances) or for specific applications as expressly stated in this document. Product
is neither intended nor warranted for use in equipment or systems that require extraordinarily high levels of quality and/or reliability
and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage or serious public impact
(“Unintended Use”). Unintended Use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace
industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment,
equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and
equipment used in finance-related fields. Do not use Product for Unintended Use unless specifically permitted in this document.
•
•
Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part.
Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any
applicable laws or regulations.
•
•
The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any
infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to any
intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise.
ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS OF SALE
FOR PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO LIABILITY WHATSOEVER,
INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL, SPECIAL, OR INCIDENTAL DAMAGES OR LOSS, INCLUDING
WITHOUT LIMITATION, LOSS OF PROFITS, LOSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND LOSS OF DATA, AND
(2) DISCLAIMS ANY AND ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO SALE, USE OF PRODUCT,
OR INFORMATION, INCLUDING WARRANTIES OR CONDITIONS OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, ACCURACY OF INFORMATION, OR NONINFRINGEMENT.
•
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Do not use or otherwise make available Product or related software or technology for any military purposes, including without limitation,
for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology
products (mass destruction weapons). Product and related software and technology may be controlled under the Japanese Foreign
Exchange and Foreign Trade Law and the U.S. Export Administration Regulations. Export and re-export of Product or related software or
technology are strictly prohibited except in compliance with all applicable export laws and regulations.
Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product.
Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances,
including without limitation, the EU RoHS Directive. TOSHIBA assumes no liability for damages or losses occurring as a result of
noncompliance with applicable laws and regulations.
2012-03-29
24
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