TC55VZM216AJGI08 [TOSHIBA]
IC 256K X 16 CACHE SRAM, 8 ns, PDSO44, PLASTIC, SOJ-44, Static RAM;
| 型号： | TC55VZM216AJGI08 |
| 厂家： | 
TOSHIBA |
| 描述： | IC 256K X 16 CACHE SRAM, 8 ns, PDSO44, PLASTIC, SOJ-44, Static RAM 静态存储器 光电二极管 |
| 文件： | 总11页 (文件大小：184K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TC55VZM216AJGI/ATGI08,10,12
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
262,144-WORD BY 16-BIT CMOS STATIC RAM
DESCRIPTION
The TC55VZM216AJGI/ATGI is a 4,194,304-bit high-speed static random access memory (SRAM) organized as
262,144 words by 16 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high
speed, it operates from a single 3.3 V power supply. Chip enable (CE ) can be used to place the device in a
low-power mode, and output enable ( OE ) provides fast memory access. Data byte control signals ( LB , UB ) provide
lower and upper byte access. This device is well suited to cache memory applications where high-speed access and
high-speed storage are required. All inputs and outputs are directly LVTTL compatible. The
TC55VZM216AJGI/ATGI is available in plastic 44-pin SOJ and TSOP with 400mil width for high density surface
assembly. The TC55VZM216AJGI/ATGI guarantees −40° to 85°C operating temperature so it is suitable for use in
wide operating temperature system.
FEATURES
•
•
•
•
•
•
Single power supply voltage of 3.3 V 0.3 V
Fully static operation
•
Fast access time (the following are maximum values)
TC55VZM216AJGI/ATGI08:8 ns
TC55VZM216AJGI/ATGI10:10 ns
TC55VZM216AJGI/ATGI12:12 ns
Low-power dissipation
Operating temperature range of −40° to 85°C
All inputs and outputs are LVTTL compatible
Output buffer control using OE
Data byte control using LB (I/O1 to I/O8) and
UB (I/O9 to I/O16)
•
(the following are maximum values)
Cycle Time
8
10
12
ns
•
Package:
SOJ44-P-400-1.27 (AJGI)
(Weight: 1.64 g typ)
Operation (max) 120
100
90
mA
TSOP II44-P-400-0.80 (ATGI) (Weight: 0.45 g typ)
Standby:10 mA (both devices)
PIN ASSIGNMENT (TOP VIEW)
44 PIN SOJ 44 PIN TSOP
PIN NAMES
A0 to A17
Address Inputs
A4
1
2
3
4
5
6
7
8
9
44 A5
43 A6
42 A7
A4
A3
A2
A1
A0
CE
I/O1
I/O2
I/O3
I/O4
VDD
GND
I/O5
I/O6
I/O7
I/O8
WE
A15
A14
A13
A12
A16
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O1 to I/O16 Data Inputs/Outputs
A3
A2
A1
A0
2
3
CE
WE
Chip Enable Input
Write Enable Input
Output Enable Input
Data Byte Control Inputs
Power (+3.3 V)
41
40
39
4
OE
UB
LB
5
6
CE
I/O1
I/O2
I/O3
I/O4 10
VDD 11
GND 12
I/O5 13
I/O6 14
I/O7 15
I/O8 16
38 I/O16
37 I/O15
36 I/O14
35 I/O13
34 GND
33 VDD
7
I/O16
I/O15
I/O14
I/O13
GND
VDD
OE
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
LB , UB
V
DD
32 I/O12
31 I/O11
30 I/O10
29 I/O9
28 NU
I/O12
I/O11
I/O10
I/O9
NU
GND
NU
Ground
Not Usable (Input)
17
WE
A15 18
A14 19
A13 20
A12 21
A16 22
27 A8
A8
26 A9
A9
25 A10
24 A11
23 A17
A10
A11
A17
(TC55VZM216ATGI)
(TC55VZM216AJGI)
2002-03-14 1/11
TC55VZM216AJGI/ATGI08,10,12
BLOCK DIAGRAM
A0
A1
A4
V
DD
A5
A8
GND
MEMORY CELL ARRAY
1,024 × 256 × 16
(4,194,304)
A9
A13
A14
A15
A17
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
CE
SENSE AMP
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
I/O16
COLUMN DECODER
CE
COLUMN ADDRESS BUFFER
CLOCK
GENERATOR
A2 A3 A6 A7 A10 A11 A12 A16
WE
OE
UB
LB
CE
CE
MAXIMUM RATINGS
SYMBOL
RATING
VALUE
UNIT
V
V
V
P
Power Supply Voltage
−0.5 to 4.6
V
V
DD
IN
Input Terminal Voltage
Input/Output Terminal Voltage
Power Dissipation
−0.5* to 4.6
−0.5* to V
+ 0.5**
DD
V
I/O
D
1.4
W
°C
°C
T
T
Storage Temperature
Operating Temperature
−65 to 150
−40 to 100
stg
opr
*: −1.5 V with a pulse width of 20%･t
min (4 ns max)
RC
**: V
+ 1.5 V with a pulse width of 20%･t
min (4 ns max)
RC
DD
2002-03-14 2/11
TC55VZM216AJGI/ATGI08,10,12
DC RECOMMENDED OPERATING CONDITIONS (Ta = −40° to 85°C)
SYMBOL
PARAMETER
Power Supply Voltage
MIN
TYP
MAX
3.6
UNIT
V
V
V
3.0
2.0
3.3
V
V
V
DD
Input High Voltage
Input Low Voltage
V
+ 0.3**
DD
IH
IL
−0.3*
0.8
*: −1.0 V with a pulse width of 20%･t
min (4 ns max)
RC
**: V
+ 1.0 V with a pulse width of 20%･t
min (4 ns max)
RC
DD
DC CHARACTERISTICS (Ta = −40° to 85°C, V = 3.3 V 0.3 V)
DD
SYMBOL
PARAMETER
TEST CONDITION
MIN
TYP MAX UNIT
Input Leakage Current
(Except NU pin)
I
I
I
V
= 0 to V
DD
−1
1
1
1
µA
µA
µA
IL
IN
Output Leakage
Current
CE = V or WE = V or OE = V
V
,
IH
IL
IH
−1
LO
= 0 to V
OUT
DD
Input Leakage Current
(NU pin)
V
= 0 V
−1
I (NU)
IN
I
I
I
I
= −2 mA
2.4
OH
OH
OL
OL
V
V
Output High Voltage
Output Low Voltage
OH
OL
= −100 µA
= 2 mA
V
− 0.2
DD
V
0.4
0.2
120
= 100 µA
t
t
t
= 8 ns
cycle
cycle
cycle
CE = V , I
= 0 mA,
IL OUT
I
Operating Current
Standby Current
mA
mA
= 10 ns
= 12 ns
100
90
OE = V
,
DDO
IH
Other Input = V /V
IH IL
I
I
CE = V , Other Input = V or V
35
DDS1
DDS2
IH
IH
IL
CE = V
− 0.2 V, Other Input = V − 0.2 V or 0.2 V
10
DD
DD
CAPACITANCE (Ta = 25°C, f = 1 .0 MHz)
SYMBOL
PARAMETER
TEST CONDITION
MAX
UNIT
C
C
Input Capacitance
Input/Output Capacitance
V
V
= GND
6
8
pF
pF
IN
IN
= GND
I/O
I/O
Note: This parameter is periodically sampled and is not 100% tested.
2002-03-14 3/11
TC55VZM216AJGI/ATGI08,10,12
OPERATING MODE
MODE
CE
L
OE
L
WE
H
LB
UB
I/O1 to I/O8
Output
I/O9 to I/O16
Output
POWER
L
H
L
L
H
L
*
L
L
H
L
L
H
*
I
I
I
I
I
I
DDO
DDO
DDO
DDO
DDO
DDO
Read
High Impedance
Output
Output
High Impedance
Input
Input
Write
L
*
L
High Impedance
Input
Input
High Impedance
L
L
H
*
H
*
Outputs Disable
High Impedance
High Impedance
High Impedance
High Impedance
I
DDO
H
*
H
*
Standby
H
*
*
I
DDS
* : Don’t care
Note: The NU pin must be left unconnected or tied to GND.
You must not apply a voltage of more than 0.8 V to the NU.
2002-03-14 4/11
TC55VZM216AJGI/ATGI08,10,12
(See Note 1)
AC CHARACTERISTICS (Ta = −40° to 85°C
, V = 3.3 V 0.3 V)
DD
READ CYCLE
TC55VZM216AJGI/ATGI
SYMBOL
PARAMETER
UNIT
08
10
12
MIN
MAX
MIN
MAX
MIN
MAX
t
t
t
t
t
t
t
t
t
t
t
t
Read Cycle Time
8
3
8
10
3
10
10
5
12
3
12
12
6
RC
Address Access Time
ACC
CO
Chip Enable Access Time
8
Output Enable Access Time
4
OE
Upper Byte, Lower Byte Access Time
Output Data Hold Time from Address Change
Output Enable Time from Chip Enable
Output Enable Time from Output Enable
Output Enable Time from Upper Byte, Lower Byte
Output Disable Time from Chip Enable
Output Disable Time from Output Enable
Output Disable Time from Upper Byte, Lower Byte
4
5
6
BA
4
5
6
OH
ns
3
3
3
COE
OEE
BE
0
0
0
0
0
0
COD
ODO
BD
4
5
6
4
5
6
WRITE CYCLE
TC55VZM216AJGI/ATGI
10
SYMBOL
PARAMETER
UNIT
08
12
MIN
MAX
MIN
MAX
MIN
MAX
t
t
t
t
t
t
t
t
t
t
t
Write Cycle Time
Write Pulse Width
8
6
4
10
7
5
12
8
6
WC
WP
CW
BW
AW
Chip Enable to End of Write
Upper Byte, Lower Byte Enable to End of Write
Address Valid to End of Write
Address Setup Time
6
7
8
6
7
8
6
7
8
ns
0
0
0
AS
Write Recovery Time
0
0
0
WR
DS
Data Setup Time
4
5
6
Data Hold Time
0
0
0
DH
Output Enable Time from Write Enable
Output Disable Time from Write Enable
3
3
3
OEW
ODW
AC TEST CONDITIONS
Fig.1
3.3 V
PARAMETER
TEST CONDITION
1200 Ω
870 Ω
Z
= 50 Ω
Input Pulse Level
3.0 V/ 0.0 V
2 ns
0
I/O pin
I/O pin
Input Pulse Rise and Fall Time
R
= 50 Ω
L
Input Timing Measurement
Reference Level
C
L
= 30 pF
C = 5 pF
L
1.5 V
V
= 1.5 V
L
(For t
, t
, t , t
COE OEE BE COD
,
Output Timing Measurement
Reference Level
1.5 V
Fig.1
t
, t
, t
and t
)
BD ODO OEW
ODW
Output Load
2002-03-14 5/11
TC55VZM216AJGI/ATGI08,10,12
TIMING DIAGRAMS
(See Note 2)
READ CYCLE
t
RC
Address
CE
t
t
OH
ACC
t
CO
(See Note 6)
(See Note 6)
(See Note 6)
t
OE
t
COD
OE
t
BA
t
ODO
UB , LB
(See Note 6)
t
BE
t
BD
(See Note 6)
t
OEE
D
OUT
Hi-Z
VALID DATA OUT
Hi-Z
(See Note 6)
t
COE
INDETERMINATE
INDETERMINATE
(See Note 5)
WE
WRITE CYCLE 1 (
CONTROLLED)
t
WC
t
AW
Address
WE
t
t
t
WR
AS
WP
t
t
CW
CE
BW
UB , LB
(See Note 6)
Hi-Z
(See Note 6)
t
t
OEW
ODW
D
OUT
(See Note 3)
INDETERMINATE
(See Note 4)
INDETERMINATE
t
t
DH
DS
D
IN
VALID DATA IN
2002-03-14 6/11
TC55VZM216AJGI/ATGI08,10,12
(See Note 5)
CE
WRITE CYCLE 2 (
CONTROLLED)
t
WC
t
AW
Address
WE
t
t
t
WR
AS
WP
t
CW
CE
t
BW
UB , LB
(See Note 6)
(See Note 6)
t
t
ODW
BE
D
OUT
Hi-Z
Hi-Z
t
COE
(See Note 6)
INDETERMINATE
t
t
DH
DS
D
IN
VALID DATA IN
(See Note 5)
UB LB
CONTROLLED)
WRITE CYCLE 2 (
,
t
WC
t
AW
Address
WE
t
t
t
WR
AS
WP
t
CW
CE
t
BW
UB , LB
(See Note 6)
(See Note 6)
t
t
ODW
COE
D
OUT
Hi-Z
Hi-Z
t
BE
(See Note 6)
INDETERMINATE
t
t
DH
DS
D
IN
VALID DATA IN
2002-03-14 7/11
TC55VZM216AJGI/ATGI08,10,12
Note:
(1)
Operating temperature (Ta) is guaranteed for transverse air flow exceeding 400 linear feet per minute.
WE remains HIGH for the Read Cycle.
(2)
(3)
(4)
If CE goes LOW coincident with or after WE goes LOW, the outputs will remain at high impedance.
If CE goes HIGH coincident with or before WE goes HIGH, the outputs will remain at high
impedance.
(5)
(6)
If OE is HIGH during the write cycle, the outputs will remain at high impedance.
The parameters specified below are measured using the load shown in Fig.1.
････････････
(A)
(B)
t
, t
, t , t
, t , t
Output Enable Time
Output Disable Time
COE OEE BE OEW
････････････
t , t
COD ODO BD ODW
CE , OE
UB , LB
WE
(A)
(B)
0.2 V
Hi-Z
0.2 V
0.2 V
0.2 V
D
OUT
Hi-Z
VALID DATA OUT
INDETERMINATE
INDETERMINATE
2002-03-14 8/11
TC55VZM216AJGI/ATGI08,10,12
PACKAGE DIMENSIONS
SOJ44-P-400-1.27
Weight: 1.64 g (typ)
2002-03-14 9/11
TC55VZM216AJGI/ATGI08,10,12
PACKAGE DIMENSIONS
Weight: 0.45 g (typ)
2002-03-14 10/11
TC55VZM216AJGI/ATGI08,10,12
RESTRICTIONS ON PRODUCT USE
000707EBA
•
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability
Handbook” etc..
•
The TOSHIBA products listed in this document are intended for usage in general electronics applications
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,
etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this
document shall be made at the customer’s own risk.
•
•
The products described in this document are subject to the foreign exchange and foreign trade laws.
The information contained herein is presented only as a guide for the applications of our products. No
responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other
rights of the third parties which may result from its use. No license is granted by implication or otherwise under
any intellectual property or other rights of TOSHIBA CORPORATION or others.
•
The information contained herein is subject to change without notice.
2002-03-14 11/11
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