TC74AC112FN [TOSHIBA]

CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip Flop with Preset and Clear; CMOS数字集成电路硅单片双JK触发器与预置和清除
TC74AC112FN
型号: TC74AC112FN
厂家: TOSHIBA    TOSHIBA
描述:

CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip Flop with Preset and Clear
CMOS数字集成电路硅单片双JK触发器与预置和清除

触发器 锁存器 逻辑集成电路 光电二极管
文件: 总9页 (文件大小:313K)
中文:  中文翻译
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TC74AC112P/F/FN  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74AC112P,TC74AC112F,TC74AC112FN  
Dual J-K Flip Flop with Preset and Clear  
Note: xxxFN (JEDEC SOP) is not available in  
Japan.  
The TC74AC112 is an advanced high speed CMOS DUAL J-K  
FLIP FLOP fabricated with silicon gate and double-layer metal  
wiring C2MOS technology.  
TC74AC112P  
It achieves the high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low power  
dissipation.  
In accordance with the logic level given J and K input this  
device changes state on negative going transition of the clock  
pulse. CLEAR and PRESET are independent of the clock and  
accomplished by a low logic level on the corresponding input.  
All inputs are equipped with protection circuits against static  
TC74AC112F  
discharge or transient excess voltage.  
Features  
High speed: f  
= 170 MHz (typ.) at V  
= 5 V  
max  
CC  
Low power dissipation: I  
= 4 μA (max) at Ta = 25°C  
CC  
High noise immunity: V  
= V  
= 28% V  
(min)  
NIH  
NIL  
CC  
Symmetrical output impedance: |I | = I  
= 24 mA (min)  
OH  
OL  
Capability of driving 50 Ω  
TC74AC112FN  
transmission lines.  
t
pHL  
(opr) = 2 to 5.5 V  
Balanced propagation delays: t  
pLH  
Wide operating voltage range: V  
CC  
Pin and function compatible with 74F112  
Pin Assignment  
Weight  
DIP16-P-300-2.54A  
SOP16-P-300-1.27A  
SOL16-P-150-1.27  
: 1.00 g (typ.)  
: 0.18 g (typ.)  
: 0.13 g (typ.)  
1
2007-10-01  
TC74AC112P/F/FN  
IEC Logic Symbol  
Truth Table  
Inputs  
Outputs  
Function  
CLR  
L
PR  
H
L
J
X
X
X
L
K
X
X
X
L
CK  
X
Q
Q
H
L
L
H
H
Clear  
H
X
Preset  
L
L
X
H
H
H
H
H
H
H
Q
n
Q
No Change  
n
H
L
H
L
L
H
L
H
H
H
X
H
H
H
X
Q
Toggle  
Q
n
n
n
H
Q
n
Q
No Change  
X: Don’t care  
System Diagram  
2
2007-10-01  
TC74AC112P/F/FN  
Absolute Maximum Ratings (Note 1)  
Characteristics  
Supply voltage range  
Symbol  
Rating  
Unit  
V
0.5 to 7.0  
V
V
CC  
DC input voltage  
V
0.5 to V  
+ 0.5  
IN  
CC  
CC  
DC output voltage  
Input diode current  
Output diode current  
DC output current  
V
0.5 to V  
+ 0.5  
V
OUT  
I
±20  
mA  
mA  
mA  
mA  
mW  
°C  
IK  
I
±50  
±50  
OK  
I
OUT  
DC V /ground current  
CC  
I
±100  
CC  
Power dissipation  
P
500 (DIP) (Note 2)/180 (SOP)  
D
Storage temperature  
T
stg  
65 to 150  
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or  
even destruction.  
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the  
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly  
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute  
maximum ratings and the operating ranges.  
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook  
(“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test  
report and estimated failure rate, etc).  
Note 2: 500 mW in the range of Ta = −40 to 65°C. From Ta = 65 to 85°C a derating factor of 10 mW/°C should be  
applied up to 300 mW.  
Operating Ranges (Note)  
Characteristics  
Supply voltage  
Symbol  
Rating  
Unit  
V
2.0 to 5.5  
V
V
CC  
Input voltage  
V
0 to V  
0 to V  
IN  
CC  
CC  
Output voltage  
V
V
OUT  
Operating temperature  
T
40 to 85  
0 to 100 (V = 3.3 ± 0.3 V)  
°C  
opr  
CC  
0 to 20 (V  
Input rise and fall time  
dt/dV  
ns/V  
= 5 ± 0.5 V)  
CC  
Note:  
The operating ranges must be maintained to ensure the normal operation of the device.  
Unused inputs must be tied to either VCC or GND.  
3
2007-10-01  
TC74AC112P/F/FN  
Electrical Characteristics  
DC Characteristics  
Ta = −40 to  
Test Condition  
Ta = 25°C  
85°C  
Characteristics  
Symbol  
Unit  
V
(V)  
CC  
Min  
Typ.  
Max  
Min  
Max  
2.0  
1.50  
2.10  
3.85  
1.50  
2.10  
3.85  
High-level input  
voltage  
V
3.0  
5.5  
2.0  
3.0  
5.5  
2.0  
3.0  
4.5  
3.0  
4.5  
V
V
IH  
0.50  
0.90  
1.65  
0.50  
0.90  
1.65  
Low-level input  
voltage  
V
IL  
1.9  
2.9  
4.4  
2.58  
3.94  
2.0  
3.0  
4.5  
1.9  
2.9  
4.4  
2.48  
3.80  
3.85  
I
= −50 μA  
OH  
V
IN  
IH  
IL  
High-level output  
voltage  
V
= V or  
V
V
OH  
I
I
I
= −4 mA  
OH  
OH  
OH  
= −24 mA  
= −75 mA (Note) 5.5  
2.0  
0.0  
0.0  
0.0  
0.1  
0.1  
0.1  
0.36  
0.36  
0.1  
0.1  
0.1  
0.44  
0.44  
1.65  
I
= 50 μA  
3.0  
4.5  
OL  
V
IN  
IH  
IL  
Low-level output  
voltage  
V
= V or  
V
V
OL  
I
I
I
= 12 mA  
= 24 mA  
= 75 mA  
3.0  
OL  
OL  
OL  
4.5  
(Note) 5.5  
Input leakage  
current  
I
V
V
= V  
= V  
or GND  
or GND  
5.5  
5.5  
±0.1  
±1.0  
μA  
μA  
IN  
IN  
IN  
CC  
Quiescent supply  
current  
I
4.0  
40.0  
CC  
CC  
Note:  
This spec indicates the capability of driving 50 Ω transmission lines.  
One output should be tested at a time for a 10 ms maximum duration.  
4
2007-10-01  
TC74AC112P/F/FN  
Timing Requirements (input: t = t = 3 ns)  
r
f
Ta =  
Ta =  
40 to  
Test Condition  
25°C  
Characteristics  
Symbol  
Unit  
85°C  
Limit  
V
(V)  
Limit  
7.5  
5.0  
7.0  
5.0  
11.0  
6.0  
0.0  
0.0  
3.0  
2.0  
CC  
Minimum pulse width  
( CK )  
t
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
3.3 ± 0.3  
5.0 ± 0.5  
7.5  
5.0  
7.0  
5.0  
11.0  
6.0  
0.0  
0.0  
3.0  
2.0  
W (L)  
ns  
ns  
ns  
ns  
ns  
t
W (H)  
Minimum pulse width  
( CLR , PR )  
t
W (L)  
Minimum set-up time  
Minimum hold time  
t
s
t
h
Minimum removal time  
( CLR , PR )  
t
rem  
AC Characteristics (C = 50 pF, R = 500 Ω, input: t = t = 3 ns)  
L
L
r
f
Ta = −40 to  
Test Condition  
Ta = 25°C  
85°C  
Characteristics  
Symbol  
Unit  
ns  
V
(V)  
Min  
Typ.  
Max  
Min  
Max  
CC  
Propagation delay  
time  
t
t
3.3 ± 0.3  
5.0 ± 0.5  
9.1  
6.5  
15.5  
9.4  
1.0  
1.0  
17.8  
10.8  
pLH  
pHL  
( CK -Q, Q )  
Propagation delay  
time  
t
t
3.3 ± 0.3  
5.0 ± 0.5  
8.6  
5.8  
14.6  
8.3  
1.0  
1.0  
16.8  
9.6  
pLH  
ns  
pHL  
( CLR , PR -Q, Q )  
3.3 ± 0.3  
5.0 ± 0.5  
45  
80  
90  
150  
5
10  
45  
80  
10  
Maximum clock  
frequency  
f
MHz  
pF  
max  
Input capacitance  
C
IN  
C
PD  
Power dissipation  
capacitance  
85  
pF  
(Note)  
Note:  
C
PD  
is defined as the value of the internal equivalent capacitance which is calculated from the operating  
current consumption without load.  
Average operating current can be obtained by the equation:  
I
(opr) = C V f + I /2 (per F/F)  
PD CC IN CC  
CC  
5
2007-10-01  
TC74AC112P/F/FN  
Package Dimensions  
Weight: 1.00 g (typ.)  
6
2007-10-01  
TC74AC112P/F/FN  
Package Dimensions  
Weight: 0.18 g (typ.)  
7
2007-10-01  
TC74AC112P/F/FN  
Package Dimensions (Note)  
Note:  
This package is not available in Japan.  
Weight: 0.13 g (typ.)  
8
2007-10-01  
TC74AC112P/F/FN  
RESTRICTIONS ON PRODUCT USE  
20070701-EN GENERAL  
The information contained herein is subject to change without notice.  
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor  
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical  
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of  
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of  
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.  
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as  
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and  
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability  
Handbook” etc.  
The TOSHIBA products listed in this document are intended for usage in general electronics applications  
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,  
etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires  
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or  
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or  
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,  
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his  
document shall be made at the customer’s own risk.  
The products described in this document shall not be used or embedded to any downstream products of which  
manufacture, use and/or sale are prohibited under any applicable laws and regulations.  
The information contained herein is presented only as a guide for the applications of our products. No  
responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which  
may result from its use. No license is granted by implication or otherwise under any patents or other rights of  
TOSHIBA or the third parties.  
Please contact your sales representative for product-by-product details in this document regarding RoHS  
compatibility. Please use these products in this document in compliance with all applicable laws and regulations  
that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses  
occurring as a result of noncompliance with applicable laws and regulations.  
9
2007-10-01  

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