TC9472F [TOSHIBA]
IC SPECIALTY CONSUMER CIRCUIT, PQFP100, 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100, Consumer IC:Other;
| 型号： | TC9472F |
| 厂家： | 
TOSHIBA |
| 描述： | IC SPECIALTY CONSUMER CIRCUIT, PQFP100, 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100, Consumer IC:Other 商用集成电路 |
| 文件： | 总14页 (文件大小：108K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TC9472F
TENTATIVE
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
T C 9 4 7 2 F
1 chip AUDIO DIGITAL SIGNAL PROCESSOR
TC9472F is the 1 chip audio DSP which built in 24-bits, a 22.5 MIPS
DSP core, 3 ch AD converter, 5 ch DA converter, and electronic
volume for trims, and corresponds to a Multi-speaker system.
It is possible to realize many application, such as sound field control
- hall simulation,for example - , digital filter for equalizers, dyanmic
range control, KARAOKE and something.
FEATURES
•
Incorporates 3 ch AD converter, 2 ch is 1bit S - D type AD converter for
HiFi - Audio and 1 ch is 16 bit Multi-bit type AD converter for Microphone.
QFP100-P-1420-0.65A
Weight : 1.57g (typ.)
2 ch HiFi-ADC (1bit S - D type)
S / N : 98 dB (typ.)
S / N : 80 dB (typ.)
1 ch Mic. ADC (16 bit Multi - bit type)
•
Incorporates 1bit S - D type DA converter, and the attenuator for trims
is built in each DAC output. In case of the use which does not use a trim,
It is possible to output the analog signal of DAC directly.
5 ch DAC (1bit S - D type)
A built-in self-boot function automatically sets the coefficients and register values at initialization.
Boot ROM : 1024 word x 18 bit
The DSP block specification are as follows :
S / N : 100 dB (typ.)
•
•
Data bus
: 24 bit
Multiplier / adder
Accumulator
Program ROM
Coefficient RAM
Coefficient ROM
Offset RAM
: 24 bit x 16 bit + 43 bit => 43 bit
: 43 bit (sign extension : 4 bit)
: 2048 word x 32 bit
: 448 word x 16 bit
: 256 word x 16 bit
: 64 word x 16 bit
Data RAM
: 256 word x 24 bit
Operation speed
: 44 ns (510-step (approx.) operation per cycle at fs = 44.1 kHz)
Interface buffer RAM: 32 word x 16 bit
Incorporates data delay RAM of 64 kbit.
•
Delay RAM
: 4096 word x 16 bit (64 kbit)
•
•
•
The microcontroller interface can be selected between TOSHIBA original 3 line type and I2C bus format.
CMOS silicon structure supports high speed.
The package is a 100-pin flat package.
• TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless,
semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability
to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of
safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of
human life, bodily, injury or damage to property. In developing your designs, please ensure that TOSHIBA
products are used within specified operating ranges as set forth in the most recent products specifications. Also,
please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook.
• The products described in this document are subjects to foreign exchange and foreign trade control laws.
• The information contained herein is presented only as guide for the applications of our products. No
responsibility is assumed by TOSHIBA CORPORATION for any infringement of intellectual property or
other rights of the third parties which may result from its use. No license is granted by implication or
otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others.
1998-12-11
1 / 14
TC9472F
BLOCK DIAGRAM / PIN CONNECTION
G N D 5 1
T P 1 3 5 2
M C K 5 3
V D D 5 4
T P 1 4 5 5
T P 1 5 5 6
E M 0 5 7
E M 1 5 8
S T E P 1 5 9
S T E P 0 6 0
/ R E S E T 6 1
V D D 6 2
S Y N C 6 3
E L R O 6 4
E L R I 6 5
E B C O 6 6
E B C I 6 7
3 0
2 9
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
V D A S R
V R S R
A O S R T
A O S R
G N D A S R
G N D A S L
A O S L
A O S L T
V R S L
V D A S L
V R I
V R O
V D A C
V R C
A O C T
A O C
G N D A C
G N D A R
A O R
A O R T
V R R
V D A R
V D A L
V R L
A O L T
A O L
G N D A L
V D X
X O
X I
1 6
1 5
1 4
1 3
1 2
1 1
1 0
D I N
6 8
D O U T 6 9
G N D 7 0
/ C S
I F C K 7 2
I F D I 7 3
7 1
9
8
7
6
5
4
3
2
1
I F D O 7 4
I F O K 7 5
/ E R R 7 6
I 2 C S 7 7
2 5 6 f s
B A 1
B A 0
7 8
7 9
B O O T 8 0
Lch-IN
Rch-IN
MIC-IN
1998-12-11
2 / 14
TC9472F
PIN FUNCTION
PIN
SYMBOL
No.
I / O
FUNCTION
REMARKS
1
XI
I
O
-
Crystal oscillator connect or external clock input pin
Crystal oscillator connect pin
2
XO
3
VDX
Power pin for oscillator circuit
4
GNDAL
AOL
-
Ground pin for DAC Left channel
DAC Left channel signal output pin
DAC Left channel attenuator output pin
Reference voltage pin for DAC Left channel
Power pin for DAC Left channel
5
O
O
-
6
AOLT
VRL
7
8
VDAL
VDAR
VRR
-
9
-
Power pin for DAC Right channel
Reference voltage pin for DAC Right channel
DAC Right channel attenuator output pin
DAC Right channel signal output pin
Ground pin for DAC Right channel
Ground pin for DAC Center channel
DAC Center channel signal output pin
DAC Center channel attenuator output pin
Reference power pin for DAC Center channel
Power pin for DAC Center channel
Reference voltage pin for attenuator (Buffer output)
Reference voltage pin for attenuator (Buffer input)
Power pin for DAC SL channel
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
-
AORT
AOR
O
O
-
GNDAR
GNDAC
AOC
-
O
O
-
AOCT
VRC
VDAC
VRO
-
O
I
VRI
VDASL
VRSL
AOSLT
AOSL
GNDASL
GNDASR
AOSR
AOSRT
VRSR
VDASR
GND
-
-
Reference voltage pin for DAC SL channel
DAC SL channel attenuator output pin
DAC SL channel signal output pin
Ground pin for DAC SL channel
O
O
-
-
Ground pin for DAC SR channel
DAC SR channel signal output pin
DAC SR channel attenuator output pin
Reference voltage pin for DAC SR channel
Power pin for DAC SR channel
O
O
-
-
-
Ground pin
TP0
O
O
Test pin 0
TP1
Test pin 1
1998-12-11
3 / 14
TC9472F
PIN
No.
SYMBOL
I / O
FUNCTION
REMARKS
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
TP2
O
O
O
-
Test pin 2
TP3
Test pin 3
TP4
Test pin 4
VDD
Power pin
VDDR
GNDR
TP5
-
Power pin for delay RAM
Ground pin for delay RAM
Test pin 5
-
O
O
O
O
O
O
O
O
O
O
O
-
TP6
Test pin 6
TP7
Test pin 7
TP8
Test pin 8
TP9
Test pin 9
TP10
TP11
TP12
FS
Test pin 10
Test pin 11
Test pin 12
Clock out pin (Sampling frequency)
Clock output pin 0
CKO0
CKO1
GND
TP13
MCK
VDD
Clock output pin 1
Ground pin
O
O
-
Test pin 3
MCK clock output pin
Power pin
TP14
TP15
EM0
O
O
I
Test pin 14
Test pin 15
De-emphasis setting pin 0
De-emphasis setting pin 1
ASP execution step switching pin 1
ASP execution step switching pin 0
Reset pin
Schmitt input
EM1
I
Schmitt input
Schmitt input
Schmitt input
Schmitt input
STEP1
STEP0
/RESET
VDD
I
I
I
-
Power pin
SYNC
ELRO
ELRI
EBCO
EBCI
I
Program synchronous signal input pin
LR clock input pin for serial data output (DOUT)
LR clock output pin for serial data input (DIN)
Bit clock input pin for serial data output (DOUT)
Bit clock input pin for serial data output (DIN)
Schmitt input
Schmitt input
Schmitt input
Schmitt input
Schmitt input
I
I
I
I
1998-12-11
4 / 14
TC9472F
PIN
No.
SYMBOL
I / O
FUNCTION
REMARKS
Schmitt input
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
DIN
I
O
-
Serial data input pin
Serial data output pin
Ground pin
DOUT
GND
/CS
I
Microcontroller interface chip select signal input pin
Microcontroller interface data shift clock signal input pin
Microcontroller interface data input pin
Microcontroller interface data output pin
Microcontroller interface operation flag pin
Error flag output pin
Schmitt input
Schmitt input
Schmitt input
IFCK
IFDI
I
I
IFDO
IFOK
/ERR
I2CS
BA1
O
O
O
I
Open drain output
Open drain output
Microcontroller interface I2C bus / 3 line bus switching pin
Boot address setting pin 1
I
Schmitt input
Schmitt input
Schmitt input
BA0
I
Boot address setting pin 0
BOOT
VDD
I
Self boot control pin
-
Power pin
TST0
TST1
TST2
TST3
VDM
VRM1
MIN
I
Test pin T0
Schmitt input
Schmitt input
Schmitt input
Schmitt input
I
Test pin T1
I
Test pin T2
I
Test pin T3
-
Power pin for microphone ADC
Reference voltage pin 1 for microphone ADC
Microphone ADC amplifier input pin
Microphone ADC amplifier output pin
Reference voltage pin 2 microphone ADC
Ground pin for microphone ADC
Ground pin for ADC L channel
ADC L channel signal input pin
Reference voltage pin for ADC L channel
Power pin for ADC L channel
Power pin for ADC R channel
Reference voltage pin for ADC R channel
ADC R ch signal input pin
-
I
MOUT
VRM2
GNDM
VSAL
LIN
O
-
-
-
I
AVRL
VDL
-
-
VDR
-
AVRR
RIN
-
I
VSAR
GNDX
-
Ground pin for ADC R channel
Ground pin for oscillator circuit
-
1998-12-11
5 / 14
TC9472F
MAXMUM RATINGS (Ta=25 degrees centigrade)
CHARACTERISTIC
Power Supply Voltage
Input Voltage
SYMBOL
VDD
RATING
-0.3 ~ 6.0
UNIT
V
Vin
-0.3 ~ VDD + 0.3
1500
V
Power Dissipation
PD
mW
Operating Temperature
Storage Temperature
Topr
-40 ~ 75 (Notes)
-55 ~ 150
degrees centigrade
degrees centigrade
Tstg
(Notes) When operating frequency is 340-step mode, operating temperature is Ta=-40~85 degrees centigrade.
ELECTRICAL CHARACTERISTICS
(Unless otherwise noted, Ta=-25 degrees centigrade,
VDD=VDX=VDDR=VDM=VDL=VDR=VDX=VDAL=VDAR=VDAC=VDAS=VDASR=5.0V)
DC Characteristics
TEST
CHARACTERISTIC
SYMBOL
CIR-
CUIT
TEST CONDITION
MIN.
4.75
TYP. MAX. UNIT
Operating Power Supply
Voltage
VDD
fopr
-
-
-
Ta=-40~75 degrees centigrade
5.0
5.25
V
340-step mode
511-step mode
8
15
25
34
Operating Frequency Range
MHz
mA
12
33.8
Operating Power Supply
Current
fopr=33.8688MHz,
511-step mode
IDD
-
135
150
Clock Pins (XI, XO)
CHARACTERISTIC
TEST
CIR-
CUIT
SYMBOL
TEST CONDITION
XI piin
MIN.
TYP. MAX. UNIT
"H" LEVEL
VIH1
VIL1
3.5
-
-
-
-
-
-
Input Voltage(1)
-
-
"L" LEVEL
"H" LEVEL
"L"LEVEL
1.5
-
V
VOH1
VOL1
IOH=-3.0mA
XO pin
4.5
-
Output Voltage(1)
IOL= 5.0mA
0.5
Input Pins
TEST
CIR-
CUIT
CHARACTERISTIC
SYMBOL
TEST CONDITION
(Note 1)
MIN.
TYP. MAX. UNIT
"H" LEVEL
"L" LEVEL
"H" LEVEL
"L" LEVEL
VIH2
VIL2
IIH2
4.0
-
-
-
-
-
-
1.0
10
-
Input Voltage(2)
-
-
V
VIN=VDD
(Note 1)
VIN=0V
-
Input Leakage
Current
mA
IIL2
-10
(Note 1) XI, STEP0~1, /RESET, SYNC, ELRO, ELRI, EBCO, EBCI, DIN, EM0~1,
I2CS, /CS, IFCK, IFDI, BOOT, BA0~BA1, TST0~3 (Normally input pins and Schmitt input pins)
Output Pins
CHARACTERISTIC
TEST
SYMBOL CIR-C
UIT
TEST CONDITION
MIN.
TYP. MAX. UNIT
"H" LEVEL
"L" LEVEL
VOH2
IOh=-2.0mA
4.5
-
-
-
-
-
-
Output Voltage(2)
-
(Note 2)
VOL2
IOL= 2.0mA
IOL= 4.0mA
VOH=VDD
0.5
0.5
+10
V
Output Voltage(3) "L" LEVEL
Output Open Leakage Current
VOL3
IOZ4
-
-
(Note 3)
(Note 3)
-
-10
mA
(Note 2) FS, CKO0~1, MCK, DOUT, IFDO (Normally output)
(Note 3) IFDI (When I2C mode output), IFOK, /ERR(Open drain output)
1998-12-11
6 / 14
TC9472F
AC Characteristics
AD converter (1) : LIN and RIN pins
TEST
CIR-
CHARACTERISTIC
SYMBOL
TEST CONDITION
MIN.
TYP. MAX. UNIT
CUIT
Maximum Input Signal
Level
Input level for ADC output
at full-scale digital output (Note 1)
Vi
-
-
1.18
-
1.25
27
-
-
Vrms
Input Impedance
Zin
LIN, RIN pins
kW
A-Weight, X'tal : 33.8688MHz
(Note 1)
S / Na1
S / Na2
THDa
CTa
-
-
-
-
-
90
87
-
98
92
-
-
S / (N+D) ratio
dB
CCIR-ARM, X'tal : 33.8688MHz
(Note 1)
20kHz LPF, X'tal : 33.8688MHz
(Note 1)
THD+N
-80
-90
92
-70
-83
-
dB
dB
dB
A-Weight, X'tal : 33.8688MHz
(Note 1)
Cross-talk
-
A-Weight, X'tal : 33.8688MHz
(Note 1)
Dynamic Range
DRa
85
(Note 1) Input channels : LIN, RIN
AD converter (2) : MIN pin
TEST
CIR-
CHARACTERISTIC
SYMBOL
TEST CONDITION
MIN.
TYP. MAX. UNIT
CUIT
Maximum Input Signal
Level
Input level for ADC output
at full-scale digital output (Note 1)
ViM
-
-
-
-
1.0
1
1.15
-
Vrms
kW
Input Impedance
ZinM
MIN pin
A-Weight, X'tal : 33.8688MHz
(Note 1)
S / (N+D) ratio
S / NaM
THDaM
CTaM1
CTaM2
-
-
-
-
70
-
80
-62
-76
-90
-
dB
20kHz LPF, X'tal : 33.8688MHz
(Note 1)
THD+N
-55
-60
-83
dB
dB
LIN, RIN to MIN (Note 2)
MIN to LIN, RIN (Note 2)
-
Cross-talk
-
(Note 1) Input channel: MIN
(Note 2) Input channels: LIN, RI, MIN
1998-12-11
7 / 14
TC9472F
DA converter
CHARACTERISTIC
TEST
CIR-
SYMBOL
TEST CONDITION
MIN.
TYP. MAX. UNIT
CUIT
Output voltage at full-scale digital
Ao1
-
-
-
1.13
1.18
1.48
100
-85
-82
-73
-90
-97
95
1.25
1.55
-
input
(Note 1)
Output Signal Level
S / N ratio
Vrms
dB
Output voltage at full-scale digital
input (Note 2)
Ao2
1.43
A-Weight, X'tal : 33.8688MHz
(Note 3)
S / Nd
THDd1
THDd2
CTd1
CTd2
CTd3
DRd
90
-
20kHz LPF, X'tal : 33.8688MHz
(Note 1)
-78
-75
-66
-83
-90
-
THD+N
-
dB
20kHz LPF, X'tal : 33.8688MHz
(Note 2)
-
20kHz LPF, X'tal : 33.8688MHz
AOLT - AORT ch
-
20kHz LPF, X'tal : 33.8688MHz
AORT- AOCT-AOSLT-AOSRT ch
Cross-talk
-
-
-
dB
dB
20kHz LPF, X'tal : 33.8688MHz
AOL-AOR-AOC-AOSL-AOSR ch
-
A-Weight, X'tal : 33.8688MHz
Dynamic Range
88
(Note 3)
(Note 1) Output channel : AOL, AOR, AOC, AOSL, AOSR
(Note 2) Output channel : AOLT, AORT, AOCT, AOSLT, AOSRT
(Note 3) Output channel : AOL, AOR, AOC, AOSL, AOSR, AOLT, AORT, AOCT, AOSLT, AOSRT
1998-12-11
8 / 14
TC9472F
Timing
Clock Input Pin (XI)
TEST
CIR-
CHARACTERISTIC
SYMBOL
TEST CONDITION
MIN.
TYP. MAX. UNIT
CUIT
Clock Cycle
tXI
tXIH
tXIL
-
-
-
-
-
-
29
-
-
-
-
-
Clock "H" Cycle Width
Clock "L" Cycle Width
14.5
14.5
ns
-
Reset Pin (/RESET)
CHARACTERISTIC
TEST
CIR-
SYMBOL
TEST CONDITION
MIN.
TYP. MAX. UNIT
CUIT
Standby Time
tRRS
tWRS
-
-
-
-
10
-
-
-
-
ms
Reset Pulth Width
1.0
ms
Timing Output
TEST
CIR-
CUIT
CHARACTERISTIC
CKO Output Delay Time
SYMBOL
tDFC
TEST CONDITION
-
MIN.
-150
TYP. MAX. UNIT
150 ns
-
-
Audio Serial Interface (EBCI, DIN, EBCO, DOUT)
TEST
CHARACTERISTIC
SYMBOL
CIR-
TEST CONDITION
MIN.
TYP. MAX. UNIT
CUIT
ELRI Hold Time
tLIH
tSDI
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-75
50
-
-
-
-
-
-
-
-
-
-
-
-
75
-
DIN Setup Time
DIN Hold Time
tHDI
50
-
EBCI Clock Cycle
tEBCI
tEBIH
tEBIL
tLOH
tDO1
tDO2
tEBCO
tEBOH
tEBOL
300
150
150
-75
-
-
EBCI Clock "H" Cycle Width
EBCI Clock "L" Cycle Width
ERLO Hold Time
-
-
ns
75
60
60
-
DOUT Output Delay Time(1)
DOUT Output Delay Time(2)
EBCO Clock Cycle
-
300
150
150
EBCO Clock "H" Cycle Width
EBCO Clock "L" Cycle Width
-
-
1998-12-11
9 / 14
TC9472F
Microcontroller Interface
(1) Standard Transmission Mode (/CS, IFCK, IFDI, IFDO)
TEST
CHARACTERISTIC
SYMBOL
tSTB
CIR-
CUIT
TEST CONDITION
MIN.
1.0
TYP. MAX. UNIT
Standby Time
/CS falling egde
- IFCK falling egde
-
-
-
-
-
-
-
-
tCCD
0.2
Setup Time
IFCK "L" Cycle Width
IFCK "H" Cycle Width
tWLC
tWHC
-
-
-
-
0.25
0.25
-
-
-
-
IFCK rising edge
- /CS rising edge
Setup Time
tCKC
-
-
0.2
-
-
ms
/CS "H" Cycle Width
tWCS
tSCD
tHCD
tDDO
-
-
-
-
0.5
0.2
-
-
-
-
IFDI - IFCK rising edge
Setup Time
IFCK rising edge - IFDI
Hold Time
-
-
-
0.2
-
-
-
-
IFCK falling edge - IFDO
Propagation Delay Time
CL=30pF
0.2
(2) I2C Mode (/CS, IFCK, IFDI)
CHARACTERISTIC
TEST
CIR-
CUIT
SYMBOL
TEST CONDITION
CL=400pF
MIN.
TYP. MAX. UNIT
IFCK Clock Frequency
IFCK "H" Cycle Width
IFCK "L" Cycle Width
Data Setup Time
tIFCK
tH
-
-
-
-
-
0
-
-
-
-
-
400
kHz
CL=400pF
CL=400pF
CL=400pF
CL=400pF
0.6
1.3
0.1
0
-
-
-
-
tL
tDS
tDH
Data Hold Time
Transmission Start Condition
Hold Time
tSCH
tSCS
tECS
-
-
-
CL=400pF
CL=400pF
CL=400pF
0.6
0.6
0.6
-
-
-
-
-
-
ms
Repeat Transmission Start
Condition Setup Time
Transmission End Condition
Setup Time
Data Transmission Interval
I2C Rising Time
tBUF
tR
-
-
-
CL=400pF
CL=400pF
CL=400pF
1.3
-
-
-
-
-
-
0.3
0.3
I2C Falling Time
tF
1998-12-11
10 / 14
TC9472F
AC Characteristic Measurement Point
(1) Clock Pins (XI, ECKI)
XI/ECKI
50%
tXIH
tXIL
tXI
(2) Reset
100%
90%
VDD
0%
50%
/RESET
tRRS
tWRS
(3) Timing Output
100%
0%
FS
50%
50%
CKO0 ~ 1
tDFC
(4) Audio Serial Interface (ELRI, EBCI, DIN, ELRO, EBCO, DOUT)
tEBCI
tEBIL
tEBIH
ELRI
EBCI
DIN
tLIH
tSDI
tHDI
tLIH
tEBCO
tEBOL
tEBOH
ELRO
EBCO
DOUT
tLOH
tDO1
tDO2
tLOH
1998-12-11
11 / 14
TC9472F
(1) Clock Pins (XI, ECKI)
XI/ECKI
50%
tXIH
tXIL
tXI
(2) Reset
100%
90%
VDD
0%
50%
/RESET
tRRS
tWRS
(3) Timing Output
100%
0%
FS
50%
50%
CKO0 ~ 1
tDFC
(4) Audio Serial Interface (ELRI, EBCI, DIN, ELRO, EBCO, DOUT)
tEBCI
tEBIL
tEBIH
ELRI
EBCI
DIN
tLIH
tSDI
tHDI
tLIH
tEBCO
tEBOL
tEBOH
ELRO
EBCO
DOUT
tLOH
tDO1
tDO2
tLOH
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TC9472F
(5) Micricontroller Interface in Standard Transmission mode (/CS, IFCK, IFDI, IFDO)
/RESET
/CS
tSTB
tCCD
tCKC
tWCS
tWLC
tWHC
/CS
IFCK
IFDI
tSCD
tHCD
IFDO
tDDO
(6) Micricontroller Interface in I2C Mode (IFCK, IFDI)
tBUF
IFDI
IFCK
tSCH
tR
tL
tH
tDS
tDH
tSCS
tF
tECS
Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Right to use these components
in an I2C system, provided that the system conforms to I2C Standard Specification as defined by Philips.
1998-12-11
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TC9472F
1998-12-11
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