TSM9634 [TOUCHSTONE]

A 1uA, SOT23 Precision Current-Sense Amplifier; 一个1uA,这SOT23高精度电流检测放大器
TSM9634
型号: TSM9634
厂家: TOUCHSTONE SEMICONDUCTOR INC    TOUCHSTONE SEMICONDUCTOR INC
描述:

A 1uA, SOT23 Precision Current-Sense Amplifier
一个1uA,这SOT23高精度电流检测放大器

放大器
文件: 总11页 (文件大小:742K)
中文:  中文翻译
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TSM9634  
A 1µA, SOT23 Precision Current-Sense Amplifier  
DESCRIPTION  
FEATURES  
Alternate-source for MAX9634  
Ultra-Low Supply Current: 1μA  
Wide Input Common Mode Range: +1.6V to +28V  
Low Input Offset Voltage: 250µV (max)  
Low Gain Error: <0.5% (max)  
Voltage Output  
The  
voltage-output  
TSM9634  
current-sense  
amplifiers are electrically and form-factor identical to  
the MAX9634 current-sense amplifiers. Consuming a  
very low 1μA supply current, the TSM9634 high-side  
current-sense amplifiers exhibit a 250-µV (max) VOS  
and a 0.5% (max) gain error, both specifications  
optimized for any precision current measurement. For  
all high-side current-sensing applications, the  
TSM9634 features a wide input common-mode  
voltage range from 1.6V to 28V.  
Four Gain Options Available:  
TSM9634T: Gain = 25V/V  
TSM9634F: Gain = 50V/V  
TSM9634H: Gain = 100V/V  
TSM9634W: Gain = 200V/V  
5-Pin SOT23 Packaging  
The SOT23 package makes the TSM9634 an ideal  
choice for pcb-area-critical, low-current, high-  
accuracy current-sense applications in all battery-  
powered portable instruments.  
APPLICATIONS  
Notebook Computers  
Power Management Systems  
Portable/Battery-Powered Systems  
PDAs  
All TSM9634s are specified for operation over the  
-40°C to +85°C extended temperature range.  
Smart Chargers  
Smart Phones  
TYPICAL APPLICATION CIRCUIT  
Input Offset Voltage Histogram  
35  
30  
25  
20  
15  
10  
5
0
10  
20  
30  
40  
0
50  
INPUT OFFSET VOLTAGE - µV  
PART  
GAIN OPTION  
25 V/V  
TSM9634T  
TSM9634F  
TSM9634H  
TSM9634W  
50 V/V  
100 V/V  
200 V/V  
The Touchstone Semiconductor logo is a registered  
trademark of Touchstone Semiconductor, Incorporated.  
Page 1  
© 2011 Touchstone Semiconductor, Inc. All rights reserved.  
TSM9634  
ABSOLUTE MAXIMUM RATINGS  
RS+, RS- to GND..............................................-0.3V to +30V  
OUT to GND........................................................-0.3V to +6V  
RS+ to RS-..................................................................... ±30V  
Short-Circuit Duration: OUT to GND .................... Continuous  
Continuous Input Current (Any Pin) ............................ ±20mA  
Continuous Power Dissipation (TA = +70°C)  
Operating Temperature Range ...................... -40°C to +85°C  
Junction Temperature ................................................ +150°C  
Storage Temperature Range ....................... -65°C to +150°C  
Lead Temperature (Soldering, 10s) ........................... +300°C  
Soldering Temperature (Reflow) ............................ +260°C  
5-Pin SOT23 (Derate at 3.9mW/°C above +70°C).. 312mW  
Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These  
are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections  
of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and  
lifetime.  
PACKAGE/ORDERING INFORMATION  
ORDER NUMBER  
TSM9634TEUK+TP  
TSM9634TEUK+T  
TSM9634FEUK+TP  
TSM9634FEUK+T  
TSM9634HEUK+TP  
TSM9634HEUK+T  
TSM9634WEUK+TP  
TSM9634WEUK+T  
PART MARKING  
TADD  
CARRIER  
QUANTITY  
-----  
Tape & Reel  
Tape & Reel  
Tape & Reel  
Tape & Reel  
Tape & Reel  
Tape & Reel  
Tape & Reel  
Tape & Reel  
3000  
-----  
TADB  
TADE  
TADG  
3000  
-----  
3000  
-----  
3000  
Lead-free Program: Touchstone Semiconductor supplies only lead-free packaging.  
Consult Touchstone Semiconductor for products specified with wider operating temperature ranges.  
Page 2  
TSM9634DS r1p0  
RTFDS  
TSM9634  
ELECTRICAL CHARACTERISTICS  
VRS+ = VRS- = 3.6V; VSENSE = (VRS+ - VRS-) = 0V; TA = -40°C to +85°C, unless otherwise noted. Typical values are at  
TA = +25°C. See Note 1  
PARAMETER  
SYMBOL  
CONDITIONS  
VRS+ = 5V, TA = +25°C  
VRS+ = 5V, -40°C < TA < +85°C  
VRS+ = 28V, TA = +25°C  
MIN  
TYP  
0.5  
MAX  
0.85  
1.1  
UNITS  
Supply Current (Note 2)  
ICC  
μA  
1.1  
1.8  
VRS+ = 28V, -40°C < TA < +85°C  
Guaranteed by CMRR , -40°C < TA < +85°C  
2.5  
28  
Common-Mode Input Range  
Common-Mode Rejection  
Ratio  
VCM  
1.6  
94  
V
CMRR  
1.6V < VRS+ < 28V, -40°C < TA < +85°C  
130  
100  
dB  
TA = +25°C  
-40°C < TA < +85°C  
TA = +25°C  
250  
300  
250  
425  
TSM9634T/TSM9634F/  
TSM9634H  
μV  
μV  
Input Offset Voltage (Note 3)  
VOS  
100  
TSM9634W  
-40°C < TA < +85°C  
TSM9634T  
TSM9634F  
25  
50  
Gain  
G
V/V  
TSM9634H  
TSM9634W  
TSM9634T/TSM9634F/  
TSM9634H  
100  
200  
±0.1  
TA = +25°C  
-40°C < TA < +85°C  
TA = +25°C  
-40°C < TA < +85°C  
TSM9634T/F/H  
TSM9634W  
±0.5  
±0.6  
±0.7  
±0.8  
13.2  
26.4  
7.5  
15  
30  
85  
0.2  
Gain Error (Note 4)  
Output Resistance  
GE  
%
±0.1  
TSM9634W  
(Note 5)  
7.0  
14.0  
10  
20  
1.5  
3
6
12  
0.1  
ROUT  
kΩ  
Gain = 25  
Gain = 50  
Gain = 100  
Gain = 200  
OUT Low Voltage  
OUT High Voltage  
VOL  
VOH  
mV  
V
VOH = VRS- - VOUT (Note 6)  
Note 1: All devices are 100% production tested at TA = +25°C. All temperature limits are guaranteed by product  
characterization.  
Note 2: Extrapolated to VOUT = 0. ICC is the total current into the RS+ and the RS- pins.  
Note 3: Input offset voltage VOS is extrapolated from VOUT with VSENSE set to 1mV.  
Note 4: Gain error is calculated by applying two values for VSENSE and then calculating the error of the actual slope vs. the  
ideal transfer characteristic:  
For GAIN = 25, the applied VSENSE is 20mV and 120mV.  
For GAIN = 50, the applied VSENSE is 10mV and 60mV.  
For GAIN = 100, the applied VSENSE is 5mV and 30mV.  
For GAIN = 200, the applied VSENSE is 2.5mV and 15mV.  
Note 5: The device is stable for any capacitive load at VOUT  
.
Note 6: VOH is the voltage from VRS- to VOUT with VSENSE = 3.6V/GAIN.  
TSM9634DS r1p0  
Page 3  
RTFDS  
TSM9634  
TYPICAL PERFORMANCE CHARACTERISTICS  
VRS+ = VRS- = 3.6V; TA = +25°C, unless otherwise noted.  
Gain Error Histogram  
Input Offset Voltage Histogram  
35  
30  
30  
25  
20  
15  
10  
25  
20  
15  
10  
5
5
0
0
-0.4  
-0.2  
0
0.2  
0.4  
10  
20  
30  
40  
50  
0
GAIN ERROR - %  
INPUT OFFSET VOLTAGE - µV  
Input Offset Voltage vs Common-Mode Voltage  
Supply Current vs Temperature  
40  
1
28V  
0.8  
0.6  
0.4  
0.2  
0
35  
30  
25  
20  
1.8V  
3.6V  
-40  
-15  
10  
35  
60  
85  
0
5
10  
20  
25  
30  
15  
SUPPLY VOLTAGE - Volt  
TEMPERATURE - °C  
Supply Current vs Common-Mode Voltage  
Input Offset Voltage vs Temperature  
80  
60  
1
0.8  
0.6  
0.4  
0.2  
0
40  
20  
0
-20  
-40  
-15  
35  
60  
85  
0
5
10  
20  
25  
30  
10  
15  
SUPPLY VOLTAGE - Volt  
TEMPERATURE - °C  
Page 4  
TSM9634DS r1p0  
RTFDS  
TSM9634  
TYPICAL PERFORMANCE CHARACTERISTICS  
VRS+ = VRS- = 3.6V; TA = +25°C, unless otherwise noted.  
Gain Error vs Common-Mode Voltage  
Gain Error vs. Temperature  
0.5  
0.4  
0.3  
0.2  
0.3  
0.2  
0.1  
0
0.1  
0
-0.1  
0
5
10  
15  
20  
25  
30  
-40  
-15  
10  
35  
60  
85  
SUPPLY VOLTAGE - Volt  
TEMPERATURE - °C  
VOUT vs VSENSE @ Supply = 3.6V  
VOUT vs VSENSE @ Supply = 1.6V  
4
3.5  
3
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
G = 100  
G = 50  
G = 100  
G = 50  
2.5  
2
G = 25  
G = 25  
1.5  
1
0.5  
0
0
50  
100  
150  
0
100  
20  
40  
60  
80  
VSENSE - mV  
VSENSE - mV  
Common-Mode Rejection vs Frequency  
Small-Signal Gain vs Frequency  
5
0
0
-20  
-40  
-60  
-80  
-100  
G = 50  
G = 50, 100  
-5  
G = 100  
G = 25  
-10  
-15  
-20  
-25  
G = 25  
-120  
-140  
-30  
-35  
0.001 0.01 0.1  
10  
100 1000  
1
0.001 0.01 0.1  
1
10  
100 1000  
FREQUENCY - kHz  
FREQUENCY - kHz  
TSM9634DS r1p0  
Page 5  
RTFDS  
TSM9634  
TYPICAL PERFORMANCE CHARACTERISTICS  
VRS+ = VRS- = 3.6V; TA = +25°C, unless otherwise noted.  
Large-Signal Pulse Response, Gain = 50  
Small-Signal Pulse Response, Gain = 50  
200µs/DIV  
200µs/DIV  
Large-Signal Pulse Response, Gain = 25  
Small-Signal Pulse Response, Gain = 25  
200µs/DIV  
200µs/DIV  
Small-Signal Pulse Response, Gain = 100  
Large-Signal Pulse Response, Gain = 100  
200µs/DIV  
200µs/DIV  
Page 6  
TSM9634DS r1p0  
RTFDS  
TSM9634  
PIN FUNCTIONS  
PIN  
SOT23  
LABEL  
FUNCTION  
5
4
1, 2  
3
RS+  
RS-  
GND  
OUT  
External Sense Resistor Power-Side Connection  
External Sense Resistor Load-Side Connection  
Ground. Connect these pins to analog ground.  
Output Voltage. VOUT is proportional to VSENSE = VRS+ - VRS-  
BLOCK DIAGRAMS  
DESCRIPTION OF OPERATION  
The internal configuration of the TSM9634 a  
unidirectional high-side, current-sense amplifier - is  
based on a commonly-used operational amplifier (op  
amp) circuit for measuring load currents (in one  
direction) in the presence of high-common-mode  
voltages. In the general case, a current-sense  
amplifier monitors the voltage caused by a load  
current through an external sense resistor and  
generates an output voltage as a function of that load  
current. Referring to the typical application circuit on  
Page 1, the inputs of the op-amp-based circuit are  
connected across an external RSENSE resistor that  
is used to measure load current. At the non-inverting  
input of the TSM9634 (the RS+ terminal), the applied  
voltage is ILOAD x RSENSE. Since the RS- terminal is  
the non-inverting input of the internal op amp, op-amp  
feedback action forces the inverting input of the  
internal op amp to the same potential  
RSENSE (VSENSE) and the voltage drop across R1 (at  
the RS+ terminal) are equal. To minimize any  
additional error because of op-amp input bias current  
mismatch, both R1s are the same value.  
Since the internal p-channel FET’s source is  
connected to the inverting input of the internal op  
amp and since the voltage drop across R1 is the  
same as the external VSENSE, op amp feedback action  
drives the gate of the FET such that the FET’s drain-  
source current is equal to:  
VSENSE  
ꢁS  
R1  
(ILOAD x RSENSE). Therefore, the voltage drop across  
TSM9634DS r1p0  
Page 7  
RTFDS  
TSM9634  
or  
stage is protected against input overdrive by use of  
an output current-limiting circuit of 3mA (typical) and  
a 7V internal clamp protection circuit.  
LOAꢁ x RSENSE  
ꢁS  
R1  
Table 1: Internal Gain Setting Resistors (Typical  
Values)  
Since the FET’s drain terminal is connected to  
ROUT, the output voltage of the TSM9634 at the  
OUT terminal is, therefore;  
GAIN (V/V) R1 (Ω) ROUT (Ω) Part Number  
ROUT  
25  
50  
100  
200  
400  
200  
100  
100  
10k  
10k  
10k  
20k  
TSM9634T  
TSM9634F  
TSM9634H  
TSM9634W  
VOUT ꢂ ꢀLOAꢁ x RSENSE  
x
R1  
The current-sense amplifier’s gain accuracy is  
therefore the ratio match of ROUT to R1. For each of  
the four gain options available, Table 1 lists the  
values for ROUT and R1. The TSM9634’s output  
APPLICATIONS INFORMATION  
and  
Choosing the Sense Resistor  
VOUT maxꢁ  
RSENSE  
Selecting the optimal value for the external RSENSE  
is based on the following criteria and for each  
commentary follows:  
GAꢀN ꢃ ꢀLOAmaxꢁ  
where the full-scale VSENSE should be less than  
VOUT(MAX)/GAIN at the application’s minimum RS+  
terminal voltage. For best performance with a 3.6V  
power supply, RSENSE should be chosen to  
generate a VSENSE of: a) 120mV (for the 25V/V GAIN  
option), b) 60mV (for the 50V/V GAIN option), c)  
30mV (for the 100V/V GAIN option), or d) 15mV (for  
the 200V/V GAIN option) at the full-scale ILOAD(MAX)  
current in each application. For the case where the  
minimum power supply voltage is higher than 3.6V,  
each of the four full-scale VSENSEs above can be  
increased.  
1) RSENSE Voltage Loss  
2) VOUT Swing vs. Applied Input Voltage at VRS+  
and Desired VSENSE  
3) Total ILOAD Accuracy  
4) Circuit Efficiency and Power Dissipation  
5) RSENSE Kelvin Connections  
1) RSENSE Voltage Loss  
For lowest IR voltage loss in RSENSE, the smallest  
usable value for RSENSE should be selected.  
3) Total ILOAD Accuracy  
2) VOUT Swing vs. Applied Input Voltage at VRS+  
and Desired VSENSE  
In the TSM9634’s linear region where  
VOUT < VOUT(max), there are two specifications related  
to the circuit’s accuracy: a) the TSM9634’s input  
offset voltage (VOS = 250μV, max) and b) its gain  
error (GE(max) = 0.5%). An expression for the  
TSM9634’s total output voltage (+ error) is given by:  
As there is no separate power supply pin for the  
TSM9634, the circuit draws its power from the  
applied voltage at both its RS+ and RS- terminals.  
Therefore, the signal voltage at the OUT terminal is  
bounded by the minimum supply voltage applied to  
the TSM9634.  
VOUT = [GAIN x (1 ± GE) x VSENSE] ± (GAIN x VOS)  
Therefore,  
A large value for RSENSE permits the use of smaller  
load currents to be measured more accurately  
because the effects of offset voltages are less  
significant when compared to larger VSENSE voltages.  
Due care though should be exercised as  
VOUT(max) = VRS+(min) - VSENSE(max) VOH(max)  
Page 8  
TSM9634DS r1p0  
RTFDS  
TSM9634  
previously mentioned with large values of RSENSE.  
between RSENSE and the TSM9634’s RS+ and RS-  
terminals are strongly recommended. The drawing in  
Figure 1 illustrates the connections between the  
current-sense amplifier and the current-sense  
resistor. The pcb layout should be balanced and  
symmetrical to minimize wiring-induced errors. In  
addition, the pcb layout for RSENSE should include  
good thermal management techniques for optimal  
RSENSE power dissipation.  
4) Circuit Efficiency and Power Dissipation  
IR losses in RSENSE can be large especially at high  
load currents. It is important to select the smallest,  
usable RSENSE value to minimize power dissipation  
and to keep the physical size of RSENSE small. If  
the external RSENSE is allowed to dissipate  
significant power, then its inherent temperature  
coefficient may alter its design center value, thereby  
reducing load current measurement accuracy.  
Precisely because the TSM9634’s input stage was  
designed to exhibit a very low input offset voltage,  
small RSENSE values can be used to reduce power  
dissipation and minimize local hot spots on the pcb.  
Optional Output Filter Capacitor  
If the TSM9634 is part of a signal acquisition system  
where its OUT terminal is connected to the input of  
an ADC with an internal, switched-capacitor track-  
and-hold circuit, the internal track-and-hold’s  
sampling capacitor can cause voltage droop at VOUT  
A 22nF to 100nF good-quality ceramic capacitor  
from the OUT terminal to GND should be used to  
minimize voltage droop (holding VOUT constant  
during the sample interval. Using a capacitor on the  
OUT terminal will also reduce the TSM9634’s small-  
signal bandwidth as well as band-limiting amplifier  
noise.  
.
5) RSENSE Kelvin Connections  
For optimal VSENSE accuracy in the presence of large  
load currents, parasitic pcb track resistance should  
be minimized. Kelvin-sense pcb connections  
Using the TSM9634 in Bidirectional Load Current  
Applications  
In many battery-powered systems, it is oftentimes  
necessary to monitor a battery’s discharge and  
charge currents. To perform this function, a  
bidirectional current-sense amplifier is required. The  
circuit illustrated in Figure 2 shows how two  
TSM9634s can be configured as a bidirectional  
current-sense amplifier. As shown in the figure, the  
Figure 1: Making PCB Connections to the Sense  
Resistor (drawing is not to scale).  
Figure 2: Using Two TSM9634s for Bidirectional Load Current Detection  
TSM9634DS r1p0  
Page 9  
RTFDS  
TSM9634  
RS+/RS- input pair of TSM9634 #2 is wired opposite  
in polarity with respect to the RS+/RS- connections  
of TSM9634 #1. Current-sense amplifier #1  
therefore measures the discharge current and  
current-sense amplifier #2 measures the charge  
current. Note that both output voltages are  
measured with respect to GND. When the discharge  
current is being measured, VOUT1 is active and VOUT2  
is zero; for the case where charge current is being  
measured, VOUT1 is zero, and VOUT2 is active.  
PC Board Layout and Power-Supply Bypassing  
For optimal circuit performance, the TSM9634  
should be in very close proximity to the external  
current-sense resistor and the pcb tracks from  
RSENSE to the RS+ and the RS- input terminals of  
the TSM9634 should be short and symmetric. Also  
recommended are a ground plane and surface  
mount resistors and capacitors.  
Page 10  
TSM9634DS r1p0  
RTFDS  
TSM9634  
PACKAGE OUTLINE DRAWING  
5-Pin SOT23 Package Outline Drawing  
(N.B., Drawings are not to scale)  
NOTES:  
1. Dimensions and tolerances are as per ANSI Y14.5M, 1982.  
2. Package surface to be matte finish VDI 11~13.  
5
2.80 - 3.00  
3. Die is facing up mold and facing down for trim/form,  
ie, reverse trim/form.  
0.950  
0.95  
TYP  
TYP  
4. The foot length measuring is based on the gauge plane method.  
5.Dimensions are exclusive of mold flash and gate burr.  
6. Dimensions are exclusive of solder plating.  
7. All dimensions are in mm.  
8. This part is compliant with EIAJ spec. and JEDEC MO-178 AA  
0.30 - 0.50  
9. Lead span/stand off height/coplanarity are considered as special  
characteristic.  
1.90 Max  
10º TYP  
1.50 1.75  
10º TYP  
0.09 1.45  
0.60 0.80  
0.90 - 1.30  
0º- 8º  
0.25  
0.00 - 0.15  
0.09 - 0.20  
5
0.30 - 0.55  
Gauge Plane  
10º TYP  
10º TYP  
0.10 Max  
0.50 0.70  
0.50 Max  
0.30 Min  
0.20 Max  
0.09 Min  
Information furnished by Touchstone Semiconductor is believed to be accurate and reliable. However, Touchstone Semiconductor does not  
assume any responsibility for its use nor for any infringements of patents or other rights of third parties that may result from its use, and all  
information provided by Touchstone Semiconductor and its suppliers is provided on an AS IS basis, WITHOUT WARRANTY OF ANY KIND.  
Touchstone Semiconductor reserves the right to change product specifications and product descriptions at any time without any advance  
notice. No license is granted by implication or otherwise under any patent or patent rights of Touchstone Semiconductor. Touchstone  
Semiconductor assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
applications using Touchstone Semiconductor components. To minimize the risk associated with customer products and applications,  
customers should provide adequate design and operating safeguards. Trademarks and registered trademarks are the property of their  
respective owners.  
Touchstone Semiconductor, Inc.  
Page 11  
630 Alder Drive, Milpitas, CA 95035  
+1 (408) 215 - 1220 www.touchstonesemi.com  
TSM9634DS r1p0  
RTFDS  

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