TDA2075A [TRIPATH]
STEREO CLASS-T DIGITAL AUDIO AMPLIFIER DRIVER USING DIGITAL POWER PROCESSINGTM TECHNOLOGY; 立体声CLASS -T数字音频放大器驱动器使用数字电源PROCESSINGTM技术
| 型号： | TDA2075A |
| 厂家： | 
TRIPATH TECHNOLOGY INC. |
| 描述： | STEREO CLASS-T DIGITAL AUDIO AMPLIFIER DRIVER USING DIGITAL POWER PROCESSINGTM TECHNOLOGY |
| 文件： | 总24页 (文件大小：460K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Tripath Technology, Inc. - Technical Information
TDA2075A
STEREO CLASS-T DIGITAL AUDIO AMPLIFIER DRIVER USING
DIGITAL POWER PROCESSINGTM TECHNOLOGY
P r e l i m i n a r y I n f o r m a t i o n
R e v i s i o n 0 . 9 – O c t o b e r 2 0 0 5
G E N E R A L D E S C R I P T I O N
The TDA2075A is a two-channel, amplifier driver, that uses Tripath’s proprietary Digital Power Processing
(DPPTM) technology. The TDA2075A offers higher integration over previous Tripath amplifiers driver
chipsets while providing exceptional audio performance for real world applications. Class-T amplifiers
offer both the audio fidelity of Class-AB and the power efficiency of Class-D amplifiers.
The TDA2075A is typically configured as a split-supply, single-ended, stereo amplifier. The TDA2075A
can also be configured single-supply, single-ended, stereo amplifier, via external component choice. For
applications that require bridged output drive, please refer to the TDA1400.
Applications
ꢀ
ꢀ
ꢀ
ꢀ
Powered DVD Players
Features
Mini-Compo Systems
Audio/Video Amplifiers & Receivers
Multimedia Speakers
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
Class-T architecture with proprietary DPP
“Audiophile” Sound Quality
Full Audio Bandwidth, 20Hz to 20kHz
High Efficiency
Benefits
Supports wide range of output power levels
and output loads by changing supply voltage
and external Mosfets
ꢀ
ꢀ
ꢀ
Reduced system cost with smaller/less
expensive power supply and heat sink
Signal fidelity equal to high quality
Class-AB amplifiers
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
Compatible with unregulated power supplies
Output over-current protection
Over- and under-voltage protection
Over-temperature protection
High dynamic range compatible with digital
media such as CD and DVD
48-Pin LQFP Package
1
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
Absolute Maximum Ratings (Note 1)
SYMBOL
V5
Vlogic
V10
PARAMETER
Value
6
V5 + 0.3
12
UNITS
V
V
5V Power Supply
Input logic level
10V Power Supply
V
TSTORE
Storage Temperature Range
-55º to 150º
+/-70
°C
V
VPP, VNN Supply Voltage (Note 5)
TA
TJ
Operating Free-air Temperature Range
Junction Temperature
-40º to 85º
150º
°C
°C
ESDHB
ESD Susceptibility – Human Body Model (Note 2)
All pins
2000
200
V
V
ESDMM
ESD Susceptibility – Machine Model (Note 3)
All pins
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
See the table below for Operating Conditions.
Note 2: Human body model, 100pF discharged through a 1.5KΩ resistor.
Note 3: Machine model, 220pF – 240pF discharged through all pins.
Operating Conditions (Note 4)
SYMBOL
V5
V10
TA
VPP
VNN
PARAMETER
MIN.
4.5
9
-40
15
TYP.
5
10
MAX. UNITS
5V Power Supply
10V Power Supply
5.5
V
11
V
Operating Temperature Range
Positive Supply Voltage (note 5)
Negative Supply Voltage (note 5)
25
85
65
°C
V
-15
-65
V
Note 4: Recommended Operating Conditions indicate conditions for which the device is functional.
See Electrical Characteristics for guaranteed specific performance limits.
Note 5: The supply limitation is based on the internal over-current detection circuit. This limitation is
subject to additional characterization. In addition, depending on feedback configuration, the TDA2075A
can be used in single-supply applications, in which case, the negative supply, VNN, is not needed.
Thermal Characteristics
SYMBOL
PARAMETER
Value
UNITS
Junction-to-ambient Thermal Resistance (still air)
TBD
C/W
θ
JA
2
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
Electrical Characteristics TDA2075A (Note 6)
TA = 25 °C. See Application/Test Circuit on page 7. Unless otherwise noted, the supply voltages are
V5=5V, V10=10V, and VPP=|VNN|=40V.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNITS
I5Q
Quiescent Current
50
mA
(Mute = 0V)
I10Q
Quiescent Current
FETs: FQP13N10, FQP12P10
60
40
40
50
mA
mA
mA
mA
(Mute = 0V)
RBBM = 20.0kΩ
IVPPQ
IVNNQ
I5MUTE
VTOC
Quiescent Current
(Mute = 0V)
FETs: FQP13N10, FQP12P10
RBBM = 20.0kΩ
FETs: FQP13N10, FQP12P10
RBBM = 20.0kΩ
Quiescent Current
(Mute = 0V)
Mute Supply Current
(Mute = 5V)
Over Current Sense Voltage
Threshold
+/-5V Common Mode Voltage
+/-40V Common Mode Voltage
Over-voltage turn on (muted)
Over-voltage turn off (mute off)
Under-voltage turn off (mute off)
Under-voltage turn on (muted)
Over-voltage turn on (muted)
Over-voltage turn off (mute off)
Under-voltage turn off (mute off)
Under-voltage turn on (muted)
Over-voltage turn on (muted)
Over-voltage turn off (mute off)
Under-voltage turn off (mute off)
Under-voltage turn on (muted)
TBD
TBD
0.55
0.55
138
135
55
TBD
TBD
TBD
V
IVPPSENSE VPPSENSE Threshold Currents
µA
µA
µA
µA
V
TBD
TBD
TBD
52
VVPPSENSE Threshold Voltages with
RVPP1 = RVPP2 = 402KΩ
(Note 7)
55.5
54.3
22.1
20.9
138
135
51
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
V
V
V
IVNNSENSE VNNSENSE Threshold Currents
µA
µA
µA
µA
V
48
VVNNSENSE Threshold Voltages with
RVNN1 = 402KΩ
Over-voltage turn on (muted)
Over-voltage turn off (mute off)
Under-voltage turn off (mute off)
Under-voltage turn on (muted)
55.5
54.3
20.5
19.3
TBD
TBD
TBD
TBD
V
V
RVNN2 = 1.2MΩ
V
(Note 7)
Note 6: Minimum and maximum limits are guaranteed but may not be 100% tested.
Note 7: These supply voltages are calculated using the IVPPSENSE and IVNNSENSE values shown in the Electrical
Characteristics table. The typical voltage values shown are calculated using a RVPP and RVNN values without
any tolerance variation. The minimum and maximum voltage limits shown include either a +1% or –1% (+1%
for Over-voltage turn on and Under-voltage turn off, -1% for Over-voltage turn off and Under-voltage turn on)
variation of RVPP or RVNN off the nominal 402kohm and 1.2Mohm values. These voltage specifications are
examples to show both typical and worst case voltage ranges for the given RVPP and RVNN resistor values.
Please refer to the Application Information section for a more detailed description of how to calculate the over
and under voltage trip voltages for a given resistor value.
3
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
Performance Characteristics
TA = 25 °C. Unless otherwise noted, the supply voltages are V5 = 5V, V10 = 10V, and VPP = |VNN| =
40V, the input frequency is 1kHz and the measurement bandwidth is 20kHz. See Application/Test Circuit.
SYMBOL
POUT
PARAMETER
Output Power
(continuous output)
CONDITIONS
THD+N = 0.1%, RL = 4Ω
MIN.
TYP.
MAX. UNITS
145
160
200
105
115
150
80
W
W
W
W
W
W
W
W
W
THD+N = 1%,
RL = 4Ω
THD+N = 10%, RL = 4Ω
THD+N = 0.1%, RL = 6Ω
THD+N = 1%,
RL = 6Ω
THD+N = 10%, RL = 6Ω
THD+N = 0.1%, RL = 8Ω
THD+N = 1%,
RL = 8Ω
90
115
THD+N = 10%, RL = 8Ω
POUT = 60W, RL = 8Ω
THD + N Total Harmonic Distortion Plus
Noise
IHF-IM
0.01
%
IHF Intermodulation Distortion
0.03
%
19kHz, 20kHz, 1:1 (IHF), RL = 8Ω
P
OUT = 25W/Channel
SNR
Signal-to-Noise Ratio
104.4
dB
A Weighted, RL = 4Ω,
POUT = 200W/Channel
Power Efficiency
Amplifier Gain
92
20.09
%
V/V
η
P
P
OUT = 115W/Channel, RL = 8Ω
OUT = 10W/Channel, RL = 8Ω
AV
See Application / Test Circuit
AVERROR
eNOUT
Channel to Channel Gain Error
Output Noise Voltage
0.5
1.0
dB
P
OUT = 10W/Channel, RL = 8Ω
See Application / Test Circuit
A-Weighted, input shorted
RFBC = 10kΩ, RFBB = 1.1kΩ, and RFBA
= 1.0kΩ
170
µV
VOFFSET
Output Offset Voltage
No Load, Mute = Logic Low
1% RFBA, RFBB and RFBC resistors
-1.0
V
4
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
TDA2075A Pinout
48-pin LQFP
(Top View)
36 35 34 33 32 31 30 29 28 27 26 25
NC
37
38
39
40
41
42
43
44
45
46
47
48
24
23
22
21
20
19
18
17
16
15
14
13
PGND
NC
HO2
NC
L02
NC
NC
LO1
NC
HO1
NC
PGND
VNNSENSE
OVRLDB
VPPSENSE
AGND
AGND
V5
V5
OAOUT1
INV1
MUTE
NC
1
2
3
4
5
6
7
8
9
10 11 12
5
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
Pin Description
Pin
1
Function
Description
OAOUT2
Output of inverting-input stage (Channel 2)
2
INV2
Negative input of inverting op-amp with 2.5VDC of bias (Channel 2)
3
BIASCAP
Bandgap reference times two (typically 2.5VDC). Used to set the common
mode voltage for the input op amps. This pin is not capable of driving external
circuitry.
4
DCMP
Internal mode selection. This pin must be connected to 0V or 5V for proper
device operation. Typically, this pin is connected to V5.
Analog Ground
5
6
7
AGND
V5
BBMSET
5 Volt power supply input.
Break-before-make timing control to prevent shoot-through in the output
MOSFETs. Please refer to the Application Information for additional
information.
8
9, 10
11
GATEOFF
OCSP1, OCSN1
FBKGND1
FBKOUT1
PGND
10V under-voltage fault pin (requires pull-up resistor)
Over-current detect pins (Channel 1)
Ground Kelvin feedback (Channel 1)
Negative switching feedback (Channel 1)
Power Ground
High side gate drive output (Channel 1)
Low side gate drive output (Channel 1)
Low side gate drive output (Channel 2)
High side gate drive output (Channel 2)
Power Ground
12
13
15
HO1
17
L01
20
LO2
22
24
HO2
PGND
25
V10
10 Volt power supply input. Used for gate drive circuitry.
Ground Kelvin feedback (Channel 2)
Negative switching feedback (Channel 2)
Over-current detect pins (Channel 2)
A logic high output indicates an under-voltage (5V or 10V), over-current or
over-temperature condition (requires pull-down resistor).
5 Volt power supply input.
26
FBKGND2
FBKOUT2
OCSN2, OCSP2
FAULT
27
28, 29
30
32
33
V5
OCD2
Over-Current Detect pin (Channel 2). This pin must be connected to AGND for
proper device operation.
34
35
REF
OCD1
Internal bandgap reference voltage; approximately 1.0 VDC.
Over-Current Detect pin (Channel 1). This pin must be connected to AGND
for proper device operation.
36
38
SUB
VNNSENSE
Substrate (connect to AGND)
Negative supply voltage sense input. This pin is used for both over and under
voltage sensing for the VNN supply.
39
40
OVRLDB
VPPSENSE
A logic low output indicates the input signal has overloaded the amplifier.
Positive supply voltage sense input. This pin is used for both over and under
voltage sensing for the VPP supply.
41
42
43
44
45
46
47
AGND
AGND
V5
Analog Ground
Analog Ground
5 Volt power supply input.
5 Volt power supply input.
V5
OAOUT1
INV1
Output of inverting-input stage (Channel 1)
Negative input of inverting op-amp with 2.5VDC of bias (Channel 1)
When set to logic high, both channels are in idle mode. When low (grounded),
both channels are fully operational (connect to FAULT pin).
Not Connected internally. These pins may be grounded or left floating on the
PCB layout.
MUTE
14,16,18,
19,21,23,
31,37,48
NC
6
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
Application / Test Circuit
VPP
**
RISA
TDA2075A
CS
CS
+
D_IS
DBIAS
Q ISP
RGS
4.7K
RISB
220uF
CKT
0.1uF
CHBR
33uF
CISA
1.0uF
CHBR
+
150K
0.1uF
1.0K
V10
V10
QP
QN
OAOUT1
INV1
45
46
RG
CG
15
HO1
LO
DG
DG
DDS
S_SUP
CKT
CI
11uH
RI
RF
1.0uF
**
RS
2.2uF
+
G_OFF
V5
20K
20K
**
CKT
S_SUP
RZ
-
CO
RG
CG
RL
4 - 8Ω
CKT
+
17 LO1
DDS
ROFB
0.22uF 10Ω,2W
AGND
470K
1.0uF
CISA
RGS
150K
CZ
FET controller
DBIAS
Q ISN
RISB
V5
0.22uF
ROFB
470K
**
RISA
1.0K
D_IS
ROFA
50K
1.0uF
4.7K
CKT
COF
V5
VNN
CS
OCSP1
OCSN1
0.1uF
9
Offset Trim
CS
0.1uF
+
Circuit
10
220uF
2.5V
AGND
CA
MUTE
V5
R FBA
1K
*RFBC
10K, 1%
0.1uF
3
12 FBKOUT1
BIASCAP
CFB
*RFBB
OCD2
OCD1
150pF
1.1K V5
33
35
R
FBA *R
10FKB,C1%
1K
11 FBKGND1
V5
Processing
&
Modulation
43, 44
41, 42
5V
*RFBB
1.1K
CS
0.1uF
AGND
SUB
GATEOFF
V5
8
6, 32
36
1
5V
CS
0.1uF
5
AGND
V10
OAOUT2
INV2
25
10V
CI
VPP
CS
**
CS
0.1uF
RI
20K
RF
RISA
CS
0.1uF
+
D_IS
2.2uF
V5
DBIAS
Q ISP
RGS
150K
20K
4.7K
RISB
220uF
CKT
2
CISA
1.0uF
CHBR
0.1uF
CHBR
33uF
+
13,24
+
-
PGND
+
1.0K
ROFB
V10
22
QP
QN
AGND
RG
DG
DG
470K
CG
HO2
LO
V5
DDS
S_SUP
CKT
11uH
ROFB
470K
1.0uF
**
RS
G_OFF
ROFA
50K
**
CKT
V10
S_SUP
RZ
CO
COF
RG
CG
RL
4 - 8Ω
20 LO2
CKT
DDS
0.22uF 10Ω,2W
Offset Trim
Circuit
1.0uF
RGS
150K
CZ
0.22uF
FET controller
DBIAS
Q ISN
AGND
RISB
CISA
V5
**
RISA
DCMP
1.0K
D_IS
CKT
4
1.0uF
4.7K
RREF
V5
REF
VNN
CS
34
OCSP2
OCSN2
29
28
CS
+
8.25K, 1%
RBBMSET
220uF
0.1uF
MUTE
V5
BBMSET
7
RFBA
1K
*RFBC
10K, 1%
20K, 1%
FBKOUT2
27
*RVNN1
VNNSENSE
VPPSENSE
38
CFB
220pF
*RFBB
VNN
1.1K V5
*RVNN2
*RVPP1
R
FBA *R
10FKB,C1%
V5
1K
26 FBKGND2
40
47
VPP
*RFBB
1.1K
0Ω
*RVPP2
Analog Ground
Power Ground
V5
V5
NC
14,16,18,19, 21, 23, 37, 48
30
RFLT
MUTE
* The values of these components must be adjusted based
on supply voltage range. See Application Information.
FAULT
10K
** Refer to the RB-TDA2075A document for a detailed
description of these optional circuits.
7
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
External Components Description (Refer to the Application/Test Circuit)
Components Description
RI
RF
CI
Inverting input resistance to provide AC gain in conjunction with RF. This input is
biased at the BIASCAP voltage (approximately 2.5VDC).
Feedback resistor to set AC gain in conjunction with RI. Please refer to the Amplifier
Gain paragraph, in the Application Information section.
AC input coupling capacitor which, in conjunction with RI, forms a high-pass filter at
.
fC = 1 (2πRICI)
RFBA
RFBB
RFBC
Feedback divider resistor connected to V5. This value of this resistor depends on
the supply voltage setting and helps set the TDA2075A gain in conjunction with RI,
RF, RFBA, and RFBC. Please see the Modulator Feedback Design paragraphs in the
Application Information Section.
Feedback divider resistor connected to AGND. This value of this resistor depends
on the supply voltage setting and helps set the TDA2075A gain in conjunction with
RI, RF, RFBA, and RFBC. Please see the Modulator Feedback Design paragraphs in
the Application Information Section.
Feedback resistor connected from either the OUT1 (OUT2) to FBKOUT1
(FBKOUT2) or PGND1 (PGND2) to FBKGND1 (FBKGND2). The value of this
resistor depends on the supply voltage setting and helps set the TDA2075A gain in
conjunction with RI, RF, RFBA,, and RFBB. It should be noted that RFBC must have a
power rating of greater than
. Please see the Modulator
)
P
= VPP2 (2RFBC
Feedback Design paragraphsDiInSSthe Application Information Section.
Feedback delay capacitor that both lowers the idle switching frequency and filters
very high frequency noise from the feedback signal, which improves amplifier
performance. The value of CFB should be different for channel 1 and channel 2 to
minimize noise coupling between the channels. Please refer to the Application /
Test Circuit.
CFB
ROFA
ROFB
COF
Potentiometer used to manually trim the DC offset on the output of the TDA2075A.
Resistor that limits the DC offset trim range and allows for precise adjustment.
Capacitor that filters the manual DC offset trim voltage.
RREF
Bias resistor. Locate close to pin 34 and ground to plane with a low impedance
connection to pins 41 and 42.
RBBMSET
Bias current setting resistor for the BBM setting. Locate close to pin 7 and ground
directly to pin 5. See Application Information on how to determine the value for
RBBM
.
CA
CS
BIASCAP decoupling capacitor. Locate close to pin 3 and ground to plane with a
low impedance connection to pins 41 and 42.
Supply decoupling capacitor for the power pins. For optimum performance, these
components should be located close to the TDA2075A and returned to their
respective ground as shown in the Application Circuit.
RVNN1
RVNN2
RVPP1
Main overvoltage and undervoltage sense resistor for the negative supply (VNN).
Please refer to the Electrical Characteristics Section for the trip points as well as the
hysteresis band. Also, please refer to the Over / Under-voltage Protection section in
the Application Information for a detailed discussion of the internal circuit operation
and external component selection. When using a single power supply, this circuit
can be defeated by connecting a 16KΩ resistor to AGND.
Secondary overvoltage and undervoltage sense resistor for the negative supply
(VNN). This resistor accounts for the internal VNNSENSE bias of 1.25V. Nominal
resistor value should be three times that of RVNN1. Please refer to the Over / Under-
voltage Protection section in the Application Information for a detailed discussion of
the internal circuit operation and external component selection. When using a single
power supply, omit RVNN2
.
Main overvoltage and undervoltage sense resistor for the positive supply (VPP).
Please refer to the Electrical Characteristics Section for the trip points as well as the
hysteresis band. Also, please refer to the Over / Under-voltage Protection section in
the Application Information for a detailed discussion of the internal circuit operation
and external component selection.
RVPP2
Secondary overvoltage and undervoltage sense resistor for the positive supply
8
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
(VPP). This resistor accounts for the internal VPPSENSE bias of 2.5V. Nominal
resistor value should be equal to that of RVPP1. Please refer to the Over / Under-
voltage Protection section in the Application Information for a detailed discussion of
the internal circuit operation and external component selection.
RS
Over-current sense resistor. Please refer to the section, Setting the Over-current
Threshold, in the Application Information for a discussion of how to choose the value
of RS to obtain a specific current limit trip point.
CHBR
Supply decoupling for the high current Half-bridge supply pins. These components
must be located as close to the output MOSFETs as possible to minimize output
ringing which causes power supply overshoot. By reducing overshoot, these
capacitors maximize both the TDA2075A and output MOSFET reliability. These
capacitors should have good high frequency performance including low ESR and
low ESL. In addition, the capacitor rating must be twice the maximum VPP voltage.
Panasonic EB capacitors are ideal for the bulk storage (nominally 33uF) due to their
high ripple current and high frequency design.
RG
Gate resistor, which is used to control the MOSFET rise/ fall times. This resistor
serves to dampen the parasitics at the MOSFET gates, which, in turn, minimizes
ringing and output overshoots. The typical power rating is 1/2 watt.
Gate diode, which adds additional BBM and serves to match the unequal rise and
fall times of QN and QP. An ultra-fast diode with a current rating of at least 200mA
should be used.
DG
DBIAS
Diode that keeps the gate capacitor biased at the proper voltage when the supply
voltage decreases.
CG
Gate capacitor that ac-couples the TDA2075A from the high voltage MOSFETs.
Bias resistors for the increasing supply circuits.
RISA, RISB
CISA
Bias capacitor for the increasing supply circuits.
QISP
P-channel bipolar transistor for the circuit which charges the high side gate
capacitors, CG, to VPP, in the case where the VPP supply increases in magnitude.
N-channel bipolar transistor for the circuit which charges the low side gate
capacitors, CG, to VNN, in the case where the VNN supply increases in magnitude.
Zobel capacitor, which in conjunction with RZ, terminates the output filter at high
frequencies. Use a high quality film capacitor capable of sustaining the ripple current
caused by the switching outputs.
QISN
CZ
QP
QN
RZ
P-channel power-MOSFET of the output stage.
N-channel power-MOSFET of the output stage.
Zobel resistor, which in conjunction with CZ, terminates the output filter at high
frequencies. The combination of RZ and CZ minimizes peaking of the output filter
under both no load conditions or with real world loads, including loudspeakers which
usually exhibit a rising impedance with increasing frequency. Depending on the
program material, the power rating of RZ may need to be adjusted. The typical
power rating is 2 watts.
LO
Output inductor, which in conjunction with CO, demodulates (filters) the switching
waveform into an audio signal. Forms a second order filter with a cutoff frequency
of
and a quality factor of
.
LO CO
f
= 1 (2π L
C )
O
Q = RL CO
C
O
CO
Output capacitor, which, in conjunction with LO, demodulates (filters) the switching
waveform into an audio signal. Forms a second order low-pass filter with a cutoff
frequency of
and a quality factor of
)
O
.
f
= 1 (2π L
C
Q = RL CO 2 L O C O
C
O
Use a high quality film capacitor capable of sustaining the ripple current caused by
the switching outputs.
DDS
These diodes must be connected from either the drain of the p-channel MOSFET to
the source of the n-channel MOSFET, or the source of the p-channel MOSFET to
the drain of the n-channel MOSFET. This diode absorbs any high frequency
overshoots caused by the output inductor LO during high output current conditions.
In order for this diode to be effective it must be connected directly to the two
MOSFETs. An ultra-fast recovery diode that can sustain the entire supply voltage
should be used here. In most applications a 100V or greater diode must be used.
Resistor that turns QN and QP off when no signal is present.
RGS
RFLT
Pull-down resistor for the open-drain Fault circuit.
9
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
Typical Performance Characteristics
THD+N versus Output Power
THD+N versus Frequency
10
10
RL = 4 Ω
RL = 4Ω
VPP = |VNN| = 30V, 35V and 40V
f = 1kHz
Pout = 25W / Channel
VPP = |VNN| = 40V
BW = 22Hz-22kHz
BW = 22Hz - 20kHz(AES17)
1
0.1
%
0.1
%
%
%
0.01
0.01
0.001
0.001
1
2
5
10
20
50
100
200 300
10
20
50
100
200
500
1k
2k
5k
5k
5k
10k 20k
10k 20k
10k 20k
W
Hz
THD+N versus Output Power
THD+N versus Frequency
10
1
10
RL = 6Ω
RL = 6Ω
VPP = |VNN| = 30V, 35V and 40V
f = 1kHz
BW = 22Hz - 20kHz(AES17)
Pout = 25W / Channel
V PP = |V NN| = 40V
BW = 22Hz-22kHz
0.1
%
0.1
0.01
0.01
0.001
0.001
10
1
2
5
10
20
50
100
200 300
20
50
100
200
500
1k
2k
W
Hz
THD+N versus Output Power
THD+N versus Frequency
10
1
10
RL = 8Ω
RL = 8Ω
VPP = |VNN| = 30V, 35V and 40V
f = 1kHz
Pout = 25W / Channel
VPP = |VNN| = 40V
BW = 22Hz-22kHz
BW = 22Hz - 20kHz(AES17)
0.1
%
0.1
0.01
0.01
0.001
0.001
1
2
5
10
20
50
100
200 300
10
20
50
100
200
500
Hz
1k
2k
W
10
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
Typical Performance Characteristics
Efficiency and Power Dissipation versus
OutputPower
Intermodulation Performance
+0
RL = 8Ω
90
45
40
35
19kHz, 20kHz, 1:1
0dBr = 12Vrms
FFT size = 32k
80
70
-20
Efficiency
-40 FFTSR = 65kHz
VPP = |VNN| = 40V
60
50
40
30
25
20
d
B
r
BW = 22Hz - 80kHz
-60
Pow er Dissipation
-80
30
20
15
10
A
-100
VPP = |VNN|= 40V
RL = 4Ω
10
0
5
0
f= 1kHz
-120
BW= 22Hz -20kHz(AES17)
150
175
200
225
0
0
0
25
50
75
100
125
-140
Output Pow er per channel
(W)
20
50 100 200
500 1k
Hz
2k
5k
10k
30k
Efficiency and Power Dissipation versus
OutputPower
Noise Floor
-70
-80
VPP = |VNN| = 40V
FFT size = 32k
100
90
20
18
16
FFTSR = 48kHz
BW = 22Hz-20kHz(AES17)
80
70
Efficiency
14
12
10
8
-90
60
50
40
30
20
d
B
V
Pow er Dissipation
-100
6
VPP = |VNN|= 40V
4
RL= 6Ω
-110
-120
f= 1kHz
10
0
2
BW= 22Hz -20kHz(AES17)
0
150
175
25
50
75
100
125
Output Pow er per channel
(W)
20
50
100
200
500
1k
Hz
2k
5k
10k
20k
Efficiency and Power Dissipation versus
OutputPower
Channel Separation versus Frequency
T
T
T
+0
100
90
0dBr = 12Vrms
20
18
VPP = |VNN| = 40V
BW = 22Hz - 20kHz
-20
80
70
16
14
Efficiency
60
50
40
30
20
12
10
d
-40
-60
B
r
8
6
4
A
Pow er Dissipation
VPP = |VNN|= 40V
L = 8Ω
f= 1kHz
BW= 22Hz -20kHz(AES17)
R
-80
2
0
125
10
0
25
50
75
100
Output Pow er per channel
(W)
-100
20
50
100
200
1k
Hz
2k
5k
10k
20k
500
11
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
Application Information
Figure 1 is a simplified diagram of one channel (Channel 1) of a TDA2075A amplifier to assist in
understanding its operation.
TDA2075A
OCSN1
OCSP1
10
9
VPP
OVER
CS
CURRENT
DETECTION
OAOUT1
45
RF
CI
RI
V5
V10
V10
CG
QP
QN
RG
RG
INV1 46
ROFB
+
-
15
HO1
+
C HBR
AGND
FET
CONTROLLER
RS
Y1B
IN1
V5
CG
OUTPUT
FILTER
Processing
&
17 LO1
ROFA
RL
Modulation
COF
2.5V
Offset Trim
Circuit
C
A BIASCAP
3
VNN
V10
CS
25
10V
5V
CS
CS
13,24
6
PGND
V5
REF 34
5
R REF
AGND
RVNN1
VNNSENSE 38
V5
VNN
VPP
OVER/
UNDER
R VPP1
VOLTAGE
VPPSENSE
40
DETECTION
RFBA
RFBA
RFBC
RVNN2
RVPP2
12
FBKOUT1
11 FBKGND1
V5
V5
RFBC
CFB
V5
32,43,44
R FBB
RFBB
5V
CS
AGND 41,42
Analog Ground
Power Ground
Figure 1: Simplified TDA2075A Amplifier
TDA2075A Basic Amplifier Operation
The audio input signal is fed to the processor internal to the TDA2075A, where a switching pattern is
generated. The average idle (no input) switching frequency is approximately 700kHz. With an input
signal, the pattern is spread spectrum and varies between approximately 200kHz and 1.5MHz depending
on input signal level and frequency. These switching patterns are inputted to a MOSFET driver and then
outputted to HO1 and LO1 which are ac-coupled to a complementary pair of power MOSFETs. The
output of the MOSFETs is a power-amplified version of the switching pattern that switches between VPP
and VNN. This signal is then low-pass filtered to obtain an amplified reproduction of the audio input
signal.
The processor is operated from a 5-volt supply while the FET driver is operated from a 10-volt supply.
The FET driver inserts a “break-before-make” dead time between the turn-off of one transistor and the
turn-on of the other in order to minimize shoot-through currents in the external MOSFETs. The dead time
can be programmed by adjusting RBBMSET. Feedback information from the output of the complementary
FETs is supplied to the processor via FBKOUT1. Additional feedback information to account for ground
bounce is supplied via FBKGND1.
Complementary MOSFETs are used to formulate a half-bridge configuration for the power stage of the
amplifier. The gate capacitors, CG, are used to ac-couple the FET driver to the complementary
MOSFETs. The gate resistors, RG, are used to control MOSFET slew rate and thereby minimize voltage
overshoots.
12
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
Circuit Board Layout
The TDA2075A is a power (high current) amplifier that operates at relatively high switching frequencies.
The output of the amplifier switches between VPP and VNN at high speeds while driving large currents.
This high-frequency digital signal is passed through an LC low-pass filter to recover the amplified audio
signal. Since the amplifier must drive the inductive LC output filter and speaker loads, the amplifier
outputs can be pulled above the supply voltage and below ground by the energy in the output inductance.
To avoid subjecting the TDA2075A and the complementary MOSFETs to potentially damaging voltage
stress, it is critical to have a good printed circuit board layout. It is recommended that Tripath’s layout and
application circuit be used for all applications and only be deviated from after careful analysis of the
effects of any changes. Please refer to the TDA2075A reference board document, RB-TDA2075A,
available on the Tripath website, at www.tripath.com.
The trace that connects the drain of the p-channel output MOSFET to the drain of the n-channel output
MOSFET is very important. This connection should be as wide and short as possible. A jumper wire of
16 gauge or more can be used in parallel with the trace to reduce any trace resistance or inductance.
Any resistance or inductance on this trace can cause the switching output to over/undershoot potentially
causing damage to both the TDA2075A and the output MOSFETs.
The following components are important to place near the TDA2075A or output MOSFET pins. The
recommendations are ranked in order of layout importance, either for proper device operation or
performance considerations.
-
The capacitors, CHBR, provide high frequency bypassing of the amplifier power supplies and will
serve to reduce spikes across the supply rails. Please note that both MOSFET half-bridges
must be decoupled separately. In addition, the voltage rating for CHBR should be at least 150V
as this capacitor is exposed to the full supply range, VPP-VNN.
-
C
FB removes very high frequency components from the amplifier feedback signals and lowers
the output switching frequency by delaying the feedback signals. In addition, the value of CFB is
different for channel 1 and channel 2 to keep the average switching frequency difference
greater than 40kHz. This minimizes in-band audio noise. The capacitors, CFB, should be
surface mount types, located on the “solder” side of the board as close to their respective
TDA2075A pins as possible.
-
-
DDS should be placed as close to the drain and source of the output MOSFETs as possible with
direct routing either from the drain of the p-channel MOSFET to the source of the n-channel
MOSFET or from the source of the p-channel MOSFET to the drain of the n-channel MOSFET.
The output over/undershoots are very high-speed transients. If these diodes are placed too far
away from the MOSFETs, they will be ineffective.
To minimize noise pickup and minimize THD+N, RFBA, RFBB, and RFBC should be located as
close to the TDA2075A as possible. Make sure that the routing of the high voltage feedback
lines is kept far away from the input op amps or significant noise coupling may occur. It is best
to shield the high voltage feedback lines by using a ground plane around these traces as well
as the input section. The feedback and feedback ground traces should be routed together in
parallel.
-
The main supply decoupling capacitors, CS, should be located close to the output devices, QN
and QP. These will absorb energy when DSD and DDS conduct. Also, the bulk decoupling
capacitors, CS, will shunt energy generated by the main supply lead trace inductance.
Some components are not sensitive to location but are very sensitive to layout and trace routing.
-
For proper over-current detection, the sense lines connected to RS must be kelvin connected
directly from the terminals of RS back to OCSP1 (OCSP2) and OCSN1 (OCSN2). The traces
should be run in parallel back to the TDA2075A pins without deviation. Improper layout with
respect to RS will result in premature over-current detection due to additional IR losses.
13
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
-
-
-
To maximize the damping factor and reduce distortion and noise, the modulator feedback
connections should be routed directly to the pins of the output inductors. LO.
The output filter capacitor, CO, and zobel capacitor, CZ, should be star connected with the load
return. The output ground feedback signal should be taken from this star point.
The modulator feedback resistors, RFBA and RFBB, should all be grounded and attached to 5V
together. These connections will serve to minimize common mode noise via the differential
feedback.
-
The feedback signals that come directly from the output inductors are high voltage and high
frequency in nature. If they are routed close to the input nodes, INV1 and INV2, the high
impedance inverting op-amp pins will pick up noise. This coupling will result in significant
background noise, especially when the input is AC coupled to ground, or an external source
such as a CD player or signal generator is connected. Thus, care should be taken such that
the feedback lines are not routed near any of the input section.
-
To minimize the possibility of any noise pickup, the trace lengths of INV1 and INV2 should be
kept as short as possible. This is most easily accomplished by locating the input resistors, RI
and the input stage feedback resistors, RF as close to the TDA2075A as possible. In addition,
the offset trim resistor, ROFB, which connects to either INV1, or INV2, should be located close to
the TDA2075A input section.
TDA2075A Grounding
Proper grounding techniques are required to maximize TDA2075A functionality and performance.
Parametric parameters such as THD+N, Noise Floor and Crosstalk can be adversely affected if proper
grounding techniques are not implemented on the PCB layout. The following discussion highlights some
recommendations about grounding both with respect to the TDA2075A as well as general “audio system”
design rules.
The TDA2075A is divided into three sections: the input processor section, the FET driver section, and the
complementary output MOSFETs (high voltage) section. On the TDA2075A evaluation board, the ground
is also divided into distinct sections, Analog Ground (AGND) and Power Ground (PGND). To minimize
ground loops and keep the audio noise floor as low as possible, the two grounds must be only connected
at a single point.
The ground for the 5V supply is referred to as the analog ground and must be connected to pins 5, 41,
and 42 on the TDA2075A. Additionally, any external input circuitry such as preamps, or active filters,
should be referenced to the analog ground. The substrate, pin 36, should also be connected to the
analog ground.
For the power section, Tripath has traditionally used a “star” grounding scheme. Thus, the load ground
returns and the power supply decoupling traces are routed separately back to the power supply. In
addition, any type of shield or chassis connection would be connected directly to the ground star located
at the power supply. These precautions will both minimize audible noise and enhance the crosstalk
performance of the TDA2075A. It is possible to use a low impedance ground plane for PGND as well.
But the ground plane must be contiguous or ground currents from each channel can create crosstalk
issues. To minimize these issues, the FBKOUT1 (FBKOUT2) lines should be routed directly from the
PGND side of the load.
The TDA2075A incorporates a differential feedback system to minimize the effects of ground bounce and
cancel out common mode ground noise. Therefore, the feedback from the output ground for each
channel needs to be properly sensed. This can be accomplished by connecting the output ground
“sensing” trace directly to the star formed by the output ground return, output capacitor, CO, and the zobel
capacitor, CZ. Refer to the Application / Test Circuit for a schematic description.
14
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
TDA2075A Amplifier Gain
The gain of the TDA2075A is the product of the input stage gain and the modulator gain for the
TDA2075A. Please refer to the sections, Input Stage Design, and Modulator Feedback Design, for a
complete explanation of how to determine the external component values.
A V TDA2075A = A V INPUTSTAGE * A V MODULATOR
R F R FBC * (R FBA + R FBB
)
A V TDA2075A ≈ −
+ 1
R I
R FBA * R FBB
For example, using a TDA2075A with the following external components,
RI = 20kΩ
RF = 20kΩ
RFBA = 1kΩ
RFBB = 1.1kΩ
RFBC = 10.0kΩ
20k Ω 10.0k Ω * (1.0k Ω + 1.1k Ω)
V
V
A V TDA2075A ≈ −
+ 1 = - 20.09
20k Ω
1.0k Ω *1.1k Ω
Input Stage Design
The TDA2075A input stage is configured as an inverting amplifier, allowing the system designer flexibility
in setting the input stage gain and frequency response. Figure 2 shows a typical application where the
input stage is a constant gain inverting amplifier. The input stage gain should be set so that the maximum
input signal level will drive the input stage output to 4Vpp.
The gain of the input stage, above the low frequency high pass filter point, is that of a simple inverting
amplifier:
R
R
F
A
VINPUTSTAG E = −
I
TDA2075A
OAOUT1
45
V5
CI
RI
RF
INV1 46
+
-
+
INPUT1
AGND
BIASCAP
V5
CI
RI
+
1
2
INV2
+
-
RF
INPUT2
AGND
OAOUT2
Figure 2: TDA2075A Input Stage
15
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
Input Capacitor Selection
CI can be calculated once a value for RI has been determined. CI and RI determine the input low-
frequency pole. Typically this pole is set below 10Hz to minimize attenuation at 20Hz. CIN is calculated
according to:
CI = 1 / (2π x FP x RI)
where: RI = Input resistor value in ohms (typically 20kΩ)
FP = Input low frequency pole (typically 3.6Hz)
Modulator Feedback Design
The modulator converts the signal from the input stage to the high-voltage output signal. The optimum
gain of the modulator is determined from the maximum allowable feedback level for the modulator and
maximum supply voltages for the power stage. Depending on the maximum supply voltage, the feedback
ratio will need to be adjusted to maximize performance. The values of RFBA, RFBB and RFBC (see
explanation below) define the gain of the modulator. Once these values are chosen, based on the
maximum supply voltage, the gain of the modulator will be fixed.
For the best signal-to-noise ratio and lowest distortion, the maximum modulator feedback voltage should
be approximately 4Vpp. The modulator feedback resistor RFBC should be adjusted so that the modulator
feedback voltage is approximately 4Vpp. This will keep the gain of the modulator as low as possible and
still allow headroom so that the feedback signal does not clip the modulator feedback stage. Increasing
the value of RFBC will increase the modulator gain. Sometimes increasing the value of RFBC may be
necessary to achieve full power for the amplifier since the input stage will clip at approximately 4Vpp. This
will ensure that the input stage doesn’t clip before the output stage.
Figure 3 shows how the feedback from the output of the amplifier is returned to the input of the modulator.
The input to the modulator (FBKOUT1/FBKGND1 for channel 1) can be viewed as inputs to an inverting
differential amplifier. RFBA and RFBB bias the feedback signal to approximately 2.5V and RFBC scales the
large OUT1/OUT2 signal to down to 4Vpp.
1/2 TDA2075A
V5
RFBA
RFBA
RFBC
FBKOUT1
FBKGND1
Processing
&
OUT1
OUT1 GROUND
Modulation
RFBC
RFBB
RFBB
AGND
Figure 3: Modulator Feedback
16
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
For SPLIT-SUPPLY operation:
The modulator feedback resistors are:
R
R
FBA = User specified, typically 1KΩ
R
FBA * VPP
FBB
=
(VPP - 4)
R
FBA * VPP
R
FBC
=
4
R
FBC * (RFBA + RFBB )
A
V - MODULATOR
≈
+ 1
R
FBA * RFBB
The above equations assume that VPP=|VNN|.
For example, in a system with a SPLIT-SUPPLY of VPPMAX=40V and VNNMAX=-40V,
FBA = 1kΩ, 1%
R
RFBB = 1.111kΩ, use 1.1kΩ, 1%
FBC = 10.0kΩ, use 10.0kΩ, 1%
R
The resultant modulator gain is:
10.0k Ω * (1.0k Ω + 1.1k Ω)
1.0k Ω *1.1k Ω
A
V - MODULATOR
≈
+ 1 = 20.09V/V
For SINGLE-SUPPLY operation:
The modulator feedback resistors are:
R
R
FBB = User specified, typically 1KΩ
FBC = 350 *VPP − 1000
2333.33 * RFBC
FBB =
R
A
(1000 + RFBC
)
R
FBC * (RFBA + RFBB )
V - MODULATOR
≈
+ 1
R
FBA * RFBB
For example, in a system with a SINGLE-SUPPLY of VPPMAX = 40V,
RFBA = 2.17kΩ, use 2.15kΩ, 1%
R
FBB = 1kΩ, 1%
RFBC = 13.0kΩ, use 13.0kΩ, 1%
The resultant modulator gain is:
13.0k Ω * (1.0k Ω + 2.15k Ω)
A
V - MODULATOR
≈
+ 1 = 20.05V/V
1.0k Ω * 2.15k Ω
17
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
DC Offset
While the DC offset voltages that appear at the speaker terminals of a TDA2075A amplifier are typically
small, Tripath recommends that all offsets be removed with the circuit shown in Figure 4. It should be
noted that the DC voltage on the output of a muted TDA2075A with no load is approximately 2.5V. This
offset does not need to be nulled. The output impedance of the amplifier in mute mode is approximately
10KΩ thus explaining why the DC voltage drops to essentially zero when a typical load is connected.
2.2uF, 25V
20.0kΩ
+
Input to TDA2075A
(DC Bias ~2.5V)
R I
C I
V5
Ω
470k
Ω
470k
10kΩ
0.1uF, 50V
Figure 4: Offset Adjustment
Mute
When a logic high signal is supplied to MUTE, both amplifier channels are muted (complementary
MOSFETs are turned off). When a logic level low is supplied to MUTE, both amplifiers are fully
operational. There is a delay of approximately 240 milliseconds between the de-assertion of MUTE and
the un-muting of the TDA2075A.
Turn-on & Turn-off Noise
If turn-on or turn-off noise is present in a TDA2075A amplifier, the cause is frequently due to other
circuitry external to the TDA2075A. The TDA2075A has additional circuitry, as compared to previous
Tripath amplifiers, which virtually eliminate any transients during power up and power down. While the
TDA2075A has sophisticated circuitry to suppress turn-on and turn-off transients, the combination of the
power supply and other audio circuitry with the TDA2075A in a particular application may exhibit audible
transients. It is recommended that MUTE is active (pulled high) during power up and power down to
minimize any audible transients caused by audio circuitry that precedes the TDA2075A.
Over-current Protection
The TDA2075A has over-current protection circuitry to protect itself and the output transistors from short-
circuit conditions. The TDA2075A senses the voltage across resistor RS to detect an over-current
condition. Resistor RS is in series with the load just after the low pass filter. The voltage is measured via
OCSP1 and OCSN1 for channel 1 and OCSP2 and OCSN2 for channel 2. The OCS* pins must be Kelvin
connected for proper operation. See “Circuit Board Layout” in Application Information for details.
When the voltage across RS becomes greater than VTOC (typically 0.5V), the TDA2075A will shut off the
output stages of its amplifiers. The occurrence of an over-current condition also causes the TDA2075A
Fault pin (pin 30) to go high. It is recommended that the Fault pin be connected externally to the mute pin
to mute the processor during an over-current condition. The Fault circuitry is an open drain configuration
and requires a pull-down resistor. The removal of the over-current condition returns the amplifier to
normal operation.
18
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
Setting Over-current Threshold
RS determines the value of the over-current threshold, ISC:
ISC = VTOC/RS where RS is in Ω’s
V
TOC = Over-current sense threshold voltage (See Electrical Characteristics Table)
= 0.55V typically
For example, to set an ISC of 11A, RS will be 50mΩ.
Over- and Under-Voltage Protection
The TDA2075A senses the power rails through external resistor networks connected to VNNSENSE and
VPPSENSE. The over- and under-voltage limits are determined by the values of the resistors in the
networks, as described in the table “Test/Application Circuit Component Values”. If the supply voltage
falls outside the upper and lower limits determined by the resistor networks, the TDA2075A shuts off the
output stages of the amplifiers. The removal of the over-voltage or under-voltage condition returns the
TDA2075A to normal operation. Please note that trip points specified in the Electrical Characteristics
table are at 25°C and may change over temperature.
The TDA2075A has built-in over and under voltage protection for both the VPP and VNN supply rails.
The nominal operating voltage will typically be chosen as the supply “center point.” This allows the
supply voltage to fluctuate, both above and below, the nominal supply voltage.
VPPSENSE (pin 40) performs the over and undervoltage sensing for the positive supply, VPP.
VNNSENSE (pin 38) performs the same function for the negative supply, VNN. When the current through
VPPSENSE (or VNNSENSE) goes below or above the values shown in the Electrical Characteristics
section (caused by changing the power supply voltage), the TDA2075A will be muted. VPPSENSE is
internally biased at 2.5V and VNNSENSE is biased at 1.25V. In a single-supply application, VNNSENSE
should be disabled by connecting a 16KΩ resistor for pin 38 to AGND.
Once the supply comes back into the supply voltage operating range (as defined by the supply sense
resistors), the TDA2075A will automatically be un-muted and will begin to amplify. There is a hysteresis
range on both the VPPSENSE and VNNSENSE pins. If the amplifier is powered up in the hysteresis
band, the amplifier will be muted. Therefore, the usable supply range is the difference between the over-
voltage turn-off and under-voltage turn-off for both the VPP and VNN supplies. It should be noted that the
supply voltage must be outside of the user defined supply range for greater than 200mS for the
TDA2075A to be muted.
Figure 5 shows the proper connection for the Over / Under voltage sense circuit for both the VPPSENSE
and VNNSENSE pins.
V5
VNN
TDA2075A
RVNN2
RVNN1
38
40
VNNSENSE
V5
VPP
RVPP2
RVPP1
VPPSENSE
Figure 5: Over / Under voltage sense circuit
19
TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
The equation for calculating RVPP1 is as follows:
VPP
R
VPP1 =
I
VPPSENSE
Set RVPP2 = RVPP1 .
The equation for calculating RVNNSENSE is as follows:
VNN
VNNSENSE
R
VNN1 =
I
Set
.
R
VNN2 = 3 × RVNN1
IVPPSENSE or IVNNSENSE can be any of the currents shown in the Electrical Characteristics table for
VPPSENSE and VNNSENSE, respectively.
The two resistors, RVPP2 and RVNN2 compensate for the internal bias points. Thus, RVPP1 and RVNN1 can be
used for the direct calculation of the actual VPP and VNN trip voltages without considering the effect of
R
VPP2 and RVNN2.
Using the resistor values from above, the actual minimum over voltage turn off points will be:
VPP MIN_OV_TUR N_OFF = RVPP1 × IVPPSENSE (MIN_OV_TU RN_OFF)
VNN MIN_OV_TUR N_OFF = −(RVNN1 × IVNNSENSE (MIN_OV_TU RN_OFF)
)
The other three trip points can be calculated using the same formula but inserting the appropriate
IVPPSENSE (or IVNNSENSE) current value. As stated earlier, the usable supply range is the difference between
the minimum overvoltage turn off and maximum under voltage turn-off for both the VPP and VNN
supplies.
VPP RANGE = VPP MIN_OV_TUR N_OFF - VPP MAX_UV_TUR N_OFF
VNN RANGE = VNN MIN_OV_TUR N_OFF - VNN MAX_UV_TUR N_OFF
Output Transistor Selection
The key parameters to consider when selecting what n-channel and p-channel MOSFETs to use with the
TDA2075A are drain-source breakdown voltage (BVdss), gate charge (Qg), and on-resistance (RDS(ON)).
The BVdss rating of the MOSFET needs to be selected to accommodate the voltage swing between
V
SPOS and VSNEG as well as any voltage peaks caused by voltage ringing due to switching transients. With
a ‘good’ circuit board layout, a BVdss that is 50% higher than the VPP to VNN voltage swing is a
reasonable starting point. The BVdss rating should be verified by measuring the actual voltages
experienced by the MOSFET in the final circuit.
Ideally a low Qg (total gate charge) and low RDS(ON) are desired for the best amplifier performance.
Unfortunately, these are conflicting requirements since RDS(ON) is inversely proportional to Qg for a typical
MOSFET. The design trade-off is one of cost versus performance. A lower RDS(ON) means lower I2RDS(ON)
losses but the associated higher Qg translates into higher switching losses (losses = Qg x 10 x 1.2MHz).
A lower RDS(ON) also means a larger silicon die and higher cost. A higher RDS(ON) means lower cost and
lower switching losses but higher I2RDSON losses.
Gate Resistor Selection
The gate resistors, RG, are used to control MOSFET switching rise/fall times and thereby minimize
voltage overshoots. They also dissipate a portion of the power resulting from moving the gate charge
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Tripath Technology, Inc. - Technical Information
each time the MOSFET is switched. If RG is too small, excessive heat can be generated in the driver.
Large gate resistors lead to slower MOSFET switching edges which require a larger break-before-make
(BBM) delay.
Break-Before-Make (BBM) Timing Control
The complementary half-bridge power MOSFETs require a deadtime between when one transistor is
turned off and the other is turned on (break-before-make) in order to minimize shoot through currents.
The TDA2075A has an analog input pin that controls the break-before-make timing of the output
transistors. Connecting RBBM from the BBMSET pin (pin 7) to analog ground creates a current that
defines the BBM setting by the following equation.
BBM (nsec) = 2 X RBBM + 7
where RBBM is in kΩ’s and 5kΩ < RBBM* < 100kΩ
* An RBBM of 0Ω will yield a BBM setting of 0nsec.
There is tradeoff involved in making this setting. As the delay is reduced, distortion levels improve but
shoot-through and power dissipation increase. All typical curves and performance information were done
with using a RBBM. The actual amount of BBM required is dependent upon other component values and
circuit board layout, the value selected should be verified in the actual application circuit/board. It should
also be verified under maximum temperature and power conditions since shoot-through in the output
MOSFETs can increase under these conditions, possibly requiring a higher BBM setting than at room
temperature.
Recommended MOSFETs
The following devices are capable of achieving full performance, both in terms of distortion and efficiency,
for the specified load impedance and voltage range. Additional devices will be added as subsequent
characterization is completed.
Device Information – Recommended MOSFETs
Part Number
FQP13N10
FQP12P10
Manufacturer
Fairchild Semiconductor
Fairchild Semiconductor
BVDSS (V)
100
-100
ID (A)
12.8
-11.5
Qg (nC)
12
21
Package
TO220
TO220
R
DS(on) (Ω)
0.142
0.240
Output Filter Design
One advantage of Tripath amplifiers over PWM solutions is the ability to use higher-cutoff-frequency
filters. This means load-dependent peaking/droop in the 20kHz audio band potentially caused by the filter
can be made negligible. This is especially important for applications where the user may select a 6-Ohm
or 8-Ohm speaker. Furthermore, speakers are not purely resistive loads and the impedance they present
changes over frequency and from speaker model to speaker model.
Tripath recommends designing the filter as a 2nd order LC filter. Tripath has obtained good results with
LF = 11uH and CF = 0.22uF.
The core material of the output filter inductor has an effect on the distortion levels produced by a
TDA2075A amplifier. Tripath recommends low-mu type-2 iron powder cores because of their low loss
and high linearity (available from Micrometals, www.micrometals.com). Please refer to the RB-
TDA2075A for the specific core used.
Tripath also recommends that an RC damper be used after the LC low-pass filter. No-load operation of a
TDA2075A amplifier can create significant peaking in the LC filter, which produces strong resonant
currents that can overheat the output MOSFETs and/or other components. The RC dampens the
peaking and prevents problems. Tripath has obtained good results with RZ = 20Ω and CZ = 0.22uF.
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Low-frequency Power Supply Pumping
A potentially troublesome phenomenon in single-ended switching amplifiers is power supply pumping.
This phenomenon is caused by current from the output filter inductor flowing into the power supply output
filter capacitors in the opposite direction as a DC load would drain current from them. Under certain
conditions (usually low-frequency input signals), this current can cause the supply voltage to “pump”
(increase in magnitude) and eventually cause over-voltage/under-voltage shut down. Moreover, since
over/under-voltage are not “latched” shutdowns, the effect would be an amplifier that oscillates between
on and off states. If a DC offset on the order of 0.3V is allowed to develop on the output of the amplifier
(see “DC Offset Adjust”), the supplies can be boosted to the point where the amplifier’s over-voltage
protection triggers.
One solution to the pumping issue is to use large power supply capacitors to absorb the pumped supply
current without significant voltage boost. The low-frequency pole used at the input to the amplifier
determines the value of the capacitor required. This works for AC signals only.
A no-cost solution to the pumping problem uses the fact that music has low frequency information that is
correlated in both channels (it is in phase). This information can be used to eliminate boost by putting the
two channels of a TDA2075A amplifier out of phase with each other. This works because each channel is
pumping out of phase with the other, and the net effect is a cancellation of pumping currents in the power
supply. The phase of the audio signals needs to be corrected by connecting one of the speakers in the
opposite polarity as the other channel.
Performance Measurements of a TDA2075A Amplifier
Tripath amplifiers operate by modulating the input signal with a high-frequency switching pattern. This
signal is sent through a low-pass filter (external to the TDA2075A) that demodulates it to recover an
amplified version of the audio input. The frequency of the switching pattern is spread spectrum and
typically varies between 200kHz and 1.5MHz, which is well above the 20Hz – 22kHz audio band. The
pattern itself does not alter or distort the audio input signal but it does introduce some inaudible noise
components.
The measurements of certain performance parameters, particularly those that have anything to do with
noise, like THD+N, are significantly affected by the design of the low-pass filter used on the output of the
TDA2075A and also the bandwidth setting of the measurement instrument used. Unless the filter has a
very sharp roll-off just past the audio band or the bandwidth of the measurement instrument ends there,
some of the inaudible noise components introduced by the Tripath amplifier switching pattern will get
integrated into the measurement, degrading it.
Tripath amplifiers do not require large multi-pole filters to achieve excellent performance in listening tests,
usually a more critical factor than performance measurements. Though using a multi-pole filter may
remove high-frequency noise and improve THD+N type measurements (when they are made with wide-
bandwidth measuring equipment), these same filters can increase distortion due to inductor non-linearity.
Multi-pole filters require relatively large inductors, and inductor non-linearity increases with inductor value.
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Tripath Technology, Inc. - Technical Information
Package Information
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TDA2075A – Rev. 0.9/KLi/10.05
Tripath Technology, Inc. - Technical Information
PRELIMINARY INFORMATION – This product is still in development. Tripath Technology Inc. reserves
the right to make any changes without further notice to improve reliability, function, or design.
This data sheet contains the design specifications for a product in development. Specifications may
change in any manner without notice. Tripath and Digital Power Processing are trademarks of Tripath
Technology Inc. Other trademarks referenced in this document are owned by their respective companies.
Tripath Technology Inc. reserves the right to make changes without further notice to any products herein
to improve reliability, function or design. Tripath does not assume any liability arising out of the application
or use of any product or circuit described herein; neither does it convey any license under its patent
rights, nor the rights of others.
TRIPATH’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE
SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN CONSENT OF THE
PRESIDENT OF TRIPATH TECHNOLOGY INC.
As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose failure to perform, when properly used in
accordance with instructions for use provided in this labeling, can be reasonably expected to result in
significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can
be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
Contact Information
TRIPATH TECHNOLOGY , INC
2560 Orchard Parkway, San Jose, CA 95131
408.750.3000 - P
408.750.3001 - F
For more Sales Information, please visit us @ www.tripath.com/cont_s.htm
For more Technical Information, please visit us @ www.tripath.com/data.htm
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TDA2075A – Rev. 0.9/KLi/10.05
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