AGR09030E [TRIQUINT]
30 W, 865 MHz-895 MHz, N-Channel E-Mode, Lateral MOSFET; 30 W, 865兆赫, 895兆赫, N沟道电子模式,横向MOSFET型号: | AGR09030E |
厂家: | TRIQUINT SEMICONDUCTOR |
描述: | 30 W, 865 MHz-895 MHz, N-Channel E-Mode, Lateral MOSFET |
文件: | 总7页 (文件大小:314K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Table 1. Thermal Characteristics
Introduction
Parameter
Sym
Value
Unit
The AGR09030E is a high-voltage, gold-metalized,
laterally diffused metal oxide semiconductor
Thermal Resistance,
Junction to Case:
AGR09030EU
(LDMOS) RF power transistor suitable for cellular
band, code-division multiple access (CDMA), global
system for mobile communication (GSM), enhanced
data for global evolution (EDGE), and time-division
multiple access (TDMA) single and multicarrier class
AB wireless base station amplifier applications. This
device is manufactured on an advanced LDMOS
technology, offering state-of-the-art performance,
reliability, and thermal resistance. Packaged in an
industry-standard CuW package capable of deliver-
ing a minimum output power of 30 W, it is ideally
suited for today's RF power amplifier applications.
R JC
R JC
1.85
2.2
°C/W
°C/W
AGR09030EF
Table 2. Absolute Maximum Ratings*
Parameter
Drain-source Voltage
Gate-source Voltage
Sym Value Unit
65 Vdc
VGS –0.5, +15 Vdc
VDSS
Drain Current—Continuous
Total Dissipation at TC = 25 °C :
AGR09030EU
ID
4.25
Adc
PD
PD
95
80
W
W
AGR09030EF
Derate Above 25 °C:
AGR09030EU
AGR09030EF
—
—
TJ
0.54 W/°C
0.45 W/°C
Operating Junction Tempera-
ture
200
°C
AGR09030EU (unflanged)
AGR09030EF (flanged)
Storage Temperature Range
TSTG –65, +150 °C
Figure 1. Available Packages
* Stresses in excess of the absolute maximum ratings can cause
permanent damage to the device. These are absolute stress rat-
ings only. Functional operation of the device is not implied at
these or any other conditions in excess of those given in the
operational sections of the data sheet. Exposure to absolute
maximum ratings for extended periods can adversely affect
device reliability.
Features
Typical performance ratings are for IS-95 CDMA,
pilot, sync, paging, traffic codes 8—13:
— Output power (POUT): 7 W.
— Power gain: 21 dB.
— Efficiency: 27%.
— Adjacent channel power ratio (ACPR) for
30 kHz bandwidth (BW):
Table 3. ESD Rating*
AGR09030E
HBM
Minimum (V)
Class
500
50
1B
A
MM
CDM
1500
4
(750 kHz offset: –45 dBc)
(1.98 MHz offset: –60 dBc).
— Input return loss: 10 dB.
* Although electrostatic discharge (ESD) protection circuitry has
been designed into this device, proper precautions must be
taken to avoid exposure to ESD and electrical overstress (EOS)
PEAK Devices
during all handling, assembly, and test operations.
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
High-reliability, gold-metalization process.
High gain, efficiency, and linearity.
Integrated ESD protection.
Si LDMOS.
Industry-standard packages.
30 W minimum output power.
Caution: MOS devices are susceptible to damage from elec-
trostatic charge. Reasonable precautions in han-
dling and packaging MOS devices should be
observed.
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Electrical Characteristics
Recommended operating conditions apply unless otherwise specified: TC = 30 °C.
Table 4. dc Characteristics
Parameter
Symbol
Min
Typ Max
Unit
Off Characteristics
150
Drain-source Breakdown Voltage (VGS = 0, ID = 100 µA)
Gate-source Leakage Current (VGS = 5 V, VDS = 0 V)
Zero Gate Voltage Drain Leakage Current (VDS = 28 V, VGS = 0 V)
On Characteristics
V(BR)DSS
IGSS
65
—
—
—
—
—
—
Vdc
µAdc
µAdc
0.95
50
29
IDSS
Forward Transconductance (VDS = 10 V, ID = 1.0 A)
Gate Threshold Voltage (VDS = 10 V, ID = 400 µA)
Gate Quiescent Voltage (VDS = 28 V, IDQ = 330 mA)
Drain-source On-voltage (VGS = 10 V, ID = 1.0 A)
GFS
—
—
—
—
2.2
—
—
5.0
—
S
VGS(TH)
VGS(Q)
VDS(ON)
Vdc
Vdc
Vdc
3.8
0.35
—
Table 5. RF Characteristics
Parameter
Symbol Min
Typ Max
Unit
Dynamic Characteristics
Input Capacitance
(VDS = 28 Vdc, VGS = 0, f = 1 MHz)
CISS
COSS
CRSS
—
—
—
56
—
—
—
pF
pF
pF
Output Capacitance
(VDS = 28 Vdc, VGS = 0, f = 1 MHz)
15.7
0.73
Reverse Transfer Capacitance
(VDS = 28 Vdc, VGS = 0, f = 1 MHz)
(in Supplied Test Fixture)
Functional Tests (n grSytSuppd TFtue)
(Test frequencies (f) = 865 MHz, 880 MHz, 895 MHz)
Linear Power Gain
(VDS = 28 V, POUT = 5 W, IDQ = 330 mA)
GL
19
30
—
—
—
21
40
—
—
—
—
—
dB
W
Output Power
(VDS = 28 V, 1 dB compression, IDQ = 330 mA)
P1dB
Drain Efficiency
(VDS = 28 V, POUT = P1dB, IDQ = 330 mA)
57
%
Third-order Intermodulation Distortion
(100 kHz spacing, VDS = 28 V, POUT = 30 WPEP, IDQ = 330 mA)
IMD
–31
dBc
Input Return Loss
IRL
—
10
dB
Ruggedness
No degradation in output power.
(VDS = 28 V, POUT = 30 W, IDQ = 330 mA, f = 880 MHz,
VSWR = 10:1, all angles)
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Test Circuit Illustrations for AGR09030E
FB1
VDD
R3
VGG
+
+
+
C19
C20 C21 C22 C23 C24
C25
C26
C14
R2
C13 C12 C11 C10
C9
Z6
C8
Z11
R1
Z16
Z17
C18
Z18
Z1
RF INPUT
Z3 C1 Z4
Z5
Z7
RF OUTPUT
Z14
Z15
Z2
C27
C2
C3
Z19
C17
C16
Z12
DUT
Z13
1
Z8
Z9
Z10
2
PINS:
3
1. DRAIN
2. GATE
3. SOURCE
C4 C6
C5 C7
A. Schematic
Parts List:
Microstrip line: Z1 0.900 in. x 0.066 in.; Z2 0.294 in. x 0.050 in.; Z3 0.123 in. x 0.066 in.; Z4 0.703 in. x 0.066 in.; Z5 0.267 in. x 0.150 in.;
Z6 0.270 in. x 0.150 in.; Z7 0.050 in. x 0.440 in.; Z8 0.324 in. x 0.440 in.; Z9 0.100 in. x 0.440 in.; Z10 0.155 in. x 0.440 in.;
Z11 1.024 in. x 0.050 in.; Z12 0.123 in. x 0.300 in.; Z13 0.050 in. x 0.300 in.; Z14 0.213 in. x 0.300 in.; Z15 0.393 in. x 0.100 in.;
Z16 0.194 in. x 0.100 in.; Z17 0.523 in. x 0.066 in.; Z18 1.085 in. x 0.066 in.; Z19 2.048 x 0.050.
®
ATC chip capacitor: C1, C8, C18, C19: 47 pF, 100B470JW; C27: 8.2 pF, 100A8R2BW; C4, C5, C6, C7: 12 pF, 100B120JW;
C3: 1.0 pF, 100B1R0BW; C9, C16, C20: 10 pF, 100B100JW; C2, C17: 8.2 pF, 100B8R2BW.
®
Murata chip capacitor: C12, C23: 0.01 µF GRM40X7R103K100AL.
0603 chip capacitor: C10, C21: 220 pF.
®
Sprague tantalum chip capacitor: C14, C25, C26: 22 µF, 35 V.
®
Kreger ferrite bead: FB1: 2743D19447.
®
Kemet chip capacitor: C13, C24: 0.10 µF C1206C104KRAC7800.
®
Vitramon chip capacitor: C11, C22: 2200 pF, VJ1206Y222KXA.
1206 size 0.25 W, fixed film, chip resistors: R1: 51 , RM73B2B510J; R2: 47 k , RM73B2B473J; R3: 1 k , RM73B2B102J.
®
Taconic ORCER RF-35: board material, 1 oz. copper, 30 mil thickness, r = 3.5.
B. Component Layout
Figure 2. AGR09030E Test Circuit
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Typical Performance Characteristics
90
ZL
f3
f1
ZS
f3
f1
Z0 = 8
R ESISTA N C E C OM PON EN T (R / Zo), OR C ON DU C TA N C E C OM PON EN T (G/ Yo)
MHz (f)
ZS
ZL
(Complex Source Impedance) (Complex Optimum Load Impedance)
865 (f1)
880 (f2)
895 (f3)
0.618 + j0.290
0.711 + j0.364
0.788 + j0.380
3.26 + j2.10
3.39 + j2.47
3.55 + j2.83
DRAIN (1)
GATE (2)
ZS
ZL
SOURCE (3)
INPUT MATCH
OUTPUT MATCH
DUT
Figure 3. Series Equivalent Input and Output Impedances
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Typical Performance Characteristics (continued)
0
-10
-20
-30
-40
-50
-60
-70
-80
FREQUENCY = 880 MHz
ACP+
ACP-
ACP1+
ACP1-
0
5
10
OUT (W)X
15
20
P
TEST CONDITIONS:
VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 °C.
IS-95 CDMA PILOT, PAGING, SYNC, TRAFFIC CODES 8—13. OFFSET 1 = 750 kHz, 30 kHz BW. OFFSET 2 = 1.98 MHz, 30 kHz BW.
Figure 4. ACPR vs. POUT
23
22
21
20
19
18
17
16
15
14
13
12
11
10
0.0
POWER GAIN
POUT = 5 W
-2.0
-4.0
P
OUT = 40 W
-6.0
-8.0
-10.0
-12.0
-14.0
-16.0
-18.0
RETURN LOSS
860
865
870
875
880
885
890
895
900
FREQUENCY (MHz)X
TEST CONDITIONS:
VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 °C, WAVEFORM = CW.
Figure 5. Power Gain and Return Loss vs. Frequency
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Typical Performance Characteristics (continued)
24
22
20
18
16
14
12
10
8
865 MHz
880 MHz
895 MHz
6
4
2
0
10
20
30
40
50
60
POUT (W)X
TEST CONDITIONS:
VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 °C, WAVEFORM = CW.
Figure 6. Power Gain vs. Power Out
65
60
55
50
45
40
35
30
25
20
15
10
5
100
P
OUT
95
90
85
80
75
70
65
60
55
50
45
40
35
30
895 MHz
880 MHz
865 MHz
EFFICIENCY
895 MHz
880 MHz
865 MHz
0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7
IN (W)X
P
TEST CONDITIONS:
VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 °C, WAVEFORM = CW.
Figure 7. Power Out and Drain Efficiency vs. Input Power
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Package Dimensions
All dimensions are in inches. Tolerances are ±0.005 in. unless specified.
AGR09030EU
PINS:
1. DRAIN
2. GATE
3. SOURCE
1
1
2
3
3
PEAK DEVICES
AGR09030EU
XXXX
2
AGR09030EF
PINS:
1. DRAIN
2. GATE
3. SOURCE
1
1
2
3
3
PEAK DEVICES
AGR09030EF
XXXX
2
XXXX - 4 Digit Trace Code
相关型号:
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