TSM4420CS [TSC]
N-Channel Enhancement Mode MOSFET; N沟道增强型MOSFET
| 型号： | TSM4420CS |
| 厂家： | 
TAIWAN SEMICONDUCTOR COMPANY, LTD |
| 描述： | N-Channel Enhancement Mode MOSFET |
| 文件： | 总3页 (文件大小：138K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TSM4420
Preliminary
N-Channel Enhancement Mode MOSFET
Pin assignment:
VDS = 25V
1. Source
2. Source
3. Source
4. Gate
ID = 13.5A
RDS (on), Vgs @ 10V, Ids @ 13.5A = 8.5mΩ
RDS (on), Vgs @ 4.5V, Ids @ 11A = 11mΩ
5, 6, 7, 8. Drain
Features
Advanced trench process technology
High Density Cell Design for Ultra Low
On-Resistance
Fully Characterized Avalanche Voltage and Current
Block Diagram
Ordering Information
Part No.
Packing
Package
Tape & Reel
TSM4420CS
SOP-8
(2,500pcs / Reel)
Absolute Maximum Rating (TA = 25 oC unless otherwise noted)
Parameter
Symbol
VDS
Limit
Unit
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
25
±20
V
V
VGS
ID
13.5
50
A
IDM
TA = 25 oC
TA = 70 oC
2
Maximum Power Dissipation
PD
W
1.3
Operating Junction Temperature
TJ
+150
-55 to +150
oC
oC
Operating Junction and Storage Temperature Range
TJ, TSTG
Thermal Performance
Parameter
Symbol
Rθjc
Limit
2.2
Unit
Junction-to-case Thermal Resistance
oC/W
Junction to Ambient Thermal Resistance (PCB mounted)
Rθja
50
Note: 1. Maximum DC current limited by the package
2. 1-in2 2oz Cu PCB board
TSM4420
1-3
2005/08 rev. B
Electrical Characteristics
TJ = 25 oC, unless otherwise noted
Parameter
Conditions
Symbol
Min
Typ
Max
Unit
Static
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250uA
VGS = 4.5V, ID = 11A
VGS = 10V, ID = 13.5A
VDS = VGS, ID = 250uA
VDS = 24V, VGS = 0V
VGS = ± 20V, VDS = 0V
VDS =10V, ID = 35A
BVDSS
RDS(ON)
RDS(ON)
VGS(TH)
IDSS
25
--
--
9
--
11
V
mΩ
mΩ
V
Drain-Source On-State Resistance
--
7
8.5
3.0
1.0
±100
--
Gate Threshold Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage
Forward Transconductance
Dynamic
1.0
--
--
--
uA
nA
S
IGSS
--
--
gfs
--
50
Total Gate Charge
Qg
Qgs
Qgd
td(on)
tr
--
--
--
--
--
--
--
--
25
--
VDS = 15V, ID = 13.5A,
VGS = 5V
nC
nS
Gate-Source Charge
Gate-Drain Charge
6.6
4.0
15
11
40
12
--
Turn-On Delay Time
Turn-On Rise Time
25
18
60
20
VDD = 15V, RL = 15Ω,
ID = 1A, VGEN = 10V,
RG = 24Ω
Turn-Off Delay Time
Turn-Off Fall Time
td(off)
tf
Source-Drain Diode
Max. Diode Forward Current
Diode Forward Voltage
IS
--
--
--
50
A
V
IS = 20A, VGS = 0V
VSD
0.75
1.1
Note: 1. pulse test: pulse width <=300uS, duty cycle <=2%
2. Negligible, Dominated by circuit inductance.
TSM4420
2-3
2005/08 rev. B
SOP-8 Mechanical Drawing
SOP-8 DIMENSION
MILLIMETERS
INCHES
MIN
DIM
MIN
4.80
3.80
1.35
0.35
0.40
MAX
5.00
4.00
1.75
0.49
1.25
MAX
0.196
0.157
0.068
0.019
0.049
A
B
C
D
F
0.189
0.150
0.054
0.014
0.016
G
K
M
P
R
1.27 (typ)
0.05 (typ)
0.10
0o
0.25
7o
0.004
0o
0.009
7o
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
TSM4420
3-3
2005/08 rev. B
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