WBC-C0202AA-102-M [TTELEC]
Wire Bondable Chip Capacitor; 线可粘接贴片电容
| 型号： | WBC-C0202AA-102-M |
| 厂家： | 
TT Electronics |
| 描述： | Wire Bondable Chip Capacitor |
| 文件： | 总2页 (文件大小：714K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Wire Bondable
Chip Capacitor
WBC Capacitor Series
• Silicon Dioxide/Silicon Nitride dielectric
• Capacitance range from 10pF to 1000pF
• Silicon substrate with gold or aluminum backing
IRC’s wire-bondable chip capacitors are based on the successful
TaNCAP® line of RC networks on silicon. The new chip capacitors have
the advantage of excellent performance in extremely small sizes ranging from
20 to 60 mils square.
Capacitors are 100% electrically tested with mil screening to MIL-STD-883 also available.
For demanding hybrid circuit and/or chip and wire applications, specify IRC’s WBC capacitor series.
Physical Data
C0606
C0404
Top Bonding Pad
Top Bonding Pad
C0303
C0202
C0505
Back of chip
Back of chip
Manufacturing Capabilities Data
Style
Size
Capacitance Range
Voltage
40
0.020″± 0.001 sq.
(0.508mm ±0.025)
C0202
C0303
C0404
C0505
C0606
10pF to 51pF
33pF to 100pF
56pF to 220pF
160pF to 360pF
160pF to 1000pF
0.030″± 0.001 sq.
(0.762mm ±0.025)
55
0.040″± 0.001 sq.
(1.016mm ±0.025)
50
0.055″± 0.001 sq.
(1.397mm ±0.025)
20
0.060″± 0.001 sq.
(1.524mm ±0.025)
20
General Note
IRC reserves the right to make changes in product specification without notice or liability.
All information is subject to IRC’s own data and is considered accurate at time of going to print.
A subsidiary of
TT electronics plc
© IRC Advanced Film Division • 4222 South Staples Street • Corpus Christi Texas 78411 USA
Telephone: 361 992 7900 • Facsimile: 361 992 3377 • Website: www.irctt.com
WBC Capacitor Series Issue January 2009 Sheet 1 of 2
Wire Bondable
Chip Capacitor
Electrical Data
Capacitance Range
Dissipation Factor 1Khz, +25°C, 1VRMS
Absolute Tolerance
10pF to 1000pF
0.5% min
to ±5%
-55°C to +125°C
<-30dB
Operating Temperature
Noise
Substrate Material
Semiconductor Silicon (10KÅ SiO2 minimum)
0.010˝ ±0.001
(0.254mm ±0.025)
Substrate Thickness
Bond Pad Metallization
Backside
Aluminum: 10KÅ minimum
Aluminum: 10KÅ minimum
Gold: 3KÅ minimum
Dielectric
Silicon Dioxide and/or Silicon Nitride
Silicon Dioxide or Silicon Nitride
Passivation
Environmental Data
Ordering Data
Prefix
WBC
-
C0606
A
G
- 102 - K
Test
Method
Max ∆C
Style
MIL-STD-202
Method 107
C0202; C0303; C0404; C0505; C0606
Thermal Shock
±0.25% + 0.25pF max
Test condition F
Bonding pads
A = Aluminum
MIL-STD-202
Method 106
Moisture
Resistance
±1.0% + 0.25pF max
±0.25% + 0.25pF mx
Backside
A = Aluminum; G = Gold
Capacitance
3-Digit Capacitance Code
Ex: 102 = 1000pF; 221 = 220pF; 470 = 47pF
+25°C, 5 seconds
1.5 X rated voltage
Short
Time Overload
MIL-STD-202
Method 108
125°C, 1000 hours
Absolute Tolerance Code
M = ±20%; K = ±10%; J = ±5%
Life at Elevated
Temperature
±0.25% + 0.25pF max
±0.25% + 0.25pF max
Packaging
Standard packaging is 2˝ x 2˝ chip tray. For additional information
or to discuss your specific requirements, please contact our
Applications Team using the contact details below.
High Temperature
Exposure
100 hours @ 150°C
ambient
© IRC Advanced Film Division • 4222 South Staples Street • Corpus Christi Texas 78411 USA
Telephone: 361 992 7900 • Facsimile: 361 992 3377 • Website: www.irctt.com
WBC Capacitor Series Issue January 2009 Sheet 2 of 2
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