UP1590RQKF [UPI]
Dual Synchronous Buck Controller with 5V/3.3V 100mA LDOs for Notebook System Power;
| 型号： | UP1590RQKF |
| 厂家： | 
uPI Semiconductor Corp. |
| 描述： | Dual Synchronous Buck Controller with 5V/3.3V 100mA LDOs for Notebook System Power |
| 文件： | 总18页 (文件大小：316K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
uP1590
Dual Synchronous Buck Controller with
5V/3.3V 100mA LDOs for Notebook System Power
Features
General Description
The uP1590 is a dual synchronous buck controller with Wide Input Voltage Range: 5.5V to 26V
5V/3.3V 100mA LDOs for notebook system power supply
Two Synchronous Buck Controllers
solution.
Dual Fixed 5V/3.3V Outputs or Adjustable from
The uP1590 supports high efficiency, fast transient
response and provides a combined POK signal. The
ultrasonic mode maintains the switching frequency above
2V to 5.5V
Selectable DEM and USM in Light Load
(uP1590P)
audio frequency, which eliminates noise in audio
applications. The proprietary RCOTTM technology provides
fast transient response and high noise immunity.
Internal Soft-Start and Soft-Discharge
RCOTTM (Robust Constant On-Time) Control
Architecture
4500ppm/OC RDS(ON) Current Sensing
The uP1590 has internal soft-start to control the inrush
current. Other features include over current protection,
over/under voltage protection, power-up sequencing, POK
output, and thermal shutdown. The uP1590 is available
in the space saving package WQFN3x3-20L, specified
from -40OC to 85OC.
100mA 5V/3.3V LDO with Switches
Secondary FB Input Maintains Charge Pump
Voltage (uP1590Q Only)
Power OK Indicator
Applications
OVP/UVP/OCP/OTP
Notebook and Subnotebook System Power
Supplies
WQFN3x3-20L
3-4 Cell Li-Ion Battery-Power Devices
RoHS Compliant and Halogen Free
Dual Output Supplies for DSP, Memory, Logic
and Microprocessor
Ordering Information
Order Number
uP1590PQKF
uP1590QQKF
uP1590RQKF
Package Type
WQFN3x3-20L
Top Marking
uP1590P
uP1590Q
uP1590R
Operation Mode
Selectable by ENM Pin
DEM
Remark
Pin 13: ENM
Pin 13: SECFB
Pin 13: TP
USM
Note:
(1) Please check the sample/production availability with uPI representatives.
(2) uPI products are compatible with the current IPC/JEDEC J-STD-020 requirements. They are halogen-free, RoHS
compliant and 100% matte tin (Sn) plating that are suitable for use in SnPb or Pb-free soldering processes.
uP1590-DS-P0200, Oct. 2013
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1
uP1590
Pin Configuration
15 14 13 12 11
LGATE1 16
PHASE1 17
UGATE1 18
BOOT1 19
BYP1 20
10 LGATE2
9
8
7
6
PHASE2
UGATE2
BOOT2
POK
21 GND
1
2
3
4
5
uP1590P
15 14 13 12 11
15 14 13 12 11
LGATE1 16
PHASE1 17
UGATE1 18
BOOT1 19
BYP1 20
10 LGATE2
LGATE1 16
PHASE1 17
UGATE1 18
BOOT1 19
BYP1 20
10 LGATE2
9
8
7
6
PHASE2
UGATE2
BOOT2
POK
9
8
7
6
PHASE2
UGATE2
BOOT2
POK
21 GND
21 GND
1
2
3
4
5
1
2
3
4
5
uP1590Q
uP1590R
Typical Application Circuit
POK
VIN
VIN VREG5
POK
BYP1
BOOT2
BOOT1
UGATE1
PHASE1
21
GND
UGATE2
PHASE2
VO2 = 3.3V
VO1 = 5V
LGATE2
LGATE1
VREG5
VIN = 5.5~26V
EN0
5V/100mA
3.3V/100mA
ENM
uP1590P
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uP1590
Typical Application Circuit
POK
VIN
VREG5
POK
VIN
BYP1
BOOT1
BOOT2
21
GND
UGATE2
PHASE2
UGATE1
PHASE1
VO2 = 3.3V
VO1 = 5V
LGATE2
LGATE1
VREG5
V
IN = 5.5~26V
EN0
5V/100mA
3.3V/100mA
VO1
VCP
uP1590Q
POK
VIN
VREG5
POK
VIN
BYP1
BOOT1
BOOT2
21
GND
UGATE2
PHASE2
UGATE1
PHASE1
VO2 = 3.3V
VO1 = 5V
LGATE2
LGATE1
VREG5
VIN = 5.5~26V
EN0
5V/100mA
3.3V/100mA
uP1590R
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3
uP1590
Functional Block Diagram
VIN
EN
EN
LDO5
LDO3
Soft Start
Control
150 O
/140OC
C
BYP1
BOOT1
BOOT2
UGATE2
PHASE2
LGATE2
VFB2
Latch off
Control
UGATE1
PHASE1
LGATE1
VFB1
Switcher Controller
Switcher Controller
On Time
ENTRIP1
ENTRIP2
TON
ENM (uP1590P)
/SECFB (uP1590Q)
/TP (uP1590R)
EN0
EN
POK
GND
4
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uP1590
Functional Pin Description
No.
Name
Pin Function
Buck 1 Feedback Input. This pin is the inverting input to the error amplifier. A resistor
divider from output to GND is used to set regulator voltage.
1
VFB1
Buck 1 Enable and OCP Setting. Connect a resistor from this pin to GND to set threshold
for synchronous buck 1 RDS(ON) OCP. Leave this pin floating or connect this pin to VCC to
shutdown Buck 1.
2
3
4
5
ENTRIP1
TON
On-Time Setting Pin. Connect a resistor from this pin to GND to set the on-time for the
upper MOSFETs.
Buck 2 Enable and OCP Setting. Connect a resistor from this pin to GND to set threshold
for synchronous buck 2 RDS(ON) OCP. Leave this pin floating or connect this pin to VCC to
shutdown Buck 2.
ENTRIP2
VFB2
Buck 2 Feedback Input. This pin is the inverting input to the error amplifier. A resistor
divider from output to GND is used to set regulator voltage.
Power OK Indication. POK is the open-drain architecture that indicates the output voltage
is ready or not. This pin is set to high impedance when the output voltage is within regulation
and the soft-start circuit has terminated. POK is pulled low immediately when either output
is in soft-start, standby, shutdown or protection.
6
POK
Bootstrap Supply for the Floating Upper MOSFET Gate Driver of Buck 2. The
bootstrap capacitor provides the charge to turn on the upper MOSFET. Connect this
bootstrap capacitor between BOOT2 pin and the PHASE2 pin to form a bootstrap circuit.
7
8
BOOT2
Upper MOSFET Gate Driver Output of Buck 2. This pin is monitored by the adaptive
shoot-through protection circuitry to determine when the upper MOSFET has turned off.
Connect this pin to the gate of upper MOSFET.
UGATE2
Switch Node of Buck 2. This pin is used as the sink for the upper MOSFET gate driver.
This pin is also monitored by the adaptive shoot-through protection circuitry to determine
whenthe upper MOSFEThas turned off. Connect this pinto the source of the upper MOSFET
and the drain of the lower MOSFET.
9
PHASE2
Lower MOSFET Gate Driver Output of Buck 2. This pin is monitored by the adaptive
shoot-through protection circuitry to determine when the lower MOSFET has turned off.
Connect this pin to the gate of lower MOSFET.
10
11
12
LGATE2
VIN
Supply Input. This pin is the input of the internal 5V and 3.3V LDO regulators. Connect VIN
to the battery or AC adapter output.
LDO Enable.
EN0
VIN: enable both LDOs and ready to turn on switcher channels.
GND: disable all circuit.
Buckx Enable Input and Operation Mode Selection Pin.
Ultrasonic Mode: Connect this pin to LDO5.
Diode Emulation Mode: Connect this pin to LDO3.
Enable: Pull high this pin above 0.8V.
ENM
(uP1590P)
Change Pump Feedback Pin. The SECFB is used to monitor the optional external charge
pump. Connect a resistive divider from the change pump output to GND to detect the output.
If SECFB drops below its feedback threshold, an ultrasonic pulse occurs to refresh the
charge pump driven by LGATE1 or LGATE2.
13
14
SECFB
(uP1590Q)
Test Pin. Must tie this pin to LDO5.
TP (uP1590R)
LDO5
Output of Internal 5V LDO. The LDO5 is capable of sourcing 100mA output current for
external loads. Bypass this pin with a minimum 4.7uF.
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uP1590
Functional Pin Description
No.
Name
Pin Function
Output of Internal 3.3V LDO. The LDO3 is capable of sourcing 100mA output current for
external loads. Bypass this pin with a minimum 4.7uF.
15
LDO3
Lower MOSFET Gate Driver Output of Buck 1. This pin is monitored by the adaptive
shoot-through protection circuitry to determine when the lower MOSFET has turned off.
Connect this pin to the gate of lower MOSFET.
16
17
18
LGATE1
PHASE1
Switch Node of Buck 1. This pin is used as the sink for the upper MOSFET gate driver.
This pin is also monitored by the adaptive shoot-through protection circuitry to determine
whenthe upper MOSFEThas turned off. Connect this pinto the source of the upper MOSFET
and the drain of the lower MOSFET.
Upper MOSFET Gate Driver Output of Buck 1. This pin is monitored by the adaptive
shoot-through protection circuitry to determine when the upper MOSFET has turned off.
Connect this pin to the gate of upper MOSFET.
UGATE1
BOOT1
Bootstrap Supply for the Floating Upper MOSFET Gate Driver of Buck 1. The
bootstrap capacitor provides the charge to turn on the upper MOSFET. Connect this
bootstrap capacitor between BOOT1 pin and the PHASE1 pin to form a bootstrap circuit.
19
20
Switch Over Source Voltage Input for LDO5. Connect to VOUT1 to supply voltage for
LDO5 when switch over.
BYP1
Ground. The exposed pad dominates heat conduction path and should be well soldered to
PCB for optimal thermal performance.
Exposed Pad
6
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uP1590
Functional Description
Table 2. Operation Mode Selection
The uP1590 implements an unique RCOTTM control
topology for both synchronous Bucks. The uP1590 does
not require the external compensator. The RCOTTM
supports extremely low ESR output capacitors and makes
the design easier and robust.
Recommend
Operation Mode
ENM Pin Voltage
GND
Shutdown
Ultrasonic Mode
Enable and Soft Start
1.2V to 1.8V
2.3V to 3.6V
4.5V to 5V
EN0 is the control pin of LDO5 and LDO3 regulators.
Connect this pin toGNDdisables two regulators. Connect
this pin to 3.3V or 5V will turn the two regulators on to
standby mode. Two SMPSs become ready to enable at
this standby mode. When ENM (uP1590P) is higher than
0.8V, then both SMPSs begin to start up. Connect this pin
toGNDdisables two SMPSs. Two SMPSs operate in diode
emulation mode when ENM pin voltage is set between
2.3V to 3.6V. If VENM is between 1.2V to 1.8V or between
4.5V to 5V, two SMPSs operate in ultrasonic mode. The
uP1590 has an internal 2ms output voltage soft-start for
each channel. Connect ENTRIPx pin to VCC or leave it
floating disables the SMPSx. For normal operation, connect
a resistor from ENTRIPx pin to GND sets over current
limit (OCL) threshold. The recommended OCL threshold
is from 0.5V to 2.7V. Higher or lower threshold beside this
recommended range could active the OCL but accuracy
may be affected and not preferred.After POR, the SMPSs
automatically start up if the ENTRIPx is valid (released
from the disable state).
Diode Emulation Mode
Ultrasonic Mode
On Time Control and PWM Frequency
The uP1590 runs with pseudo fixed frequency by feed-
forwarding the input and output voltage into the on-time
one-shot timer. The on-time is controlled proportional to
VOUT/VIN so that the duty ratio will be kept as technically
with the same cycle time.
The one-shot timer is programmed by a resister RTON
connected from TON pin to GND pin as:
VOUT
TON_ 5V = 4.45×10−2
×
×
×RTON + 20ns
×RTON +10ns
V
IN
VOUT
TON_ 3.3V = 3.5×10−2
V
IN
The on-time is determined by VIN and VOUT and is kept
fairy constant over a wide input and output voltage range
at steady state.
Table 1. Enable State
EN0 ENM ENTRIP1 ENTRIP2 LDO3 LDO5 CH1 CH2
Operation Modes (Only for uP1590P)
GND
X
X
X
Off
On
On
On
On
On
Off Off Off
On Off Off
On Off Off
On On Off
On Off On
On On On
uP1590P supports two operation modes:Diode Emulation
and Ultrasonic mode. The operation mode is selected by
ENM pin.
VIN GND
X
X
VIN
VIN
VIN
VIN
High
High
High
High
Off
On
Off
On
Off
Off
On
On
Diode Emulation Mode (ENM = LDO3)
In Diode Emulation Mode, the uP1590 automatically
switches over to DEM at light load. As the output current
decreases from heavy load condition, the inductor current
is also reduced and eventually comes to the point that its
valley touches zero current, which is the boundary between
continuous conduction and discontinuous conduction
modes. The lower MOSFET is turned off if detected the
negative inductor current. As the load current is further
decreased, it takes longer and longer to discharge the
output capacitor to the level that requires the next ONcycle.
The frequency is reduced smoothly and hence the power
losses is reduced at light load.
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uP1590
Functional Description
Ultrasonic Mode (ENM = LDO5)
RTRIP (kΩ)×ITRIP (uA)
VTRIP (mV) =
RTRIP (kΩ) =
= IOCP ×RDS(ON)
Ultrasonic mode (USM) is a technique that keeps the
switching frequency above audible frequencies while
maintaining best of the high conversion efficiency. When
the ultrasonic mode is selected, USM control circuit
monitors both MOSFETs and forces to change into the
ON state if both MOSFETs are off for more than 32us.
USM control circuit detects the over voltage condition and
begins to modulate the on-time to keep the output voltage
regulated.
10
I
OCP ×RDS(on) ×10
ITRIP (uA)
The voltage between GND pin and PHASEx pin monitors
the inductor current so that PHASEx pin should be
connected to the drain terminal of the lower MOSFET
properly. ITRIP has 4500 ppm/OC temperature slope to
compensate the temperature dependency of the lower
RDS(on). GND is used as the positive current sensing node
so that GND should be connected to the proper current
sensing device, i.e. the source terminal of the lower
MOSFET.
LDO3/LDO5 Linear Regulators
The uP1590 has two sets of 100mAlinear regulators which
outputs 5V and 3.3V. The LDO5 provides the main power
supply for the circuitry of the device and provides the current
for gate drivers.The LDO3 is intended mainly for 3.3V
supply for the notebook system during standby mode.
When the comparison is done during the off state, VTRIP
sets valley level of the inductor current. Therefore, the load
current at over current threshold, ILIM, can be calculated as
follows:
LDO5 Switcher
When VOUT1 finishes soft-start and the voltage higher
than its switchover threshold, an internal switch connects
BYP1 to LDO5 and shuts down the LDO5 simultaneously.
When ENTRIP1 goes low, the LDO5 is activated
immediately and then internal switch will be off. It decreases
the power dissipation from battery.
VTRIP IRIPPLE
ILIM
=
+
RDSON
VTRIP
2
(V − VOUT )× VOUT
1
IN
=
+
×
RDSON 2×L× f
V
IN
Output Discharge Control
In an over current condition, the current to the load exceeds
the current to the output capacitor thus the output voltage
tends to fall down. Eventually, it ends up with crossing the
under voltage protection threshold and shutdown both
channels.
When ENTRIPx is high, the uP1590 discharges outputs
using internal MOSFET. The current capability of these
MOSFETs is limited to discharge slowly.
Power OK Indicator
The uP1590 has one POK output indicator. A pull-up
resistor is needed for the open-drain output. The POK is
actively held low in soft-start, standby, shutdown and
protection. It is released when both VO1 and VO2 voltage
above than 90% of their nominal regulation voltage and
switchover has finished.
Over/Under Voltage Protection
The uP1590 monitors the feedback voltage to detect over
and under voltage. When the feedback voltage becomes
higher than 112% target voltage, the OVP circuit latches
as the upper MOS off and the lower MOS on. When the
feedback voltage becomes lower than 58% target voltage,
the UVP occurs and after 10us UVP delay, the uP1590
latches off both MOSFETs, and shuts off both drivers of
another channel. This function is enabled after 5ms
following ENTRIPx has become high.
Over Current Protection
The uP1590 has cycle-by-cycle over current limiting control.
The inductor current is monitored during the off state and
the controller keeps the off state when the inductor current
is larger than the over current trip level.
UVLO Protection
In order to provide both good accuracy and cost effective
solution, uP1590 supports temperature compensated
MOSFET RDS(on) sensing. ENTRIPx pin should be
connected toGNDthrough the trip voltage setting resistor,
RTRIP. ENTRIPx terminal sources ITRIP current, which is 10
uA typically at room temperature, and the trip level is set
to the OCL trip voltage VTRIP as below. Note that the VTRIP is
limited up to about 270 mV(Typ.) internally.
uP1590 has LDO5 under voltage lock out protection
(UVLO). When the LDO5 voltage is lower than UVLO
threshold voltage, both SMPS are turned off. This is a non-
latch protection.
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uP1590
Functional Description
Over Temperature Protection
The uP1590 monitors the temperature of itself. If the
temperature exceeds typical 150OC, the uP1590 is turned
off including LDOs. This is a non-latch protection.
Charge Pump (SECFB)
As shown in the Figure1, the external charge pump is
driven by LGATEx. The total charge pump voltage, VCP, is
:
VCP = VOx + 2× VLGATEx − 4× VD
where VLGATEx is the peak voltage of the LGATEx driver
which is equal to LDO5 and VD is the forward voltage
dropped across the Schottky diode.
The SECFB pin in the uP1590Q is used to monitor the
charge pump via a resistive voltage divider to generate
DC voltage and the clock driver uses VOx as its power
supply. In the event where SECFB drops below its feedback
threshold, an ultrasonic pulse will occur to refresh the
charge pump driven by LGATEx. If there an overload on
the charge pump in which SECFB can not reach more
than its feedback threshold, the controller will enter
ultrasonic mode. Special care should be taken to ensure
that enough normal ripple voltage is present on each cycle
to prevent charge pump shutdown.
The robustness of the charge pump can be increased by
reducing the charge pump decoupling capacitor and placing
a small ceramic capacitor, CP (47pF to 220pF), in parallel
with the upper leg of the SECFB resistor feedback network,
RCP1, as shown below in Figure 1
LGATEx
C1
C3
VOUTx
Charge Pump
C2
C4
CP
RCP1
.
uP1590Q
SECFB
RCP2
Figure 1.
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9
uP1590
Absolute Maximum Rating
(Note 1)
Supply Input Voltage, VIN ------------------------------------------------------------------------------------------ -0.3V to +30V
BOOTx to PHASEx -------------------------------------------------------------------------------------------------------- -0.3V to +6V
PHASEx to GND
DC ------------------------------------------------------------------------------------------------------------------------- -0.3V to +30V
< 200ns -------------------------------------------------------------------------------------------------------------------- -5V to +38V
UGATEx to PHASEx
DC---------------------------------------------------------------------------------------------------------------------- -0.3V to +6V
<200ns ---------------------------------------------------------------------------------------------------------------- -5V to +7V
LGATEx to GND
DC ------------------------------------------------------------------------------------------------------------------------- -0.3V to +6V
< 200ns ---------------------------------------------------------------------------------------------------------------- -2V to +7V
Other Pins to GND -------------------------------------------------------------------------------------------------------------- -0.3V to +6V
Storage Temperature Range ----------------------------------------------------------------------------------------- -65OC to +150OC
Junction Temperature ----------------------------------------------------------------------------------------------------------------- 150OC
Lead Temperature Range(Soldering 10sec) ----------------------------------------------------------------------------------------- 260OC
ESD Rating (Note 2)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------------------ 200V
Thermal Information
Package Thermal Resistance (Note 3)
WQFN3x3 - 20L θJA --------------------------------------------------------------------------------------------------------- 68°C/W
WQFN3x3 - 20L θJC ----------------------------------------------------------------------------------------------------------- 6°C/W
Power Dissipation, PD @ TA = 25°C
WQFN3x3 - 20L-------------------------------------------------------------------------------------------------------------------- 1.47W
Recommended Operation Conditions
(Note 4)
Operating Junction Temperature Range --------------------------------------------------------------------------------- -40°C to +125°C
OperatingAmbient Temperature Range ---------------------------------------------------------------------------------- -40°C to +85°C
Supply Input Voltage, VIN-------------------------------------------------------------------------------------------------------- 5.5V to 26V
Note 1. Stresses listed as the above “ Absolute Maximum Ratings” may cause permanent damage to the device.
These are for stress ratings. Functional operation of the device at these or any other conditions beyond
those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
Note 4. The device is not guaranteed to function outside its operating conditions.
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uP1590
Electrical Characteristics
(VIN=12V, VEN0=5V, VVFB1=VVFB2=2V, VENTRIP1=VENTRIP2=1V, VBYP1=5V, ILDO5=ILDO3=0A, TA = 25OC, unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
Typ Max Units
Supply Current
Rising
Falling
--
3.5
--
5.1
--
5.5
4.5
VIN Power On Reset
VPOR
V
VIN Supply Current
VIN Standby Current
VIN Shutdown Current
Output
IVIN
No Load, VVFB1 = VVFB2 = 2.05V
0.55 1.10 mA
IVINSTBY No Load, VENTRIP1 = VENTRIP2 = 5V
--
250
20
350
40
uA
uA
ISD
No Load, VEN0 = 0V
--
CCM Operation
PSM Operation
--
2
--
VFB Regulation Voltage
VVFBx
V
1.98 2.006 2.03
Output Voltage Range
VOUTx Discharge Current
SECFB Voltage
2
--
--
3
2
5.5
--
V
mA
V
IDischg
VENTRIPx = 5V, VOUTx = 0.5V
VSECFB uP1590Q only
1.92
2.08
On Time
VIN = 20V, RTON = 56kΩ, VPHASE1 = 5V
--
--
640
330
80
--
--
--
On-Time
TON
ns
VIN = 20V, RTON = 56kΩ, VPHASE2 = 3V
Minimum On-Time
Minimum Off-Time
TONMIN
TOFFMIN
FSW1
--
--
ns
ns
--
400
400
466
--
VOUT1 Operation Frequency
VOUT2 Operation Frequency
SMPS operating in USM
200
233
25
--
Frequency
kHz
kHz
FSW2
--
USM Frequency
Soft-Start
FUSM
--
Internal SS Time
LDO5 Output
TSS
Internal soft-start
--
2
--
ms
VBYP1 = 0V, ILDO5 < 100mA
4.8
5
5
5.2
V
BYP1 = 0V, ILDO5 < 100mA,
4.75
5.25
LDO5 Output Voltage
VLDO5
6.5V < VIN < 26V
V
VBYP1 = 0V, ILDO5 < 50mA,
5.5V < VIN < 26V
4.75
--
5
5.25
--
LDO5 Output Current
Switch Over Threshold
5V Switch Over Ron
ILDO5
VTH5VSW
R5VSW
VBYP1 = 0V, VLDO5 = 4.5V
Turn On
225
mA
V
4.53 4.66 4.79
Hysteresis
--
--
0.25
1.5
--
3
V
VOUT1 = 5V, ILDO5 = 100mA
Ω
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11
uP1590
Electrical Characteristics
Parameter
LDO3 Output
Symbol
Test Conditions
Min
Typ Max Units
VBYP1 = 0V, ILDO3 < 100mA
3.2
3.3
3.3
3.46
3.5
VBYP1 = 0V, ILDO3 < 100mA, 6.5V < VIN
< 26V
3.13
LDO3 Output Voltage
VLDO3
V
VBYP1 = 0V, ILDO3 < 50mA, 5.5V < VIN
< 26V
3.13
--
3.3
3.5
--
LDO5 Output Current
ILDO3
VBYP1 = 0V, VLDO3 = 3V
150
mA
%
Power OK
Rising Threshold
Hysteresis
-14
--
-10
5
-6
--
POK Threshold
VTHPOK
POK Propagation Delay
POK Leakage Current
POK Output Low Voltage
SECFB POK Threshold
TPOK
--
5
--
us
uA
V
ILK_POK
VPOK_L
VSEC_THPOK SECFB with respect to 2V
Delay time from 90% of VFB to POK
--
--
1
--
--
0.4
60
40
50
%
POK Delay
TPOKDEL
--
500
--
us
go high
Logic Threshold and Setting Conditions
Rising edge threshold
Falling edge threshold
OCL Setting Range
1.2
0.9
0.5
1.6
0.95
--
2
1
EN0 Voltage
VEN0
V
V
2.7
ENTRIPx Input Voltage
VENTRIPx
Clear fault high level / SMPSx off
level
4.5
--
--
Shutdown
DEM
--
--
--
--
0.8
3.6
--
ENM Threshold Voltage
(uP1590P)
VENM
2.3
4.5
V
USM
Protection: Current Sense
ENTRIPx Source Current
IENTRIPx
TCIEN
VENTRIPx = 0.9V
9.4
--
10
10.6
--
uA
ppm/-
OC
ENTRIPx Current Temp. Coefficient
On the basis of 25OC
4500
OCP Copm. Offset
OCL Threshold
VOCLoff
VOCL
VZC
VENTRIPx / 10
- 8
180
--
0
200
3
8
225
--
mV
mV
mV
VENTRIPx = 2V
Zero Current Threshold
GND - PHASEx, VVFBx = 2.1V
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uP1590
Electrical Characteristics
Parameter
Protection: UVP & OVP
OVP Trip Threshold
OVP Prop. Delay
Symbol
Test Conditions
Min
Typ Max Units
VOVP
TOVPDEL
VUVP
OVP detect
108
--
112
5
116
--
%
us
%
UVP detect
53
0.8
--
58
--
63
1.2
--
UVP Trip Threshold
VSEC_UVP uP1590Q/R
TUVPDEL
V
UVP Prop. Delay
UVP Enable Delay
UVLO
10
5
us
ms
TUVPEN From ENTRIPx enable
--
--
Rising edge
VUVLDO5
--
3.9
--
4.35
4.05
2.2
4.5
4.2
--
LDO5 UVLO Threshold
V
V
Falling edge
LDO3 UVLO Threshold
VUVLDO3
Thermal Shutdown
Shutdown temperature
--
--
150
10
--
--
Thermal SDN Threshold
TSDN
OC
Hysteresis
Internal Booststrap Switch
Internal Boost Charging Switch On-
Resistor
RBOOTx LDO5 to BOOTx, IBOOTx = 10mA
--
--
90
Ω
Output Drivers
Source, VBOOTx-UGATEx = 100mV
RUGATEx
--
--
--
--
--
--
5
2
8
4
8
3
--
--
UGATE Resistance
Ω
Ω
Sink, VUGATEx-PHASEx = 100mV
Source, VLDO5-LGATEx = 100mV
RLGATEx
5
LGATE Resistance
Dead Time
Sink, VLGATEx = 100mV
1.5
30
40
UGATEx < 1V to LGATEx > 1V
TD
ns
LGATEx < 1V to UGATEx > 1V
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13
uP1590
Typical Operation Characteristics
Power On from ENTRIP1
Power Off from ENTRIP1
ENTRIP1(5V/Div)
ENTRIP1(5V/Div)
VOUT1 (2V/Div)
POK (5V/Div)
VOUT1 (2V/Div)
POK (5V/Div)
LG1 (5V/Div)
400us/Div
IOUT1 = 0A
10ms/Div
IOUT1 = 0A
Power On from ENTRIP2
Power Off from ENTRIP2
ENTRIP2(5V/Div)
VOUT2 (2V/Div)
ENTRIP2(5V/Div)
VOUT2 (2V/Div)
POK (5V/Div)
POK (5V/Div)
LG2 (5V/Div)
400us/Div
IOUT2 = 0A
10ms/Div
IOUT2 = 0A
VO1 Load Transient Response
VO2 Load Transient Response
VOUT2(100mV/Div)
VOUT1(100mV/Div)
ILX2 (5A/Div)
ILX1 (5A/Div)
IOUT2 (5A/Div)
IOUT1 (5A/Div)
20us/Div
20us/Div
VIN = 12V, IOUT1 = 1A to 8A
VIN = 12V, IOUT2 = 1A to 8A
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uP1590
Typical Operation Characteristics
VO1 Line Regulation
VO2 Line Regulation
5.05
5.04
5.03
5.02
5.01
5.00
4.99
4.98
4.97
4.96
4.95
3.35
3.34
3.33
3.32
3.31
3.30
3.29
3.28
3.27
3.26
3.25
IOUT = 0A
IOUT = 6A
IOUT = 0A
IOUT = 6A
6
8
10 12 14 16 18 20 22 24 26
Input Voltage (V)
6
8
10 12 14 16 18 20 22 24 26
Input Voltage (V)
VO1 Load Regulation
VO2 Load Regulation
5.05
5.04
5.03
5.02
5.01
5.00
4.99
4.98
4.97
4.96
4.95
3.35
3.34
3.33
3.32
3.31
3.30
3.29
3.28
3.27
3.26
3.25
0.01
0.1
1
10
0.01
0.1
1
10
Output Current (A)
Output Current (A)
VO1 Efficiency
VO2 Efficiency
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
VIN = 8V
VIN = 12V
VIN = 20V
VIN = 8V
VIN = 12V
VIN = 20V
0.01
0.1
1
10
0.01
0.1
1
10
Output Current (A)
Output Current (A)
uP1590-DS-P0200, Oct. 2013
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15
uP1590
Application Information
Output Inductor Selection
MOSFET Selection
The inductor plays an important role in step-down The majority of power loss in the step-down power
converters because it stores the energy from the input converter is the loss in the power MOSFETs. For low
power rail and then releases the energy to the load. From voltage high current applications, the duty cycle of the
the viewpoint of efficiency, the dc resistance (DCR) of the upper MOSFET is small. Therefore, the switching loss of
inductor should be as small as possible to minimize the the upper MOSFET is of concern. Power MOSFETs with
conduction loss. In addition, the inductor covers a lower total gate charge are preferred in such kind of
significant proportion of the board space, so its size is application. However, the small duty cycle means the lower
also important. Low profile inductors can save board space MOSFET is on for most of the switching cycle. Therefore,
especially when the height has a limitation. However, low the conduction loss tends to dominate the total power loss
DCR and low profile inductors are usually cost ineffective. of the converter.
Additionally, larger inductance results in lower ripple To improve the overall efficiency, MOSFETs with low RDS(ON)
current, which translates into the lower power loss. are preferred in the circuit design. In some cases, more
However, the inductor current rising time increases with than one MOSFET are connected in parallel to further
inductance value. This means the transient response will decrease the on-state resistance. However, this depends
be slower. Therefore, the inductor design is a trade-off on the MOSFET driver capability and the budget.
between performance, size and cost.
Layout Considerations
In general, the switching frequency (on-time) and operating
point (% ripple or LIR) determine the inductor value as
shown in the following equation:
Layout is very important in high frequency switching
converter designs, the PCB could radiate excessive noise
and contribute to the converter instability with improper
layout. Certain points must be considered before starting
a layout.
tON × V − VOUTx
( )
IN
LIR ×ILOAD(MAX)
L =
Place the filter capacitor close to the IC.
where LIR is the ratio of the peak to peak ripple current to
the average inductor current.
Keep current limit setting network as close as possible
to the IC. Routing of the network should avoid coupling
to high voltage switching node.
Find a low loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. Ferrite cores
are often the best choice because powdered iron is
inexpensive and can work well at 200kHz. The core must
be large enough not to saturate at the peak inductor
current (IPEAK):
Connections from the drivers to the respective gate
of the upper or the lower MOSFET should be as short
as possible to reduce stray inductance.
All sensitive analog traces and components such as
VFBx, GND, ENTRIPx and POK should be placed
away from high voltage switching nodes such as
PHASEx, LGATEx, UGATEx, or BOOTx nodes to
avoid coupling. Use internal layer(s) as ground
plane(s) and shield the feedback trace from power
traces and components.
LIR
IPEAK = ILOAD(MAX)
+
×ILOAD(MAX)
2
The calculation above shall serve as a general reference.
To further improve the transient response, the output
inductance can be reduced even further. This needs to
be considered along with the selection of the output
capacitor.
Place the ground terminals of VINcapacitor(s), VOUTx
capacitor(s), and source of lower MOSFETs as close
as possible. The PCB trace defined as PHASEx node,
which connects to source of upper MOSFET, drain of
lower MOSFET and high voltage side of the inductor,
should be as short and wide as possible.
Output Capacitor Selection
The capacitor value and ESR determine the amount of
output voltage ripple and load transient response. Thus,
the capacitor value must be greater than the largest value
calculated from below equations:
ΔILOAD2 ×L
VSOAR
=
2×COUT ×VOUTx
⎛
⎞
⎟
⎟
⎠
1
⎜
VP−P = LIR ×ILOAD(MAX) × ESR +
⎜
8×COUT × fSW
⎝
where VSOAR are the allowable amount of undershoot
voltage and overshoot voltage in the load transient, VP-P is
the output ripple voltage.
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uP1590
Package Information
WQFN3x3-20L
0.30 - 0.50
1.40 - 1.80
0.15 - 0.25
2.90 - 3.10
Bottom View - Exposed Pad
Pin 1 mark
0.70 - 0.80
0.00 - 0.05
0.20 REF
Note
1.Package Outline Unit Description:
BSC: Basic. Represents theoretical exact dimension or dimension target
MIN: Minimum dimension specified.
MAX: Maximum dimension specified.
REF: Reference. Represents dimension for reference use only. This value is not a device specification.
TYP. Typical. Provided as a general value. This value is not a device specification.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm.
uP1590-DS-P0200, Oct. 2013
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17
uP1590
Important Notice
uPI and its subsidiaries reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products
and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information
before placing orders and should verify that such information is current and complete.
uPI products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment. However, no responsibility is
assumed by uPI or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
No license is granted by implication or otherwise under any patent or patent rights of uPI or its subsidiaries.
COPYRIGHT (C) 2011, UPI SEMICONDUCTOR CORP.
uPI Semiconductor Corp.
Sales Branch Office
uPI Semiconductor Corp.
Headquarter
12F-5, No. 408, Ruiguang Rd. Neihu District,
Taipei Taiwan, R.O.C.
TEL : 886.2.8751.2062 FAX : 886.2.8751.5064
9F.,No.5, Taiyuan 1st St. Zhubei City,
Hsinchu Taiwan, R.O.C.
TEL : 886.3.560.1666 FAX : 886.3.560.1888
18
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