75323G-S20-T [UTC]
MULTIPLE RS-232 DRIVERS AND RECEIVERS; 多台RS - 232驱动器和接收![75323G-S20-T](http://pdffile.icpdf.com/pdf1/p00168/img/icpdf/75323_938952_icpdf.jpg)
型号: | 75323G-S20-T |
厂家: | ![]() |
描述: | MULTIPLE RS-232 DRIVERS AND RECEIVERS |
文件: | 总12页 (文件大小:335K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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UNISONIC TECHNOLOGIES CO., LTD
75323
LINEAR INTEGRATED CIRCUIT
MULTIPLE RS-232 DRIVERS
AND RECEIVERS
DESCRIPTION
The UTC 75323 provides a rugged, low-cost effectiveness
performance due to the circuits consisting of bipolar ones,
incorporating five drivers and three receivers. It is characterized
with less required external components, board spaces and an easy
interface between UART and serial-port connector for a single chip.
Working at temperatures from 0℃ to 70℃ is one of its features.
FEATURES
* Single chip with easy interface between UART and serial-port
connector
* Data rates : 20 kb/s.
* Complement to the UTC 75232.
ORDERING INFORMATION
Ordering Number
Lead Free
Package
Packing
Halogen Free
75323L-S20-R
75323L-S20-T
75323L-D20-T
75323G-S20-R
75323G-S20-T
75323G-D20-T
SOP-20
SOP-20
DIP-20
Tape Reel
Tube
Tube
www.unisonic.com.tw
Copyright © 2012 Unisonic Technologies Co., Ltd
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LINEAR INTEGRATED CIRCUIT
PIN CONFIGURATION
VDD
VCC
1DA
2DA
2DA
1RY
1
2
3
4
5
20
1DY
2DY
3DY
1RA
19
18
17
16
15
14
2RY
4DA
3RY
5DA
GND
6
2RA
4DY
7
8
13 3RA
12 5DY
9
VSS
11
10
PIN DESCRIPTION
PIN NO.
PIN NAME
VCC
DESCRIPTION
1
2
Supply Voltage of receiver
Input of driver 1
1DA
2DA
3DA
1RY
2RY
4DA
3RY
5DA
GND
VSS
3
Input of driver 2
4
Input of driver 3
5
Output of receiver 1
Output of receiver 2
Input of driver 4
6
7
8
Output of receiver 3
Input of driver 5
9
10
11
12
13
14
15
16
17
18
19
20
Ground
Negative Supply Voltage of driver
Output of driver 5
Input of receiver 3
Output of driver 4
Input of receiver 2
Input of receiver 1
Output of driver 3
Output of driver 2
Output of driver 1
Positive Supply Voltage of driver
5DY
3RA
4DY
2RA
1RA
3DY
2DY
1DY
VDD
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75323
LINEAR INTEGRATED CIRCUIT
LOGIC SYMBOL
Note: This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
LOGIC DIAGRAM ( POSITIVE LOGIC )
BLOCK DIAGRAM
The circuit for each driver
VDD
11.6kΩ
9.4kΩ
Input DA
75.8Ω
320Ω
Output DY
254.5Ω
4.2kΩ
GND
0
10.4kΩ
68.5Ω
3.3kΩ
VSS
Resistor values shown are nominal.
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75323
LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM(Cont.)
The circuit for each receiver
VCC
1.66kΩ
9kΩ
5kΩ
Output RY
Input RA
3.8kΩ
2kΩ
10kΩ
GND
0
Resistor values shown are nominal
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75323
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATING (TA=25℃, unless otherwise specified)
PARAMETER
SYMBOL
VCC
RATINGS
10
UNIT
Supply Voltage (Note 2)
Supply Voltage (Note 2)
Supply Voltage (Note 2)
V
V
V
V
VDD
15
VSS
-15
Driver
-15 ~ 7
-30 ~ 30
-15 ~ 15
20
Input Voltage
VI
Receiver
Output Voltage (Driver)
Vo
IOL
V
Low-level Output Current (Receiver)
Storage temperature
mA
°C
TSTG
-65 ~ 150
Note: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. All voltages are with respect to the network ground terminal.
THERMAL DATA
PARAMETER
SYMBOL
RATINGS
UNIT
SOP-20
DIP-20
97
67
Junction to Ambient
θJA
°С/W
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
VDD
MIN
7.5
TYP
9
MAX
13.5
-13.5
5.5
UNIT
V
Supply Voltage
VSS
-7.5
4.5
-9
VCC
5
High-Level Input Voltage
Low-Level Input Voltage
Driver
VIH
1.9
V
V
Driver
VIL
0.8
-6
Driver
High-Level Output Current
IOH
mA
Receiver
Driver
-0.5
6
High-Level Output Current
IOL
TA
mA
Receiver
16
70
Operating Free-Air Temperature
0
℃
SUPPLY CURRENTS OVER OPERATING FREE-AIR TEMPERATURE RANGE
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX UNIT
V
DD=9V, VSS=-9V
25
All inputs at 1.9V, No load
All inputs at 0.8V, No load
All inputs at 1.9V, No load
All inputs at 0.8V, No load
mA
32
VDD=12V, VSS=-12V
Supply Current From VDD
IDD
V
DD=9V, VSS=-9V
VDD=12V, VSS=-12V
DD=9V, VSS=-9V
VDD=12V, VSS=-12V
DD=9V, VSS=-9V
VDD=12V, VSS=-12V
VCC=5V, All inputs at 5V, No load
7.5
mA
9.5
V
-25
mA
-32
Supply Current From VSS
Supply Current From VCC
ISS
V
-5.3
mA
-5.3
ICC
20
mA
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LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS OVER OPERATING FREE-AIR TEMPERATURE
RANGE (VDD=9V, VSS=-9V, VCC=5V , unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
VIL=0.8V, RL=3kΩ (Fig. 1)
VIH=1.9V, RL=3kΩ (Fig. 1)
VI=5V (Fig. 2)
MIN
6
TYP MAX UNIT
High-Level Output Voltage
VOH
VOL
IIH
7.5
V
V
Low-Level Output Voltage(see Note 1)
High-Level Input Current
-7.5
-6
10
μA
mA
Low-Level Input Current
IIL
VI=0 (Fig. 2)
-1.6
High-Level Short-Circuit Output Current
Low-Level Short-Circuit Output Current
Output Resistance (Note 3)
IOS(H) VIL=0.8V,Vo=0 (Fig. 1, Note 2) -4.5
IOS(L) VIH=2V, Vo=0 (Fig. 1) 4.5
rO VCC=VDD=VSS=0, Vo=-2V ~ 2V 300
-9
9
-19.5 mA
19
mA
Ω
Note: 1. The algebraic convention, where the more positive(less negative) limit is designated as maximum, is used in
this data sheet for logic levels only, e. g.,if-10V is maximum, the typical value is a more negative voltage.
2. Output short-circuit conditions must maintain the total power dissipation below absolute maximum ratings.
3. Test conditions are those specified by TIA/EIA-232-F and as listed above.
SWITCHING CHARACTERISTICS (TA=25℃, VDD=12V, VSS=-12V, VCC=5V±10%)
PARAMETER
SYMBOL
tPLH
TEST CONDITIONS
MIN
TYP MAX UNIT
Propagation Delay Time, Low- to
High-Level Output
315
500
RL=3kΩ ~ 7kΩ, CL=15pF
(Fig. 3)
ns
Propagation Delay Time, High-to
Low-Level Output
tPHL
75
60
175
100
2.5
75
RL=3kΩ~7kΩ, CL=15pF(Fig. 3)
RL=3kΩ ~ 7kΩ, CL=2500pF
(Fig. 3, Note 1)
ns
μs
ns
μs
tTLH Transition Time, Low-to High-Level
Output
tTLH
1.7
40
RL=3kΩ~7kΩ, CL=15pF(Fig. 3)
RL=3kΩ ~ 7kΩ, CL=2500pF
(Fig. 3, Note 2)
Transition Time, High-to Low-Level Output
tTHL
1.5
2.5
Note: 1. Measured between-3-V and 3-V points of the output waveform (TIA/EIA-232-F conditions), all unused
inputs are tied either high or low.
2. Measured between 3-V and -3-V points of the output waveform (TIA/EIA-232-F conditions), all unused
inputs are tied either high or low
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75323
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS OVER RECOMMENDED OPERATING
CONDITIONS (unless otherwise specified)
PARAMETER
SYMBOL
VIT+
TEST CONDITIONS
MIN
1.75
1.55
0.75
0.5
TYP
1.9
MAX UNIT
2.3
TA=25℃
Positive-Going Input Threshold Voltage
Fig.5
TA=0℃ ~ 70℃
2.3
V
Negative-Going Input Threshold Voltage
Input Hysteresis Voltage(VIT+ - VIT-)
VIT-
0.97
4
1.25
Fig. 5
VHYS
VIH=0.75V
2.6
5
High-Level Output Voltage
Low-Level Output Voltage
High-Level Input Current
VOH
VOL
IIH
IOH=-0.5mA
V
Inputs open
2.6
IOL=10mA, VI=3V
VI=25V
0.2
0.45
8.3
V
3.6
0.43
-3.6
mA
mA
mA
mA
mA
VI=3V
VI=-25V
VI=-3V
-8.3
-12
Low-Level Input Current
IIL
-0.43
Short-Circuit Output Current
IOS
Fig. 4
-3.4
Note:
All typical values are at TA=25℃, VCC=5V, VDD=9V, VSS=-9V
SWITCHING CHARACTERISTICS (TA=25℃, VCC=5V, VDD=12V, VSS= -12V)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
Propagation Delay Time, Low-to High-Level Output
Propagation Delay Time, High- to Low-Level Output
Transition Time, Low-to High-Level Output
tPLH
tPHL
tTLH
tTHL
107
42
500
150
525
60
ns
ns
ns
ns
CL=50pF, RL=5kΩ
Fig. 6
175
16
Transition time, High- to Low-Level Output
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75323
LINEAR INTEGRATED CIRCUIT
PARAMETER MEASUREMENT INFORMATION
IOS(L)
VDD
Vcc
VDD or GND
-
IOS(H)
VSS or GND
VI
VO
RL=3kΩ
VSS
Fig. 1 Driver Test Circuit for VOH, VOL, IOS(H), IOS(L)
Fig. 2 Driver Test Circuit for IIH and IIL
Fig.3 Driver Test Circuit and Voltage Waveforms
Notes: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics(tW=25μs,PRR=20kHz,ZO=50Ω,tR=tF<50ns)
VDD
VCC
-IOS
VSS
Fig.4 Receiver Test Circuit for Ios
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75323
LINEAR INTEGRATED CIRCUIT
PARAMETER MEASUREMENT INFORMATION(Cont.)
VDD
VCC
-IOH
VIT, VIN
VOH
IOL
VOL
VSS
Fig. 5 Receiver Test Circuit for VIT ,VOH, and VOL
Fig. 6 Receive Propagation and Transition Times
Notes: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics(tW=25μs,PRR=20kHz,ZO=50Ω,tR=tF<50ns)
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LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION
Diodes placed in series with the VDD and VSS leads protect the UTC 75323 in the fault condition in which the
device output are shorted to VDD or VSS, and the Power supplies are at low and provide low-impedance paths to
ground (see Figure7)
VDD
VDD
Output
±15V
UTC
75323
UTC
75323
VSS
VSS
Fig. 7 Power-Supply Protection to Meet Power-Off Fault Condition of TIA/EIA-232-F
TIA/EIA-232-F
DB9S
CONNECTOR
-12V
RI
TL16C450
ACE
10
9
11
12
5
GND
5DA
3RY
4DA
2RY
1RY
3DA
2DA
1DA
Vcc
VSS
5DY
3RA
4DY
2RA
1RA
3DY
2DY
1DY
VDD
43
RI
9
6
37
8
13
14
15
16
17
18
19
20
DTR
C5*
C4*
DTR
CTS
TX
40
CTS
13
7
6
5
4
3
2
1
UTC
75323
SO
RTS
RX
36
RTS
11
SI
DSR
DCD
41
C3*
C1*
DSR
42
C2*
DCD
1
12V
5V
Fig. 8 Typical Connection
*See Figure Slew Rate vs. Load Capacitance to select the correct values for the loading capacitors (C1, C2, C3, C4
and C5), which may be required to meet the RS-232 maximum slew-rate requirement of 30V/us. The value of the
loading capacitors resrequired depends upon the line length and desired slew rate, but is typically 330pF.
Note C: To use the receivers only, VDD and Vss both must be powered or tied to ground.
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75323
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS
DRIVER SECTION
Slew Rate vs. Load Capacitance
1000
100
10
1
VDD=9V
SS=-9V
RL=3kΩ
V
TA=25°C
1
10
100
1000
10000
Load Capacitance, CL (pF)
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LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS(Cont.)
RECEIVER SECTION
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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