MC34118L(28DIP) [UTC]

Speaker Phone Circuit, Bipolar, PDIP28,;
MC34118L(28DIP)
型号: MC34118L(28DIP)
厂家: Unisonic Technologies    Unisonic Technologies
描述:

Speaker Phone Circuit, Bipolar, PDIP28,

电信 光电二极管 电信集成电路
文件: 总14页 (文件大小:316K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
VOICE SWITCHED  
SPEAKER-PHONE CIRCUIT  
SOP-28  
DESCRIPTION  
The UTC MC34118 voice switched speaker-phone  
integrated circuit incorporates the necessary amplifiers,  
attenuators, level detectors and control algorithm to form the  
heart of a high quality hands-free speaker-phone system. It  
includes a microphone amplifier with adjustable gain and  
mute control. Transmit and Receive attenuators which  
operate in a complementary manner, level detectors at both  
DIP-28  
input and output of both attenuators, and background noise  
monitors for both the transmit and receive channels. A dial  
tone detector prevents the dial tone from being attenuated by  
the receive background noise monitor circuit. Also two line  
driver amplifiers which can be used to form a hybrid network  
in conjunction with an external coupling transformer.  
A
high-pass filter can be used to filter out 60Hz noise in the  
receive channel, or for other filtering functions. A chip disable  
pin permits powers down the entire circuit to converse power  
on long loops where loop current is at a minimum. The UTC  
MC34118 may be operated from a power supply, or it can be  
powered from the telephone line, requiring typically 5mA. The  
UTC MC34118 can be interfaced directly to TIP and  
SDIP-28  
*Pb-free plating product number: MC34118L  
RING( through  
a coupling transformer) for stand-alone  
operation, or it can be used in conjunction with a handset  
speech network and/or other features of a feature phone.  
FEATURES  
*Improved attenuator gain range: 52dB between Transmit  
and Receive  
*Low voltage operation for line-powered applications(3~6.5V)  
*4-point signal sensing for improved sensitivity  
*Background noise monitors for both Transmit and Receive  
paths  
*Microphone amplifier gain set by external  
Resistors-Mute function included  
*Chip disable for active/standby operation  
*On board filter pinned-out for user defined  
function  
*Dial tone detector to inhibit receive idle mode  
during dial tone presence  
ABSOLUTE MAXIMUM RATINGS(Ta=25°C,Voltages referred to pin 22)  
PARAMETER  
SYMBOL  
Vcc  
VALUE  
-1~7  
UNIT  
V
V
V
V
V
°C  
Supply Voltage  
Voltage at Pin 3  
V3  
V12  
-1~Vcc+1  
-1~Vcc+1  
-1~Vcc+0.5  
-0.5~Vcc+0.5  
-65~150  
Voltage at Pin 12( mute)  
Voltage at Pin 13( VLC)  
Voltage at Pin 9, Pin 21, and Pin 2  
Storage temperature  
V13  
V9, 21, 2  
Tstr  
1
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
RECOMMENDED OPERATION CONDITIONS  
PARAMETER  
SYMBOL  
V4  
V3  
V12  
V13  
IVB  
VALUE  
3.5~6.5  
0~Vcc  
0~Vcc  
0.3*VB~VB  
500  
UNIT  
V
V
V
V
Supply Voltage  
Voltage at Pin 3  
Voltage at Pin 12( MUTE)  
Voltage at Pin 13( VLC)  
IVB Current( Pin 15)  
µA  
Attenuator Input Signal Voltage at Pin 9, Pin 21  
Load Current  
@RXO, TXO(Pin8, Pin 22)  
@MCO(Pin 10)  
V9, V21  
350  
Mvrms  
mA  
0~+-2  
0~+-1  
0~+-0.5  
@HTO-, HTO+(Pin 6, Pin5)  
Ambient Operating Temperature  
Topr  
-20~60  
°C  
BLOCK DIAGRAM  
2
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
PIN CONFIGURATIONS  
PIN NAME  
DESCRIPTION  
1
2
3
FO Filter Output. Output impedance is less than 50 ohms.  
FI  
Filter Input. Input impedance is greater than 1 M ohms.  
CD Chip Disable. A logic low (<0.8V) sets normal operation. A logic high (>2V) disable the IC to converse  
power. Input impedance is nominally 90 K ohms.  
4
5
Vcc A supply voltage of +2.8V to +6.5V is required at 5mA. As Vcc falls from 3.5V to 2.8V, an AGC circuit  
reduces the receive attenuator gain by 25dB( when in the receive mode).  
HTO+ Output of the second hybrid amplifier. The gain is internally set at -1 to provide a differential output, in  
conjunction with HTO-, to the hybrid transformer.  
6
7
8
9
HTO- Output of the first hybrid amplifier. The gain of the amplifier is set by external resistors.  
HTI Input and summing node for the first hybrid amplifier. DC lever is about equal to VB.  
TXO Output of the transmit attenuator. DC level is about VB.  
TXI Input of the transmit attenuator. Maximum signal level is 350 mVrms. Input impedance is 10K.  
10 MCO Output of the microphone amplifier. The gain of the amplifier is set by external resistors.  
11  
12  
MCI Input of the summing node of the microphone. DC lever is VB.  
MUT Mute input. A logic low (<0.8V) sets normal operation. A logic high (>2V) mutes the microphone  
amplifier without affecting the rest of the circuit. Input impedance is 90 K ohms.  
13  
VLC Volume control input. When VLC=VB, the receive attenuator is at maximum gain when in the receive  
mode. When VLC=0.3dB, the receive gain is down 35dB. Does not effect the transmit modes.  
14  
15  
CT  
VB  
The RC at this pin sets the response time for the circuit to switch modes.  
N output voltage=Vcc/2. This voltage is a system AC ground and biases the volume control. A filter  
capacitor is required.  
16  
17  
CPT The RC at this pin sets the time constant for the transmit background side.  
TLI2 Input to the transmit level detector on the microphone/ speaker side.  
18 TLO2 Output to the transmit level detector on the microphone/ speaker side, and input to the transmit  
background monitor.  
19 RLO2 Output of the receive level detector on the microphone/ speaker side  
20  
21  
RLI2 Input to the receive level detector on the microphone/ speaker side  
RXI Input to the receive attenuator and dial tone detector. Maximum input level is 350mVrms. Input  
impedance is 10K.  
22  
23  
RXO Output of the receive attenuator. DC level is VB.  
TLI1 Input to the transmit level detector on the line side.  
24 TLO1 Output to the transmit level detector on the line side, and input to the transmit background monitor.  
25 RLO1 Output of the receive level detector on the line side.  
26  
27  
28  
RLI1 Input to the receive level detector on the line side.  
CPR The RC at this pin sets the time constant for the receive background monitor.  
GND Ground pin for the entire IC.  
3
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
ELECTRICAL CHARACTERISTICS(referred to fig. 1)  
PARAMETER  
SYMBOL  
TEST  
MIN  
TYP  
MAX  
UNIT  
CONDITIONS  
SUPPLY VOLTAGES  
V+ Supply Current  
Vcc=6.5V, CD=0.8V  
Vcc=6.5V, CD=2V  
CD Input Resistance  
CD Input Voltage(High)  
CD Input Voltage  
Icc  
5.5  
600  
90  
8
mA  
µA  
kΩ  
V
V
V
800  
RCD  
VCDH  
VCDL  
VB  
Vcc=VCD=6.5V  
50  
2
Vcc  
0.8  
VB Output Voltage  
Vcc=3.5V  
Vcc=5V  
IVB=1mA  
CVB=220µF,  
f=1kHz  
1.3  
2.1  
400  
54  
1.8  
2.4  
VB Output Resistance  
VB Power Supply Rejection Ratio  
ROVB  
PSRR  
dB  
ATTENUATORS  
Receive Attenuator Gain(f=1kHz, VLC=VB)  
Rx Mode, RXI=150mVrms  
Rx Mode, RXI=150mVrms  
Gain Change  
GRX  
GRX  
GRX1  
Vcc=5V  
Vcc=3.5V  
Vcc=3.5V vs.  
Vcc=5V  
4
4
-0.5  
6
6
0
8
8
+0.5  
dB  
dB  
dB  
AGC Gain Change  
GRX2  
Vcc=3.5V vs.  
Vcc=5V  
-25  
-15  
dB  
Idle Mode, RXI=150mVrms  
Rx to Tx Mode Range  
Volume Control Range  
RXO DC Voltage  
RXO DC Voltage  
RXO High Voltage  
GRXI  
GRX3  
VCR  
VRXO  
VRXO  
VRXOH  
-22  
49  
27  
-20  
52  
35  
VB  
+-10  
-17  
54  
dB  
dB  
dB  
V
mV  
V
Rx Mode  
Rx to Tx Mode  
Iout=-1mA,  
RXI=VB+1.5V  
Iout=+1mA,  
RXI=VB-1V,  
Output Measured  
with Respect to  
VB  
+-150  
-1  
3.7  
RXO Low Voltage  
VRXOL  
-1.5  
V
RXI Input Resistance  
RRXI  
RXI<350mVrs  
7
10  
14  
kΩ  
4
-22  
49  
6
-20  
52  
8
-17  
54  
dB  
dB  
dB  
V
Tx  
VB  
TXO DC Voltage  
TXO High Voltage  
VTXO  
VTXOH  
Tx to Rx Mode  
Iout=-1mA,  
TXI=VB+1.5V  
Iout=+1mA,  
TXI=VB-1V,  
Output Measured  
with Respect to  
VB  
+-30  
+-150  
-1  
mV  
V
3.7  
TXO Low Voltage  
VTXOL  
-1.5  
V
TXI Input Resistance  
RTXI  
TXI<350mVrs  
7
10  
14  
kΩ  
4
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
PARAMETER  
Gain Tracking  
SYMBOL  
GTR  
TEST  
MIN  
TYP  
MAX  
UNIT  
dB  
CONDITIONS  
GRx+GTx, @Tx,  
Idle, Rx  
+-0.1  
ATTENUATOR CONTROL  
CT Voltage( CT-VB)  
Rx Mode  
Idle Mode  
Tx Mode  
CT Source Current  
VLC=VB  
240  
0
-240  
-60  
mV  
mV  
mV  
µA  
ICTR  
ICTT  
(Switching to  
Rx Mode)  
(Switching to  
Tx Mode)  
-85  
-40  
CT Sink Current  
+40  
+60  
+85  
µA  
CT Slow Idle Current  
CT Fast Idle Internal Resistance  
VLC Input Current  
Dial Tone Detector Threshold  
MICROPHONE AMPLIFIER( VMUT< 0.8V, AVCL=31dB, unless otherwise specified)  
ICTS  
RFI  
IVLC  
VDT  
0
2
-60  
15  
µA  
kΩ  
nA  
mV  
1.5  
10  
3.6  
20  
50  
VMCO-VB, Rf=180kΩ  
Output Offset  
MCOVOS  
AVOLM  
GBWM  
-50  
70  
0
80  
1
mV  
dB  
MHz  
V
Open Loop Gain  
Gain Bandwidth  
Output High Voltage  
F<100Hz  
VMCOH  
Iout=1mA,  
Vcc=5V  
3.7  
Output Low Voltage  
Input Bias Current  
Muting(Gain)  
VMCOL  
IBM  
GMT  
Iout=1mA  
@MCI  
f=1kHz, VMUT=2V  
300Hz<f<10kHz  
Vcc=VMUT=6.5V  
200  
mV  
nA  
dB  
-40  
-55  
-68  
90  
MUT Input Resistance  
MUT High Input Voltage  
RMUT  
VMUTH  
50  
2
kΩ  
V
Vcc  
0.8  
MUT Low Input Voltage  
Distortion  
HYBID AMPLIFIER  
HTO-Offset  
VMUTL  
THDM  
0
V
%
300Hz<f<10kHz  
0.15  
0
HVOS  
VHTO-~VB,  
Rf=51kΩ  
Rf=51kΩ  
HTI to HTO-,  
F<100Hz  
-20  
20  
30  
mV  
HTO- to HTO+ Offset  
Open Loop Gain  
HBVOS  
AVOLH  
-30  
60  
0
80  
mV  
dB  
Gain Bandwidth  
GBWH  
AVCLH  
IBH  
VHT-H  
VHT-L  
VHT+H  
VHT+L  
THDM  
1
0
-30  
MHz  
dB  
nA  
V
mV  
V
Closed Loop Gain  
Input Bias Current(@HTI)  
HTO- High Voltage  
HTO- Low Voltage  
HTO+ High Voltage  
HTO+ Low Voltage  
Distortion  
HTO- to HTO+  
-0.35  
3.7  
0.35  
Iout=-5mA  
Iout=+5mA  
Iout=-5mA  
Iout=+5mA  
300Hz<f<10kHz  
250  
450  
3.7  
mV  
%
0.3  
LEVEL DETECTORS and BACKGROUND NOISE MONITORS  
5
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
PARAMETER  
SYMBOL  
ITH  
TEST  
CONDITIONS  
MIN  
0.8  
TYP  
1
MAX  
1.2  
UNIT  
mA  
Transmit-Receive Switching  
Threshold( Ratio of Current at  
RLI1+RLI2 to 20µA at TLI1+TLI2  
to Switch from Tx to Rx)  
Source Current at RLO1, RLO2,  
TLO1, TLO2  
ILSO  
ILSK  
-2  
4
mA  
Sink Current at RLO1, RLO2,  
TLO1, TLO2  
µA  
CPR, CPT Output Resistance  
CPR, CPT Leakage Current  
Filter  
RCP  
ICPLK  
Iout=1.5mA  
35  
-0.2  
µA  
Voltage Offset at FO  
FOVOS  
VFO-VB, 220kΩ  
from VB to FI  
-200  
150  
-90  
0
mV  
FO Sink Current  
FI Bias Current  
IFO  
IFI  
260  
-50  
400  
µA  
nA  
SYSTEM Distortion(f=1kHz)  
Rx Mode  
THDR  
THD`  
from FI to RXO,  
FO connected to  
RXI  
from MCI to  
HTO-/HTO+,  
includes TX  
attenuator  
0.5  
0.8  
3
3
%
%
Tx Mode  
TEMPERATURE PARAMETERS  
PARAMETER  
TYP VALUE  
(Ta=25°C)  
5mA  
400µA  
2.1V  
TYP CHANGE  
UNIT  
Vcc Supply Current(CD=0.8V)  
Vcc Supply Current(CD=2V)  
VB Output Voltage(Vcc=5V)  
Attenuator Gain(Max Gain)  
Attenuator Gain(Max Attenuation)  
Attenuator Input resistance  
Dial Tone Detector Threshold  
CT Source, Sink Current  
Microphone, Hybid Amplifier Offset  
Transmit-Receive Switching Threshold  
Sink Current at RLO1, RLO2, TLO1, TLO2  
Closed Loop Gain( HTO- to HTO+)  
-0.3  
-0.4  
+0.8  
0.0008  
0.004  
0.6  
20  
-0.15  
+-4  
%/°C  
%/°C  
%/°C  
dB/°C  
dB/°C  
%/°C  
µV/°C  
%/°C  
µV/°C  
%/°C  
nA/°C  
%/°C  
6
-46dB  
10kΩ  
15mV  
+-60µA  
0mV  
1
4µA  
+-0.02  
-10  
0.001  
0dB  
6
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
FUNCTIONAL DESCRIPTION  
INTRODUCTION  
The fundamental difference between operation of a speakerphone and a handset is that of half-duplex versus  
full-duplex. The handset is full duplex since conversation can occur in both directions(transmit and receive)  
simultaneously. A speakerphone has higher gain levels in both paths, and attempting to converse full duplex results  
in oscillatory problems due to the loop that exists within the system. The loop is formed by the receive and transmit  
paths, the hybrid, and the acoustic coupling(speaker to microphone). The only practical and economical solution  
used to date is to design the speakerphone to function in a half duplex mode- ie. only one person speaks at a time,  
while the other listens. To achieve this requires a circuit which can detect who is talking, switch on the appropriate  
path( transmit or receive), and switch off( attenuate) the other path. In this way, the loop gain is maintained less than  
unity, when the talkers exchange function, the circuit must quickly detect this, and switch the circuit appropriately. By  
providing speech level detectors, the circuit operates in a “hands-free” mode, eliminating the need for a  
“ push-to-talk” switch. The handset, by the way, has the same loop as the speakerphone. But since the gains are  
considerably lower, and since the acoustic coupling from the ear piece to the mouthpiece is almost non-existent( the  
receiver is normally held against a person’s ear), oscillations do not occur. The UTC MC34118 provides the  
necessary level detectors, attenuators, and switching control for a properly operating speakerphone. The detection  
sensitivity and timing are externally controllable. Additionally, the UTC MC34118 provides background noise  
monitors which make the circuit insensitive to room and line noise, hybrid amplifier for interfacing to Tip and Ring,  
the microphone amplifier, and other associated functions. Please refer to the Block Diagram when reading the  
following sections.  
ATTENUATORS  
The transmit and receive attenuators are complementary in function, ie. when one is at maximum gain(+6dB),  
the other is at maximum attenuation(-46dB), and vice versa. They are never both fully on or both fully off. The sum of  
their gains remains constant(within a nominal error band of +-0.1dB) at a typical value of -40dB( see Figure 10).  
Their purpose is to control the transmit and receive paths to provide the half-duplex operation required in  
speakerphone. The attenuators are non-inverting, and have a -3dB(from max gain) frequency of ~100kHz. The input  
impedance of each attenuator( TXI and RXI) is nominally 10k, and the input signal should be limited to 350  
mVrms( 990mvp-p) to prevent distortion. That maximum recommended input signal is independent of control setting.  
The diode clamp on the inputs limits the input swing, and therefore the maximum negative output swing. This is the  
reason for VRXOL and VTXOL specification being defined as they are in the Electrical Characteristics. The output  
impedance is < 10until the output current limit( typically 2.5mA) is reached.  
The attenuators are controlled by the signal output of the Control Block, which is measurable at the CT pin( pin 14).  
When the CT pin is at +240mV with respect to VB, the circuit is in the receive mode(receive attenuator is at +6dB).  
The circuit is in an idle mode when the CT voltage is equal to VB causing the attenuators’ gains to be halfway  
between their fully on and fully off positions(-20 dB each). Monitoring the CT voltage(with respect to VB) is the most  
direct method of monitoring the circuit’s mode. The inputs to the Control Block are 7: 2 from the comparators  
operated by the level detectors, 2 from the background noise monitors, the volume control, the dial-tone detector,  
and the AGC circuit. These 7 inputs are described below.  
7
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
LEVEL DETECTORS  
There are four level detectors-two on the receive side and two on the transmit side. Refer to Figure 3-the terms in  
parentheses form one system, and the other terms form the second system. Each level detector is a high amplifier  
with back-to-back diodes in the feedback path, resulting in non-linear gain, which permits operation over a wide  
dynamic range of speech levels. The sensitivity of each level detector is determined by the external resistor and  
capacitor at each input( TLI1, TLI2, RLI1, and RLI2). Each output charges an external capacitor through a diode and  
limiting resistor, thus providing a DC representation of the input AC signal level. The outputs have a quick rise  
time( determined by the capacitor and an internal 350resistor), and a slow decay time set by an internal current  
source and the capacitor. The capacitors on the four outputs should have the same value (+-10%) to prevent timing  
problems. Referring to the Block Diagram, on the receive side, one level detector(RLI1) is at the receive input  
receiving the same signal as at Tip and Ring, and the other(RLI2) is at the output of the speaker amplifier. On the  
transmit side, one level detector(TLI2) is at the microphone amplifier, while the other(TLI1) is at the hybrid output.  
Outputs RLO1 and TLO1 feed a comparator, the output of which goes to the attenuator Control Block. Likewise,  
outputs RLO2 feed a second comparator which also to the attenuator Control Block. The truth table for the effects of  
the level detectors on the Control Block is given in the section describing the Control Block.  
CPR  
100k  
(CPT)  
Background  
Level Detector  
Vcc  
RLI1  
Noise Monitor  
(TLI2)  
350Ω  
-
-
-
+
-
47μF  
5.1k  
VB  
VB  
+
+
36mV  
+
RLO1  
(TLO2)  
2.0μF  
Signal  
Input  
4.0  
56k  
μA  
0.1μF  
0.1μF  
33k  
VB  
C4  
Signal  
Input  
Level Detector  
5.1k  
(C3)  
To Attenuator  
Control Block  
-
+
350Ω  
-
+
TLI1  
C2  
(RLI2)  
(C1)  
TLO1  
4.0  
Comparator  
(RLO2)  
μA  
Note:External component values are  
application dependent.  
2.0μF  
FIGURE.3 LEVEL DETECTORS  
BACKGROUND NOISE MONITORS  
The purpose of the background noise monitors is to distinguish speech( which consists of bursts) from background  
noise( a relatively constant signal level). There are two background noise monitors- one for the receive path and one  
for the transmit path. Referring to Figure 3, the receive background noise monitor is operated on by the RLI1-RLO1  
level detector, while the transmit background noise monitor is operated on by the TLI2-TLO2 level detector. They  
monitor the background noise by storing a DC voltage representative of the respective noise levels in capacitors at  
CPR and CPT. The voltage at these pins have slow rise times( determined by the external RC), but fast decay times.  
If the signal at RLI1( or TLI2) changes slowly, the voltage at CPR( or CPT) will remain more positive than the voltage  
at the non-inverting input of the monitor’s output comparator. When speech is present, the voltage on the  
non-inverting input of the comparator will rise quicker than the voltage at the inverting input( due to the burst  
characteristic of speech), causing its output to change. This output is sensed by the attenuator Control Block. The 36  
mV offset at the comparator’s input keeps the comparator from changing state unless the speech level exceeds the  
background noise by ~4dB. The time constant of the external RC( ~4.7seconds) determines the response time to  
background noise variations.  
VOLUME CONTROL  
The volume control input at VLC(pin 13), is sensed as a voltage with respect to VB. The volume control affects the  
attenuators only in the receive mode. It has no effect in the idle or transmit modes. When in the receive mode, the  
gain of the receive attenuator will be +6dB, and the gain of the transmit attenuator will be -46dB, only when VLC is  
equal to VB. As VLC is reduced below VB, the gain of the receive attenuator is reduced, and the gain of the transmit  
8
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
attenuator is increased, such that their sum remains constant. Changing the voltage at VLC changes at CT( see the  
attenuator Control Block section), which in turn controls the attenuators. The volume control setting does not affect  
the maximum attenuator input signal at which noticeable distortion occurs. The bias current at VLC is typically 60 nA  
out of the pin, and does not vary significantly with the VLC voltage or with VCC.  
DIAL TONE DETECTOR  
The dial tone detector is a comparator with one side connected to the receive input(RXI) and the other input  
connected to VB with a 15mV offset( see Figure 4). If the circuit is in the receive mode, and the incoming signal is  
greater than 15Mv(10 mVrms). The comparator’s output will change, disabling the receive idle mode. The receive  
attenuator will then be at a setting determined solely by the volume control.  
The purpose of this circuit is to prevent the dial tone( which would be considered as continuous noise) from fading  
away as the circuit would have the tendency to switch to the idle mode. By disabling the receive idle mode, the dial  
tone remains at the normally expected full level.  
AGC  
The AGC circuit affects the circuit only in the receive mode, and only whenn the supply voltage( Vcc) is less than  
3.5 volts. As Vcc falls below 3.5 volts., the transmit path attenuation changes such that the sum of the transmit and  
receive gains remains constant. The purpose of this feature is to reduce the power) and current) used by the  
speaker when a line-powered speakerphone is connected to a long line, where the available power is limited. By  
reducing the speaker power, the voltage sag at Vcc is controlled, preventing possible erratic operation.  
ATTENUATOR CONTROL BLOCK  
The Attenuator control block has the seven inputs described below:  
*The output of the comparator operated by RLO2 and TLO2( microphone/ speaker side), designated C1.  
*The output of the comparator operated by RLO1 and TLO1( Tip/ Ring side), designated C2.  
*The output of the transmit background noise monitor, designated C3.  
*The output of the receive background noise monitor, designated C4.  
* The volume control  
* The dial tone detector  
* The AGC circuit  
The single output of the control block controls the two attenuators. The effect of C1~C4 is as follows:  
INPUTS  
OUTPUT MODE  
C1  
Tx  
Tx  
Rx  
Rx  
Tx  
Tx  
Rx  
Rx  
C2  
Tx  
Rx  
Tx  
Rx  
Tx  
Rx  
Tx  
Rx  
C3  
1
Y
Y
X
0
0
0
X
C4  
X
Y
Y
1
X
0
Transmit  
Fast Idle  
Fast Idle  
Receive  
Slow Idle  
Slow Idle  
Slow Idle  
Slow Idle  
0
0
9
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
A definition of the above terms:  
1. “Transmit” means the transmit attenuator is fully on( +6dB). And the receive attenuator is at max. attenuation  
( -46dB).  
2. “Receive” means both attenuators are controlled by the volume control. At max. volume the receive attenuator is  
fully on( +6dB), and the transmit attenuator is at max.attenuation( -46dB).  
3. “Fast Idle” means both transmit and receive speech are present in approximately equal levels. The attenuators  
are quickly switched(30 ms) to idle until one speech level dominates the other.  
4. “Slow Idle” means speech has ceased in both transmit and receive paths. The attenuators are then slowly  
switched(1 second) to the idle mode.  
5. Switching to the full transmit or receive from any other mode is at the fast rate(~30 ms).  
A summary of the truth table is as follows:  
1. The circuit will switch to transmit if: (A) both transmit level detectors sense signals relative to the respective  
receive level detectors( TLI1 versus RLI1, TLI2 versus RLI2) and (B) the transmit background noise monitor  
indicates the presence of speech.  
2. The circuit will switch to receive if: (A) both receive level detectors sense higher signal levels relative to the  
respective transmit level detectors and (B) the receive background noise monitor indicates the presence of speech.  
3. The circuit will switch to the fast Idle mode if the level detectors disagree on the relative strengths of the signal  
levels, and at least one of the background noise monitor indicates speech. For example, referring to the Figure 2, if  
there is sufficient signal at the microphone amp. Output(TLI2) to over-ride the speaker signal(RLI2), and there is  
sufficient signal at the receive input(RLI1) to over-ride the signal at the hybrid output(TLI1), and either or both  
background noise monitors indicates speech, then the circuit will be in the fast idle mode. Two conditions which  
can cause the fast idle mode to occur are : (A) when both talkers are attempting to gain control of the system by  
talking at the same time. And (B) when one talker is in a very noisy environment, forcing the other to continually  
over-ride that noise level. In general, the fast idle mode will occur infrequently.  
4. The circuit will switch to the slow idle mode when: (A) both talkers are quiet( no speech present) or (B) when one  
talker’s speech level is continuously over-ride by noise at the other speaker’s location. The time required to switch  
the circuit between transmit, receive, fast idle, and slow idle is determined in part by the components at the CT  
pin( pin14), (see the section on switching timers for a more complete explanation of the switching time components  
A schematic of the CT circuitry is shown in Figure 5, and operates as follows:  
*RT is typically 120k, and CT is typically 5µF.  
*To switch to the receive mode, I1 is turned on( I2 is off), charging the external capacitor to +240mV above VB( An  
internal clamp prevents further charging of the capacitor).  
*To switch to the transmit mode, I2 is turned on( I1 is off), bringing down the voltage on the capacitor to -240mV  
with respect VB.  
*To switch to idle quickly(fast idle), the current sources are turned off, and the internal 2kresistor is switched in,  
discharging the capacitor to VB with a time constant= 2kx CT.  
*To switch to idle slowly(slow idle), the current sources are turned off, the switch at the 2kresistor is open, and the  
capacitor discharges to VB through the external resistor RT with a time constant=RT x CT.  
10  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
MICROPHONE AMPLIFIER  
The microphone amplifier( Pins 10, 11) has the non-inverting input internally connected to VB while the inverting  
input and the output are pinned out. Unlike most op-amps., the amplifier has an all-NPN output stage, which  
maximizes phase margin and gain bandwidth. This feature ensures stability at gains less than unity, as wide range of  
reactive loads. The open loop gain is typically 80Db(f<100Hz), and the gain bandwidth is typically 1MHz. The  
maximum p-p output swing is typically 1 volt. less than Vcc with an output impedance of <10until current limiting is  
reached( typically 1.5mA). Input bias current at MCI is typically 40nA out of the pin. The muting function( Pin 12),  
when activated, will reduce the gain of the amplifier to ~-39dB( with RMI=5.1k) by shorting the range of ground and  
Vcc. If the mute function is not used, the pin should be grounded.  
HYBRID AMPLIFIER  
The two hybrid amplifiers( at HTO+, HTO-, and HTI), in conjunction with an external transformer, provide the  
two-to-four wire converter for interfacing to the telephone line. The gain of the first amplifier( HTI to HTO-) is set by  
external resistors( gain = -RHF/RHI in Block Diagram), and its output drives the second amplifier, the gain of which is  
internally set at -1. Unlike most op-amps., the amplifiers have an all- NPN output stage, which maximizes phase  
margin and gain-bandwidth. This feature ensures stability at gains less than unity, as with a wide range of reactive  
loads. The open loop gain of the first amplifier is typically 80dB, and the gain-bandwidth of each amplifier is ~1MHz.  
The maximum p-p output swing is typically 1.2 volts. less than Vcc with an output impedance of <10until current  
limiting is reached( typically 8mA). The output current capability is guaranteed to be a minimum of 5mA. The bias  
current at HTI is typically 30nA out of the pin. The connections to the coupling transformer are shown in the Block  
Diagram. The block labeled ZBal is the balancing network necessary to match the line impedance.  
FILTER  
The operation of the filter circuit is determined by the external components. The circuit within the UTC MC34118,  
from pins FI to FO is a butter with a high input impedance(>1M), and a low output impedance(<50). The  
configuration of the external components determines whether the circuit is a high-pass filter( as shown in Block  
Diagram), a low-pass filter, or a band-pass filter. As a high-pass filter, with the components shown in Figure 6, the  
filter will keep out 60Hz( and 120Hz) hum which can be picked up by the external telephone lines. As a low-pass  
filter, with the components shown in Figure 7, it can be used to roll off the high end frequencies in the receive circuit,  
which aids in protecting against acoustic feedback problems, with an appropriate choice of an input coupling  
capacitor to the low-pass filter, a band pass filter is formed.  
11  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
POWER SUPPLY, VB, and CHIP DISABLE  
The power supply voltage at Vcc( Pin 4) is to be between 3.5 and 6.5 volts. for normal operation, with reduced  
operation possible down to 2.8 volts. The output voltage at VB( Pin 15) is ~(Vcc-0.7)/2, and provides the AC ground  
for the system. The output impedance at VB is ~400and in conjunction with the external capacitor at VB, forms a  
low pass filter for power supply rejection. The choice of capacitor is application dependent based on whether the  
circuit is powered by the telephone line or power supply. Since VB biases the microphone and hybrid amplifiers, the  
amount of supply rejection at their outputs is directly related to the rejection at VB, as well as their respective gains.  
The Chip Disable(Pin 3) permits powering down the IC to conserve power and/or for muting purposes. With CD<0.8  
volts., normal operation is in effect. With CD>2 volts. and <Vcc, the IC is powered down. In the powered down mode,  
the microphone and the hybrid amplifiers are disabled, and their outputs go to a high impedance state. Additionally,  
the bias is removed from the level detectors. The bias is not removed from the filter( Pin 1, 2), the attenuators( Pin 8,  
9, 21, 22), or from Pins 13, 14, and 15( the attenuators are disabled, however, and will not pass a signal impedance  
at CD is typically 90k, has a threshold of ~1.5 volts., and the voltage at this pin must be kept within the range of  
ground and Vcc). If CD is not used, the pin should be grounded.  
12  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
APPLICATION CIRCUIT  
13  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  
UTC MC34118 LINEAR INTEGRATED CIRCUIT  
UTC assumes no responsibility for equipment failures that result from using products at values that  
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or  
other parameters) listed in products specifications of any and all UTC products described or contained  
herein. UTC products are not designed for use in life support appliances, devices or systems where  
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in  
whole or in part is prohibited without the prior written consent of the copyright owner. The information  
presented in this document does not form part of any quotation or contract, is believed to be accurate  
and reliable and may be changed without notice.  
14  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-007,B  

相关型号:

MC34118L(28SDIP)

Speaker Phone Circuit, Bipolar, PDIP28,
UTC

MC34118L(28SOP)

Speaker Phone Circuit, Bipolar, PDSO28,
UTC

MC34118L-D28-T

VOICE SWITCHED SPEAKER-PHONE CIRCUIT
UTC

MC34118L-E28-T

VOICE SWITCHED SPEAKER-PHONE CIRCUIT
UTC

MC34118L-S28-R

VOICE SWITCHED SPEAKER-PHONE CIRCUIT
UTC

MC34118L-S28-T

VOICE SWITCHED SPEAKER-PHONE CIRCUIT
UTC

MC34118P

VOICE SWITCHED SPEAKERPHONE CIRCUIT
MOTOROLA

MC34118_09

VOICE SWITCHED SPEAKER-PHONE CIRCUIT
UTC

MC34118_15

VOICE SWITCHED SPEAKER-PHONE CIRCUIT
UTC

MC34119

LOW POWER AUDIO AMPLIFIER
MOTOROLA

MC34119

Low Power Audio Amplifier
FREESCALE

MC34119

LOW POWER AUDIO AMPLIFIER
UTC