PA3202-N24-T [UTC]
2-W STEREO AUDIO POWER AMPLIFIER WITH MUTE; 与MUTE 2 -W立体声音频功率放大器
| 型号： | PA3202-N24-T |
| 厂家： | 
Unisonic Technologies |
| 描述： | 2-W STEREO AUDIO POWER AMPLIFIER WITH MUTE |
| 文件： | 总11页 (文件大小：312K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
PA3202
CMOS IC
2-W STEREO AUDIO POWER
AMPLIFIER WITH MUTE
DESCRIPTION
The UTC PA3202 is a monolithic integrated circuit that stereo
bridged audio power amplifiers capable of producing 2 W into 3Ω
with a 5V supply voltage or 800mW into 3Ω with a 3.3V supply
voltage .The UTC PA3202 simplifies design and frees up board
space for other features. Both of the depop circuitry and the
thermal shutdown protection circuitry are integrated in UTC
PA3202, that reduce clicks and pops noise during power up or
shutdown mode operation.
HTSSOP-24
A MUX control terminal (HP/LINE) allows selection between the
two sets of stereo input signals. To simplify the audio system
design, UTC PA3202 combines
a stereo bridge-tied loads
*Pb-free plating product number: PA3202L
(BTL)mode for speaker drive and a stereo single-end (SE)mode for
headphone drive into a single chip, where both modes are easily
switched by the SE/BTL input control pin signal.
FEATURES
* Improves depop circuitry to eliminate turn-on and turn-off
transients in output
* Output power:
-2W(typ.)@5V into 3Ω with 0.2% THD+N max (1kHz)
-800mW(typ.)@3.3V into 3Ω with 0.2% THD+N max (1kHz)
* Fully specified for use with 3-Ω Loads
* Stereo switchable bridged/single-ended power amplifiers
* Input MUX select terminal
* Thermal-shutdown protection
* Shutdown mode available
ORDERING INFORMATION
Ordering Number
Package
Packing
Normal
Lead Free Plating
PA3202-N24-R
PA3202-N24-T
PA3202L-N24-R
PA3202L-N24-T
HTSSOP-24
HTSSOP-24
Tape Reel
Tube
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Copyright © 2007 Unisonic Technologies Co., Ltd
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QW-R502-106.B
PA3202
CMOS IC
PIN CONFIGURATION
1
2
3
4
5
6
GND/HS
TJ
24
23
GND/HS
NC
ROUT+
RLINEIN
RHPIN
RBYPASS
RVDD
LOUT+
22
21
20
LLINEIN
LHPIN
LBYPASS
LVDD
19
18
17
16
15
14
13
7
8
SHUTDOWN
MUTE OUT
LOUT-
NC
9
HP/LINE
ROUT-
SE/BTL
GND/HS
10
11
12
MUTE IN
GND/HS
PIN DESCRIPTION
PIN NO
PIN NAME
I/O
DESCRIPTION
1, 12, 13, 24
GND/HS
LBYPASS
NC
Power ground; directly connected to thermal pad.
Tap to left channel internal mid-supply voltage divider bias
No connection
6
17, 23
19
4
RBYPASS
LLINE IN
LHP IN
Tap to right channel internal mid-supply voltage divider bias
Left channel line input; selected when HP/LINE is held low
I
I
I
I
I
5
Left channel headphone input; selected when HP/LINE is held high
Left channel power supply and for primary bias circuits
Places entire IC in shutdown mode when held high, IDD = 5µA
Follows MUTE IN, provides buffered output
7
LVDD
8
SHUTDOWN
MUTE OUT
9
Mute all amplifiers input; high active to mute amplify, low active to normal
operation
11
14
16
MUTE IN
SE/BTL
I
I
I
SE & BTL mode selection; active high for SE mode, active low for BTL
mode
HP/LINE
MUX control input, active high to select headphone input, active low to
select line input
18
20
21
RVDD
RHPIN
RLINEIN
I
I
I
Right channel power supply
Right channel headphone input, selected when HP/LINE is held high
Right channel line input, selected when HP/LINE is held low
Sources current proportional to the junction temperature. Left floating for
normal operation.
2
TJ
O
3
LOUT+
LOUT-
ROUT+
ROUT-
O
O
O
O
Left channel + output in BTL & SE mode
10
22
15
Left channel – output in BTL mode & high-impedance in SE mode
Right channel + output in BTL & SE mode
Right channel – output in BTL mode & high impedance in SE mode
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PA3202
CMOS IC
BLOCK DIAGRAM
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PA3202
CMOS IC
ABSOLUTE MAXIMUM RATINGS (unless otherwise specified)
PARAMETER
SYMBOL
VDD
RATINGS
6
UNIT
V
Supply Voltage
Input Voltage
VIN
-0.3~VDD ~+0.3
Internally limited
+150
V
Continuous Total Power Dissipation
Junction Temperature
PD
TJ
℃
℃
℃
Operating Temperature
Storage Temperature
TOPR
TSTG
-40 ~ +85
-65 ~ +150
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
VDD
MIN
3
NOM MAX UNIT
Supply Voltage
5
5.5
V
4-Ω stereo BTL
drive,
with proper PCB
design
VDD = 5 V,
250 mW/ch
average power,
-40
-40
85
Operating Temperature
TOPR
℃
3-Ω stereo BTL
drive,
with proper PCB
design
VDD = 5 V,
2 W/ch average
power,
85
VDD=5V
1.25
1.25
4.5
2.7
Common Mode Input Voltage
VICM
V
VDD=3.3V
DC ELECTRICAL CHARACTERISTICS (TA = 25℃)
PARAMETER SYMBOL TEST CONDITIONS
Stereo BTL
MIN TYP(1) MAX UNIT
19
9
30
18
18
10
20
10
10
6
Stereo SE
Mono BTL
Mono SE
Stereo BTL
Stereo SE
Mono BTL
Mono SE
VDD=5V
mA
9
3
Supply Current
IDD
13
5
VDD=3.3V
mA
mV
5
3
Output Offset Voltage
(Measured Differentially)
Supply Current in Mute Mode
IDD in Shutdown
VO(OFF)
VDD = 5 V, Gain = 2, See Note 1
5
25
IDD(MUTE) VDD=5V
IDD(SD) VDD=5V
Note 1. At 3 V < VDD < 5 V the dc output voltage is approximately VDD/2.
1
5
mA
µA
19
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PA3202
CMOS IC
AC OPERATING CHARACTERISTICS
VDD = 5 V, TA = 25℃, RL = 3Ω
PARAMETER
SYMBOL
POUT
TEST CONDITIONS
THD =0.2% BTL
THD =1% BTL
MIN
TYP MAX UNIT
Output Power (Each Channel) See
Note 2
2
W
2.2
Total Harmonic Distortion Plus
Noise
POUT = 2 W, f = 20 ~20 kHz
VIN = 1V, RL=10KΩ, AV=1V/V
AV = 10 V/V ,THD < 1 %,
RL = 4 Ω, Open Loop,
f = 1 kHz
200
100
>20
85°
80
m%
m%
KHz
TDH+N
BW
Maximum Output Power Bandwidth
Phase Margin
Supply Ripple Rejection Ratio
RR
dB
dB
dB
f = 20~20kHz,
60
Mute Attenuation
85
Channel-to-Channel Output
Separation
f = 1 kHz
85
Line/HP Input Separation
BTL Attenuation in SE Mode
Input Impedance
100
100
2
dB
dB
ZIN
eN
MΩ
Signal-to-Noise Ratio
Output Noise Voltage
POUT =500mW, BTL
95
dB
21
µV(RMS)
VDD = 3.3 V, TA = 25℃, RL = 3Ω
PARAMETER
SYMBOL
POUT
TEST CONDITIONS
THD =0.2% BTL
MIN
TYP MAX UNIT
Output Power ( Each Channel) See
Note 2
800
mW
900
THD =1%
BTL
Total Harmonic Distortion Plus
Noise
POUT = 800mW, f = 20 ~20 kHz
350
200
>20
85°
70
m%
m%
KHz
TDH+N
BW
VIN = 1V, RL=10KΩ, AV=1V/V
Maximum Output Power Bandwidth
Phase Margin
AV = 10 V/V, THD < 1 %,
RL = 4 Ω, Open Loop
f = 1 kHz
Supply Ripple Rejection Ratio
RR
dB
dB
dB
f = 20~20kHz,
55
Mute Attenuation
85
Channel-to-Channel Output
Separation
f = 1 kHz
85
Line/HP Input Separation
BTL Attenuation in SE Mode
Input Impedance
100
100
2
dB
dB
ZIN
eN
MΩ
Signal-to-Noise Ratio
Output Noise Voltage
POUT =500mW, BTL
95
dB
21
µV(RMS)
Note 2. Output power is measured at the output terminals of the IC at 1 kHz.
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PA3202
CMOS IC
TYPICAL APPLICATION CIRCUIT
RFR
50KΩ
CFR
5pF
R
IR
Ω
10K
RLINEIN
RHPIN
Right
MUX
ROUT+
ROUT-
C
1μF
IR
NC
RBYPASS
RVDD
CS
CB
1μF
COUTR
330μF
VDD
0.1
μF
( see Note )
100KΩ
1KΩ
System
Control
MUTE IN
Ω
100K
SE/BTL
Logic
Control
MUTE OUT
0.1μF
HP/LINE
SHUTDOWN
Bias,
Thermal
Shutdown
LVDD
VDD
Ω
1K
COUTL
μF
LBYPASS
330
LHPIN
NC
LOUT+
LOUT-
CIL
μF
1
Left
MUX
LLINEIN
R
IL
Ω
10K
R
FL
50KΩ
CFL
5pF
:
Note 0. 1 µ F ceramic capacitor should be placed as close as possible to the IC. For filtering lowe-r
frequency noise signals, a larger aluminum electrolytic capacitor of10 µF or greater should be
placed near the audio power amplifier .
PA3202 Minimum Configuration Application Circuit
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PA3202
CMOS IC
TYPICAL APPLICATION CIRCUIT
RFRHP
10KΩ
RFRLINE
50KΩ
CFRLINE
5pF
C
IRLINE RIR LINE
1µF
10KΩ
RLINEIN
RHPIN
ROUT+
ROUT-
Right
MUX
RIRHP
10KΩ
RBYPASS
CBR
CIRHP
1µF
RVDD
COUTR
330µF
VDD
0.1µF
CSR
0.1µF
(see Note 2)
100KΩ
1KΩ
System
Control
MUTE IN
SE/BTL
Logic
MUTE OUT
100KΩ
0.1µF
Control
HP/LINE
see Note 1
SHUTDOWN
Bias,
Thermal
Shutdown
LVDD
VDD
1KΩ
COUTL
CSR
0.1µF
(see Note 2)
LBYPASS
CBL
1µF
330µF
CILHP
1µF
RILHP
10KΩ
LHPIN
LOUT+
LOUT-
Left
MUX
LLINEIN
RILLINE
10KΩ
CILLINE
1µF
RFLLINE
50KΩ
CFLLINE
5pF
RFLHP
10KΩ
Note:1. This connection is for ultra-low current in shutdown mode.
2. A 0.1 µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower-
frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater should be
placed near the audio power amplifier.
PA3202 Full Configuration Application Circuit
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PA3202
CMOS IC
TYPICAL CHARACTERISTICS
Total Harmonic Distortion Plus Noise vs
Frequency
Total Harmonic Distortion Plus Noise vs
Output Power
10
10
VDD=5V
RL=32Ω
SE
VDD=5V
RL=32Ω
SE
1
1
f=20KHz
0.1
0.1
POUT=75mW
f=20Hz
0.01
POUT=20mW
f=1KHz
0.1
POUT=25mW
10K20K
.01
.01
0.001
20
100
1K
1
Frequency, f (Hz)
Output Power, POUT (W)
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PA3202
CMOS IC
TYPICAL CHARACTERISTICS(Cont.)
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PA3202
CMOS IC
TYPICAL CHARACTERISTICS(Cont.)
Power Dissipation vs Output Power
Power Dissipation vs Output Power
0.6
0.4
0.8
0.6
RL=4Ω
RL=8Ω
RL=4Ω
RL=8Ω
0.4
0.2
0
0.2
0
VDD=3.3V
SE
Each Channel
RL=32Ω
VDD=5V
SE
Each Channel
RL=32Ω
0.05
0
0.1 0.2 0.3
0.4 0.5 0.6
0
0.1
0.15
0.2 0.25
Output Power, POUT (W)
Output Power, POUT (W)
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PA3202
CMOS IC
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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