PA3212-N24-T [UTC]
Audio Amplifier, 2.6W, 2 Channel(s), 1 Func, CMOS, PDSO24, HTSSOP-24;
| 型号： | PA3212-N24-T |
| 厂家： | 
Unisonic Technologies |
| 描述： | Audio Amplifier, 2.6W, 2 Channel(s), 1 Func, CMOS, PDSO24, HTSSOP-24 放大器 光电二极管 商用集成电路 |
| 文件： | 总9页 (文件大小：474K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
PA3212
CMOS IC
2.6W STEREO AUDIO
AMPLIFIER WITH FOUR
SELECTABLE GAIN SETTINGS
AND MUX CONTROL
DESCRIPTION
As operating on a single 5V supply, the UTC PA3212 is
capable of delivering 2.6W of output power per channel into 3Ω
loads. In Bridge-Tied Load (BTL) mode the UTC PA3212 has less
than 1% THD+N, and it also has less than 0.65% THD+N across
its specified frequency range when driving 1 W into 8-ꢀ speakers.
Way of two terminals (GAIN0 and GAIN1) can configure and
control the amplifier gain. It also provides BTL gain settings of 2,
6, 12 and 24 V/V.
Lead-free:
Halogen-free: PA3212G
PA3212L
Other features included that the SHDN mode is provided to
disable UTC PA3212 for the low current consumption applications
and the current consumption can be reduced to typically 150µA.
FEATURES
* Output power at 0.65% THD+N, VDD=5V(TYP)
–2.6W/CH (typical) into a 3ꢀ load
–1.0W/CH (typical) into a 8ꢀ load
* Bridge-tied load (BTL) supported
* Gain control internally
* Differential Input fully
* Depop circuitry Inside
* Shutdown protection
* Stereo input
ORDERING INFORMATION
Ordering Number
Package
Packing
Normal
Lead Free
Halogen Free
Tape Reel
Tube
PA3212-N24-R
PA3212-N24-T
PA3212L-N24-R
PA3212L-N24-T
PA3212G-N24-R
PA3212G-N24-T
HTSSOP-24
HTSSOP-24
www.unisonic.com.tw
Copyright © 2009 Unisonic Technologies Co., Ltd
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QW-R502-310.A
PA3212
CMOS IC
PIN CONFIGURATION
PIN DESCRIPTION
PIN NO.
PIN NAME
GND
I/O
DESCRIPTION
1,12,13,24
Ground.
11
2
BYPASS
GAIN0
GAIN1
LLINEIN
LHPIN
Connected to voltage divider
For gain control: Bit 0
For gain control: Bit 1
I
I
I
I
I
3
5
Line input for Left channel, available when pin15 is held low.
6
Headphone input Left channel, available when pin15 is held high.
Power supply voltage.
7,18
PVDD
Differential input for right channel. And for single-ended inputs is also AC
ground.
8
RIN
LIN
I
I
I
I
Differential input for Left channel. And for single-ended inputs is also AC
ground.
10
14
17
PC-BEEP mode input. When at least eight continuous >1-VPP square
waves is input to this pin, PC-BEEP is enabled.
Input of MUX control. Being high to select the inputs of Pin6, 20, and low
to select inputs of PIN 5, 23.
PC-BEEP
HP/LINE
15
19
20
23
I
I
I
I
Low for BTL mode, high for SE mode.
SE/BTL
VDD
Analog VDD supply voltage
RHPIN
RLINEIN
Right channel headphone input, selected when pin17 is held high.
Headphone input right channel, available when pin17 is held low.
22
I
In shutdown mode when held low, expect PC-BEEP remains active.
SHUTDOWN
LOUT+
4
9
O
O
O
O
In BTL mode: left channel + output; In SE mode: left channel + output
In BTL mode: left channel - output; In SE mode: high impedance
In BTL mode: right channel + output; In SE mode: right channel + output
In BTL mode: right channel - output; In SE mode: high impedance
LOUT-
16
21
ROUT-
ROUT+
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PA3212
CMOS IC
BLOCK DIAGRAM
RHPIN
R
MUX
Volume
Control
RLINEIN
ROUT+
GAIN0
GAIN1
RIN
Volume
Control
ROUT–
Depop
Circuitry
PVDD
VDD
BYPASS
Power
Management
SHUTDOWN
LHPIN
Volume
Control
L
GND
LOUT+
LLINEIN
MUX
LIN
PC
Beep
Volume
Control
PC-BEEP
LOUT–
SE/BEL
MUX
Control
HP/LINE
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PA3212
CMOS IC
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
VDD
RATINGS
6
UNIT
V
Supply Voltage
Input Voltage
VIN
-0.3 ~ VDD ~ +0.3
+150
V
Junction Temperature
TJ
°С
°С
°С
Operating Temperature
Storage Temperature
TOPR
TSTG
-40 ~ +85
-65 ~ +85
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
ELECTRICAL CHARACTERISTICS (Ta= 25°С, unless otherwise specified.)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
DC ELECTRICAL CHARACTERISTICS
Supply Voltage
VDD
VIH
4.5
2
5
5.5
V
V
V
V
SHUTDOWN
High-Level Input voltage
Low-Level Input voltage
SE/BTL, HP/LINE, GAIN0, GAIN1
SHUTDOWN
0.8×VDD
0.8
VIL
GAIN0, GAIN1
V
0.4×VDD
0.6×VDD
25
V
SE/BTL , HP/LINE
DC Differential Output Voltage
Supply Current in Mute Mode
VOUT(DIFF) VIN=0V,Gain=2V/V
mV
mA
mA
µA
nA
nA
°С
BTL Mode
IDD
6
3
8
SE Mode
4
Supply Current, Shutdown Mode
High-Level Input Current
IDD(SD)
|IIH|
|IIL|
VDD=5V
150
300
900
900
85
VDD=5.5V, VIN=VDD
VDD=5.5V, VIN=0V
Low-Level Input Current
Operating Free-Air Temperature
Ta
-40
AC ELECTRICAL CHARACTERISTICS (VDD = 5.0V, RL = 8Ω, unless otherwise noted )
THD=1%, BTL, RL=3ꢀ, G=2V/V
2.05
2.6
0.65
15
W
Output Power
POUT
THD=10%, BTL, RL=3ꢀ, G=2V/V
OUT=1W, BTL, RL= 8ꢀ, G=2V/V
THD= 5%
Total Harmonic Distortion Plus Noise THD+N
P
%
kHz
Max Output Power Bandwidth
Power Supply Ripple Rejection
BOM
PSRR f=1kHz, BTL, G=2V/V, CBYP=0.47µF
72
dB
CBYP=0.47µF,BTL, G=2V/V
eN
20
µVRMS
µVRMS
dB
Output Noise Voltage
CBYP=0.47µF, SE, G=2V/V
18
Signal-to-Noise Ratio
SNR
105
Note: Output power is measured at the output terminals of the IC at 1kHz.
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QW-R502-310.A
PA3212
CMOS IC
TYPICAL APPLICATION CIRCUITS
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QW-R502-310.A
PA3212
CMOS IC
TYPICAL APPLICATION CIRCUITS(Cont.)
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PA3212
CMOS IC
APPLICATION INFORMATION
Shutdown Mode Operating
INPUT
AMPLIFIER
SHUTDOWN
HP/LINE
SE/BTL
INPUT
X
OUTPUT
MUTE
BTL
X
L
X
L
L
H
H
H
H
LINE
LINE
L
H
L
SE
H
H
HEADPHONE
HEADPHONE
BTL
H
SE
X: Don’t care
L: Low
H: High
CI (Input Capacitor)
The value of CI is important to consider as it directly affects the bass performance of the application circuit. When CI is
required to allow the amplifier to bias the input signal to the proper dc level for optimum operation, it’s value can be
calculate by this equation:
CI=1/(2πRIFC)
RI: Input Impedance
FC: High-pass Filter’s Frequency
The low leakage tantalum or ceramic capacitors are suggested to be used as the input coupling capacitors, because
of the small leakage current of the input capacitors will cause the dc offset voltage at the input to the amplifier that
reduces the operation headroom, especially at the high gain applications. It is important to let the positive side
connecting to the higher dc level of the application when using the polarized capacitors.
Gain setting (VS Gain0, Gain1 and RI)
Gain setting is determined by GAIN0 and GAIN1. The gains listed in the next table are realized by changing the taps
on the input resistors inside the amplifier which will cause the internal input impedance(R I) to be dependent on the
gain setting as we can see listed in the next table.
GAIN0
GAIN1
R I(kꢀ)
91
AV(V/V)
SE/BTL
0
0
1
1
X
0
1
0
1
X
2
6
0
0
0
0
1
45.5
26
12
24
1
14
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PA3212
CMOS IC
TYPICAL CHARACTERISTICS
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PA3212
CMOS IC
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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相关型号：
PA3212G-N24-R
Audio Amplifier, 2.6W, 2 Channel(s), 1 Func, CMOS, PDSO24, HALOGEN FREE, HTSSOP-24
UTC
PA3212G-N24-T
Audio Amplifier, 2.6W, 2 Channel(s), 1 Func, CMOS, PDSO24, HALOGEN FREE, HTSSOP-24
UTC
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