PA3428L-N24-T [UTC]
Audio Amplifier, 2W, 2 Channel(s), 1 Func, CMOS, PDSO24, LEAD FREE, TSSOP-24;
| 型号： | PA3428L-N24-T |
| 厂家： | 
Unisonic Technologies |
| 描述： | Audio Amplifier, 2W, 2 Channel(s), 1 Func, CMOS, PDSO24, LEAD FREE, TSSOP-24 放大器 光电二极管 商用集成电路 |
| 文件： | 总9页 (文件大小：419K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
PA3428
CMOS IC
2W STEREO AUDIO
AMPLIFIER
DESCRIPTION
As a stereo audio speaker which is operating on a single 5V
supply, the UTC PA3428 is capable of delivering 2W of output
power per channel into 4Ω loads with less than 1% THD+N.
Way of two terminals (GAIN0 and GAIN1) can configured and
control the amplifier gain. It also provide gain settings of 2, 6, 12,
and 24V/V.
Other features include internal gain control which requires few
external components, an active-low shutdown mode input and
thermal shutdown protection.
FEATURES
Lead-free:
Halogen-free: PA3428G
PA3428L
* Internal Depop circuitry
* Output power at 1% THD+N
Supply voltage:5V
Delivering 2.0W into a 4Ω load
Delivering 1.2W into a 8Ω load
* Tow mode:
Bridge-tied Load (BTL),
Single-ended (SE)
* Stereo input signal
* Fully differential input
* Gain control Internally
* Differential Input fully
ORDERING INFORMATION
Ordering Number
Package
Packing
Normal
Lead Free
Halogen Free
Tape Reel
Tube
PA3428-N24-R
PA3428-N24-T
PA3428L-N24-R
PA3428L-N24-T
PA3428G-N24-R
PA3428G-N24-T
TSSOP-24
TSSOP-24
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Copyright © 2008 Unisonic Technologies Co., Ltd
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QW-R502-242.A
PA3428
CMOS IC
PIN CONFIGURATION
GND/HS
GAIN0
GAIN1
LOUT+
1
2
3
GND/HS
RLINEIN
SHUTDOWN
24
23
22
4
21 ROUT+
LLINEIN
LHPIN
PVDD
RHPIN
20
VDD
19
5
6
7
8
18
17
16
PVDD
HP/LINE
ROUT-
RIN
LOUT-
9
LIN
15 SE/BTL
10
BYPASS 11
GND/HS
14 PC-BEEP
GND/HS
13
12
PIN DESCRIPTION
PIN NO
1,12,13,24
PIN NAME
GND/HS
BYPASS
GAIN0
I/O
DESCRIPTION
Ground, connected to thermal pad directly.
Connected to voltage divider
11
2
I
I
I
I
I
For gain control: Bit 0
3
GAIN1
For gain control: Bit 1
Line input for Left channel, available when pin17 is held low.
5
LLINEIN
LPHIN
6
Headphone input Left channel, available when pin17 is held high.
Supply voltage
7,18
PVDD
Differential input for Right channel. And for single-ended inputs is also AC
ground.
8
RIN
LIN
I
I
Differential input for Left channel. And for single-ended inputs is also AC
ground.
10
PC-BEEP mode input. When at least eight continuous > 1-VPP square
waves is input to this pin, PC-BEEP is enabled.
Low for BTL mode, high for SE mode.
14
15
17
PC-BEEP
SE/BTL
I
I
I
Input of MUX control. Being high to select the inputs of Pin6, 20, and low to
select inputs of PIN 5, 23.
HP/LINE
19
20
22
23
4
VDD
RHPIN
SHUTDOWN
RLINEIN
LOUT+
Analog VDD Supply voltage
I
Right channel headphone input, selected when HP/LINE pin is held high.
in shutdown mode when held low, expect PC-BEEP remains active.
Headphone input right channel, available when pin17 is held low.
Positive output for Left channel in BTL mode, positive output in SE mode.
Negative output for Left channel, and high impedance in SE mode.
Negative output for Right channel, and high impedance in SE mode.
Positive output for right channel in BTL mode, positive output in SE mode.
I
I
O
O
O
O
9
LOUT-
16
21
ROUT-
ROUT+
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PA3428
CMOS IC
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
VCC
RATINGS
6
UNIT
V
Supply Voltage
Power Dissipation TA≤25°С
PD
2.7
W
Operating Free-Air Temperature Range
Operating Junction Temperature Range
Storage Temperature Range
TA
-40~+85
150
°С
°С
°С
TJ
TSTG
-65~+150
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional device operation is not implied.
ELECTRICAL CHARACTERISTICS (TA=25°С)
PARAMETER SYMBOL TEST CONDITIONS
MIN TYP MAX UNIT
DC ELECTRICAL CHARACTERISTICS
Supply voltage
VDD
VIH
4.5
3.5
5
5.5
V
V
SHUTDOWN,SE/BTL,
High-Level Input voltage
HP/LINE, GAIN0, GAIN1
SHUTDOWN,SE/BTL,
HP/LINE,GAIN0, GAIN1
Low-Level Input voltage
VIL
1
V
DC Differential Output Voltage
Supply Current in Mute Mode
Supply Current, Shutdown Mode
VOUT(DIFF) VDD= 5V,Gain = 2V/V
5
7.5
4
50
13
7
mV
mA
µA
VDD= 5V, Stereo BTL
IDD
VDD= 5V, Stereo SE
IDD(SD)
VDD= 5V
160
300
AC ELECTRICAL CHARACTERISTICS VDD = 5.0V, RL = 4Ω, unless otherwise specified
THD =1%, BTL, RL=4Ω, G=2V/V
2
1.25
2.5
1.6
85
THD =1%, BTL, RL=8Ω, G=2V/V
W
Output Power
POUT
THD =10%, BTL, RL=4Ω, G=2V/V
THD =10%, BTL, RL=8Ω, G=2V/V
THD =0.1%, SE, RL=32Ω
mW
m%
POUT =1.6W, BTL, RL= 4Ω, G=2V/V
POUT =1W, BTL, RL= 8Ω, G=2V/V
POUT =75mW, SE, RL=32Ω
VI=1V, BTL, RL=10kΩ, SE
THD =5%
100
60
Total Harmonic Distortion Plus Noise THD+N
80
30
Max Output Power Bandwidth
Power Supply Ripple Rejection
Channel-to-Channel
BOM
15
kHz
V/V
PSRR F=1kHz, BTL, G=2V/V, CBYP=1µF
68
F=1kHz
80
V/V
Output Separation
Line/HP Input Separation
BTL Attenuation (SE mode)
Signal-to-Noise Ratio
80
85
90
45
V/V
V/V
SNR
eN
POUT =500mW, BTL, G=2V/V
BTL,G=2V/V, A Weighted filter
V/V
Output Noise Voltage
µV(rms)
Note: Output power is measured at the output terminals of the IC at 1kHz.
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PA3428
CMOS IC
APPLICATION INFORMATION
Shutdown Mode Operating
INPUT
AMPLIFIER
HP/LINE
SE/BTL
SHUTDOWN
INPUT
X
OUTPUT
X
L
X
L
L
H
H
H
H
MUTE
BTL
SE
LINE
LINE
L
H
L
H
HEADPHONE
HEADPHONE
BTL
SE
H
X: Ignore
L: Low
H
H: High
CI (Input Capacitor)
The value of CI is important to consider as it directly affects the bass performance of the application circuit. When CI is
required to allow the amplifier to bias the input signal to the proper dc level for optimum operation, it’s value can be
calculate by this equation:
CI=1/ (2πRIFC)
RI: Input Impedance
FC: High-pass Filter’s Frequency
The low leakage tantalum or ceramic capacitors are suggested to be used as the input coupling capacitors, because
of the small leakage current of the input ca-pacitors will cause the dc offset voltage at the input to the amplifier that
reduces the operation headroom, especially at the high gain applications. It is important to let the positive side
connecting to the higher dc level of the application when using the polarized capacitors.
Gain setting (Vs Gain0, Gain1 and RI, SE/BTL)
Gain setting is determined by GAIN0 and GAIN1. The gains listed in the next table are realized by changing the taps
on the input resistors inside the amplifier which will cause the internal input impedance(R I) to be dependent on the
gain setting as we can see listed in the next table.
AV(V/V)
GAIN0
GAIN1
SE/BTL
R I(kꢀ)
90
2
6
0
0
1
1
X
0
1
0
1
X
0
0
0
0
1
45
12
24
1
30
15
X: Ignore
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PA3428
CMOS IC
BLOCK
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PA3428
CMOS IC
TYPICAL APPLICATION CIRCUIT
FOR DIFFERENTIAL INPUTS
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PA3428
CMOS IC
TYPICAL APPLICATION CIRCUIT(Cont.)
FOR SINGLE-ENDED INPUTS
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PA3428
CMOS IC
TYPICAL CHARACTERISTICS
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PA3428
CMOS IC
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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