S3525G-D14-T [UTC]
PC POWER SUPPLY SUPERVISORS; PC电源监控
| 型号： | S3525G-D14-T |
| 厂家： | 
Unisonic Technologies |
| 描述： | PC POWER SUPPLY SUPERVISORS |
| 文件： | 总9页 (文件大小：298K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
S3525
CMOS IC
PC POWER SUPPLY
SUPERVISOR
DESCRIPTION
The UTC S3525 is specially designed for switching power supply
system. it provides protection circuits, power good output (PGO)
indicator, fault protection output (FPOB) and a PSONB control.
The protection circuits include over voltage protection (OVP),
under voltage protection (UVP) and over current protection (OCP)
monitoring for system voltages and currents.
When 3.3V, 5V or 12V voltage is decreasing to 2.68V, 4.3V and
9.9V respectively, the under voltage protection (UVP) function will be
enabled. FPOB will be set to high to turn off the PWM controller IC.
Toggling the PSONB from low to high will reset the fault protection
latch.
The voltage difference across external current shunt is used for
OCP functions. An external resistor can be used to adjust protection
threshold.
The power supply is turned on after 38mS delay time when
PSONB signal is set from high to low. To turn off power supply,
PSONB signal is set from low to high with the delay time 38mS. The
PGI circuitry provides a power-down warning signal for PGO. When
PGI input is lower than the internal 1.20V reference voltage, PGO
signal is pulled low.
FEATURES
* OVP/UVP monitors 3.3V, 5V, 12V input voltage level.
* OCP monitors IS33, IS5, IS12 input current sense.
* Fault protection output (FPOB) with Open Drain Output stage.
* Power good output (PGO) with Open Drain Output stage.
* 38ms de-bounce time for PSONB input signal.
* 300ms time delay from PGI to PGO.
* 2.4ms time delay for PSONB to turn off FPOB.
ORDERING INFORMATION
Ordering Number
Package
Packing
Lead Free Plating
S3525L-D14-T
S3525L-S14-R
S3525L-S14-T
Halogen Free
S3525G-D14-T
S3525G-S14-R
S3525G-S14-T
DIP-14
SOP-14
SOP-14
Tube
Tape Reel
Tube
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Copyright © 2010 Unisonic Technologies Co., Ltd
QW-R502-105.B
S3525
CMOS IC
PIN ASSIGNMENT
FUNCTION DESCRIPTION
PGI
PSONB
UV&OC Protection OV Protection
FPOB
PGO
PGI<1.2V
PGI<1.2V
PGI<1.2V
PGI<1.2V
PGI>1.2V
PGI>1.2V
PGI>1.2V
PGI>1.2V
X
L
L
L
L
L
L
L
L
H
No
No
No
Yes
No
L
H
L
L
L
L
L
H
L
L
L
L
Yes
Yes
No
Yes
No
H
L
No
Yes
No
H
H
H
H
Yes
Yes
X
Yes
X
Note: FPOB=L means: fault is not latched. FPOB=H means: fault is latched
PGO=L means: fault. PGO=H means: No fault
X=do not care
PIN DESCRIPTIONS
PIN NO. PIN NAME
TYPE
Input
DESCRIPTION
Power Good Input. For ATX SMPS, it detects AC line voltage through the
main transformer.
1
2
3
PGI
GND
FPOB
Supply
Output
Ground
Fault Protection Output. Output signal to control the primary PWM IC through
an opto-coupler. When FPOB is low, the PWM IC is enabled.
Remote On/Off logic input from CPU or main-board. The power supply will
be turned on/off after 38mS delay.
4
5
6
PSONB
IS12AB
RI
Input
Input
Input
12V AB over current protection.
Reference setting. One external resistor Ri connected between RI and GND
pin will determine a reference current, IREF = 1.20/Ri, for OCP programming.
12V over/under voltage protection.
7
8
V12B
IS5
Input
Input
Input
Input
Input
Input
Supply
5V over current protection.
9
IS33
V12A
V33
V5
3.3V over current protection
10
11
12
13
12V over/under voltage protection.
3.3V over/under voltage protection
5V over/under voltage protection.
VDD
Power supply.
Power good logic output, 0 or 1(open-drain). Power good=1 means that the
power supply is good for operation. The power good delay is 300mS.
14
PGO
Output
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S3525
CMOS IC
BLOCK DIAGRAM
Vcc
PGO
+
PGI
225ms
delay
73μs
debounce
UN
clr
-
Bandgap
Reference
V
REF=1.2V
V12A
+
I
S33
-
IREF*8
73μs
debounce
FPOB
R Q
S Q
VS33
+
OV
-
+
UN
-
Internal
Power
V12A
Power On Reset
PWR
IS12AB
+
VCCI=3.6
V
-
IREF*8
2.4ms
delay
38 ms
debounce
PSONB
+
VS12A
OV
-
+
UN
-
75ms/ 300ms
delay
V12A
+
-
+
OV
PWR
OSC
VS12B
-
+
UN
CLK
-
V12A
IS5
+
-
V12A
IREF*8
+
VS5
OV
+
-
VREF=1.2V
-
RI
+
UN
-
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S3525
CMOS IC
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATINGS
-0.3 ~ 16
UNIT
V
Supply Voltage, VDD, V12A
Input Voltage
V5,V33, PSONB, IS5, IS33
-0.3 ~ 7
V
VIN
IS12AB, V12B
PGI
-0.3 ~ 16
V
-0.3 ~ VDD+0.3
-0.3 ~ 7
V
FPOB
PGO
V
Output Voltage
VOUT
-0.3 ~ 7
V
Operating Temperature
Storage Temperature
TOPR
TSTG
-40 ~ +125
-55 ~ +150
°C
°C
Note Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
VDD
MIN
4
TYP
12
MAX
15
15
7
UNIT
V
Supply Voltage VDD
Supply Voltage VCC2
9.5
12
V
V5,V33 ,PGI ,PSONB
V12A, V12B
FPOB
V
Input Voltage
VIN
15
7
V
V
Output Voltage
Output Sink Current
VOUT
PGO
7
V
FPOB
30
10
65
mA
mA
uA
ms
IO(SINK)
PGO
RI Output Current
IO(RI)
tR
10
1
Supply Voltage Rising Time (VDD
)
ELECTRICAL CHARACTERISTICS (Ta=25°C and VDD=5V and V12A=12V)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
Over Voltage Detection
V12A, V12B
V5
13.2 13.8 14.4
V
V
V
Over Voltage Threshold
5.7
3.7
6.1
3.9
6.5
4.1
0.3
0.7
5
V33
ISINK=10mA
SINK=30mA
Low Level Output Voltage (FPOB)
VOL
V
I
Output Leakage Current (FPOB)
PSONB
ILEAK
V(FPOB)=5V
uA
High-Level Input Voltage
Low-Level Input Voltage
Input Pull-up Current
PGI and PGO
VIH
VIL
IIN
2
V
V
0.8
PSONB=0V
120
10
uA
V12A, V12B
V5
9.5
4.1
10.5
V
V
Under Voltage Threshold
4.30 4.47
V33
2.55 2.69 2.83
V
Input Threshold Voltage (PGI)
Low Level Output Voltage (PGO)
Output Leakage Current (PGO)
VI(THD)
VOL
1.16 1.20 1.24
V
ISINK=10mA
PGO=5V
0.4
5
V
ILEAK
uA
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S3525
CMOS IC
ELECTRICAL CHARACTERISTICS (Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
SWITCHING CHARACTERISTICS
PSONB ON(PSONB Low to FPOB Low)
PSONB OFF(PSONB Hi to PGO Low)
PGI to PGO Delay Time
T(PSONB ON) VDD=5V
T(PSONB OFF) VDD=5V
32
32
38
38
62
62
ms
ms
ms
ms
ms
ms
μs
TPG
VDD=5V
200
2.0
65
300
2.4
75
490
4
Timing PGO Low to FPOB high
TPSOFF VDD=5V
TUVP1
TUVP2
tg1
FPOB=Low & PGI > 1.2V
FPOB=Low & PGI < 1.2V
122
488
120
120
UVD/OCD Turn on Delay Time
260
63
300
75
Noise Deglitch Time
Noise Deglitch Time for Latch
TOTAL DEVICE
tg2
63
75
μs
Low Voltage
VDD
IDD
3.0
V
Supply Current
PSONB=5V
1
mA
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S3525
CMOS IC
APPLICATION INFORMATION
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CMOS IC
APPLICATION INFORMATION
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S3525
CMOS IC
TYPICAL TIMMING DIAGRAM
1) PGI (UNDER-VOLTAGE):
2) V33, V5, V12A, V12B (UNDER-VOLTAGE) or IS33, IS5, IS12AB (OVER-CURRENT):
tUVP2 = 300ms
PSONB
tUVP2
t
tPSOFF
+
g2
FPOB
t(PSONB ON)
t(PSONB ON)
tPG
t
g1
+
PGO
PGI
t(PSONB OFF)
V33/V /V12
5
IS33/IS5 /IS12
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S3525
CMOS IC
TYPICAL TIMMING DIAGRAM(Cont.)
3) V33, V5, V12A, V12B (OVER-VOLTAGE).
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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