TEA1062AN [UTC]

LOW VOLTAGE TELEPHONE TRANSMISSION CIRCUIT WITH DIALLER INTERFACE; 与拨号器接口低电压电话传输电路
TEA1062AN
型号: TEA1062AN
厂家: Unisonic Technologies    Unisonic Technologies
描述:

LOW VOLTAGE TELEPHONE TRANSMISSION CIRCUIT WITH DIALLER INTERFACE
与拨号器接口低电压电话传输电路

电信集成电路 光电二极管 电话
文件: 总13页 (文件大小:180K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
LOW VOLTAGE TELEPHONE  
TRANSMISSION CIRCUIT WITH  
DIALLER INTERFACE  
DESCRIPTION  
The UTC TEA1062N / TEA1062AN is a bipolar  
integrated circuit performing all speech and line  
interface function, required in the fully electronic  
SOP-16  
DIP-16  
telephone  
sets. It performs electronic switching  
between dialing speech. The circuit is able to  
operate down to D.C. line voltage of 1.6V (with  
reduced performance) to facilitate the use of more  
telephone sets in parallel.  
FEATURES  
* Low d.c. line voltage; operates down to 1.6V  
(excluding polarity guard).  
*Voltage regulator with adjustment static resistance.  
*Provides supply with limited current for external  
circuitry.  
*Mute input for pulse or DTMF dialing.  
*Receivering amplifier for several types of earphones.  
*Large amplification setting range on microphone  
and earpiece amplifiers.  
*Line loss compensation facility , line current  
depedant (microphone and earpiece amplifiers).  
*Gain control adaptable to exchange supply.  
*Possibility to adjust the d.c. line voltage.  
*Symmetrical high-impedance inputs (64k) for  
dynamic, magnetic or piezoelectric microphones.  
*Asymmetrical high-impedance inputs (32k) for  
electret microphones.  
*DTMF signal input with confidence tone.  
QUICK REFERENCE DATA  
Line voltage at Iline=15mA  
Line current operating range[pin1]  
normal operation  
VLN  
typ. 3.8 V  
Iline  
Iline  
ICC  
11 to 140 mA  
1 to 11 mA  
typ. 1mA  
with reduced performance  
Internal supply current  
Supply current for peripherials  
at Iline=15 mA MUTE input LOW(1062 is HIGH)  
VCC>2.2V  
Ip  
Ip  
typ. 1.8mA  
typ. 0.7mA  
VCC>2.8V  
Voltage amplification range  
microphone amplifier  
AVD  
AVD  
44 to 52 dB  
20 to 39 dB  
receiving amplififer  
Line loss compansation  
Amplification control range  
Exchange supply voltage range  
Exchange feeding bridge resistance range  
Operating ambient temperature range  
AVD  
typ. 6 dB  
36 to 60V  
Vexch  
Rexch  
Tamb  
400 to 1000Ω  
-25 to +75°C  
1
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
V
13  
CC  
LN  
1
5
4
GAR  
QR  
IR 10  
2
3
GAS1  
GAS2  
MIC+  
7
6
MIC-  
11  
12  
dB  
DTMF  
MUTE  
SUPPLY AND  
REFERENCE  
LOW  
VOLTAGE  
CIRCUIT  
CONTROL  
CURRENT  
CURRENT  
REFERENCE  
9
14  
REG  
15  
AGC  
8
16  
SLPE  
VEE  
STAB  
Fig.1 Block Diagram  
1
2
3
4
5
6
7
8
9
LN  
positive line terminal  
LN  
1
2
3
4
5
6
7
8
16 SLPE  
GAS1 gain adjustment; transmitting amplifier  
GAS2 gain adjustment; transmitting amplifier  
AGC  
15  
QR  
non-inverting output,receiving amplifier  
GAS1  
GAS2  
GAR gain adjustment; receiving amplifier  
MIC- inverting microphone input  
MIC+ on-inverting microphone input  
STAB current stabilizer  
14  
13  
12  
11  
10  
9
REG  
QR  
VCC  
VEE  
negative line terminal  
receiving amplifier input  
GAR  
MIC-  
MIC+  
STAB  
MUTE  
DTMF  
IR  
10 IR  
11 DTMF dual-tone multi-frequency input  
12 MUTE mute input  
13 Vcc  
14 REG voltage regulator decoupling  
15 AGC automatic gain control input  
16 SLPE slope (DC resistance) adjustment  
positive supply decoupling  
VEE  
Fig.2 PIN CONFIGURATIONS  
2
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
ABSOLUTE MAXIMUM RATINGS  
PARAMETER  
Positive Continuous Line Voltage  
Repetitive Line Voltage During  
TEST CONDITIONS SYMBOL MIN  
MAX  
12  
UNIT  
V
VLN  
Switch-On Or Line Interruption  
VLN  
13.2  
V
Repetitive Peak Line Voltage for a 1 ms Pulse/5s  
R10=13Ω  
R9=20Ω  
(see Fig.15)  
R9=20Ω  
VLN  
Iline  
Vi  
28  
140  
VCC+0.7  
0.7  
640  
+125  
+75  
+125  
V
mA  
V
Line Current (1)  
Voltage on All Other Pins  
-Vi  
V
Total Power Dissipation (2)  
Storage Temperature Range  
Operating Ambient Temperature Range  
Junction Temperature  
R9=20Ω  
Ptot  
Tstg  
Tamb  
Tj  
mW  
°C  
°C  
°C  
-40  
-25  
1. Mostly dependent on the maximum required Tamb and the voltage between LN and SLPE (see Figs 6 ).  
2. Calculated for the maximum ambient temperature specified Tamb=75°C and a maximum junction temperature of  
125°C.  
THERMAL RESISTANCE  
From junction to ambient in free air Rth j-a = 75K/W  
ELECTRICAL CHARACTERISTICS (Iline=11 to 140mA;VEE=0V;f=800Hz;Tamb=25°C; unless otherwise  
specified)  
PARAMETER  
Supply; LN and VCC(pins 1 and 13)  
Voltage Drop Over Circuit,  
between LN and VEE  
TEST CONDITIONS  
SYMBOL MIN  
TYP MAX UNIT  
MIC inputs open  
Iline=1mA  
Iline=4mA  
Iline=15mA  
Iline=100mA  
Iline=140mA  
Iline=15mA  
VLN  
VLN  
1.6  
1.9  
4.0  
5.7  
V
V
VLN  
VLN  
3.55  
4.9  
4.25  
6.5  
7.5  
V
V
V
VLN  
Variation with Temperature  
Voltage Drop Over Circuit,  
between LN and VEE with  
External Resistor RVA  
VLN/T  
-0.3  
mV/K  
Iline=15mA  
RVA(LN to REG)  
=68kΩ  
3.5  
V
Iline=15mA  
RVA(REG to SLPE)  
=39kΩ  
4.5  
0.9  
V
Supply Current  
VCC=2.8V  
ICC  
1.35  
mA  
Supply Voltage Available for  
Peripheral Circuitry  
TEA1062N  
Iline=15mA  
Ip=1.2mA; MUTE=HIGH  
lp=0mA;MUTE=HIGH  
Ip=1.2mA; MUTE=LOW  
lp=0mA;MUTE=LOW  
VCC  
VCC  
VCC  
VCC  
2.2  
2.2  
2.7  
3.4  
2.7  
3.4  
V
V
V
V
TEA1062AN  
3
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
ELECTRICAL CHARACTERISTICS (continued)  
PARAMETER  
TEST CONDITIONS  
SYMBOL MIN  
TYP MAX UNIT  
Microphone inputs MIC+ and MIC- (pins 6 and 7)  
Input impedance (differential)  
between MIC- and MIC+  
Zi|  
64  
kΩ  
Input impedance (sigle-ended)  
Zi|  
kCMR  
MIC- or MIC+ to VEE  
32  
82  
kΩ  
dB  
Common Mode Rejection Ratio  
Voltage Gain  
MIC+ or MIC- to LN  
Iline=15mA  
R7=68kΩ  
Gv  
50.5  
52.0  
53.5  
dB  
dB  
Gain Variation with Frequency  
at f=300Hz and f=3400Hz  
Gain Variation with Temperature  
at -25°C and +75°C  
w.r.t.800Hz  
Gvf  
+-0.2  
w.r.t.25°C  
without R6;  
Iline=50mA  
GvT  
Zi|  
Gv  
+-0.2  
20.7  
25.5  
+-0.2  
dB  
kΩ  
dB  
dB  
Dual-tone multi-frequency input DTMF (pin 11)  
Input impedance  
Voltage Gain from DTMF to LN  
Iline=15mA  
R7=68kΩ  
24  
27  
Gain Variation with Frequency  
at f=300Hz and f=3400Hz  
Gain Variation with Temperature  
at -25°C and +75°C  
w.r.t.800Hz  
Gvf  
w.r.t.25°C  
Iline=50mA  
GvT  
Gv  
+-0.2  
dB  
dB  
Gain Adjustment GAS1 and GAS2 (pins 2 and 3)  
Gain Variation of the Transmitting  
Amplifier by Varying R7 between  
GAS1 and GAS2  
-8  
0
Sending Amplifier Output LN (pin 1)  
Output Voltage  
Iline=15mA  
THD=10%  
VLN(rms)  
VLN(rms)  
1.7  
2.3  
0.8  
V
V
Iline=4mA  
THD=10%  
Noise output voltage  
Iline=15mA;  
R7=68k;  
200between  
MIC- and MIC+;  
psophometrically  
weighted  
VNO(rms)  
Zi|  
-69  
21  
4
dBmp  
kΩ  
Receiving Amplifier Input IR (pin 10)  
Input impedance  
Receiving Amplifier Output QR (pin 4)  
Output Impedance  
Voltage gain from IR to QR  
Zo|  
Iline=15mA;  
RL(from pin 9 to  
pin 4 )=300Ω  
Gv  
29.5  
31  
32.5  
dB  
4
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
ELECTRICAL CHARACTERISTICS (continued)  
PARAMETER  
Gain Variation with Frequency  
at f=300Hz and f=3400Hz  
Gain Variation with Temperature  
at-25°C and +75°C  
TEST CONDITIONS  
SYMBOL MIN  
TYP MAX UNIT  
±0.2  
w.r.t.800Hz  
Gvf  
dB  
w.r.t.25°C  
without R6  
Iline=50mA  
sinwave drive;  
Ip=0mA;THD=2%  
R4=100kΩ  
Iline=15mA  
RL=150Ω  
GvT  
+-0.2  
dB  
Output Voltage  
VO(rms)  
VO(rms)  
0.22  
0.3  
0.33  
0.48  
V
V
RL=450Ω  
Output Voltage  
THD=10%  
R4=100kΩ  
RL=150Ω  
Iline=4mA  
VO(rms)  
15  
50  
mV  
Noise Output Voltage  
Iline=15mA  
R4=100kΩ  
IR open-circuit  
psophometrically  
weighted  
μV  
RL=300Ω  
VNO(rms)  
Gain adjustment GAR (pin 5)  
Gain Variation of Receiving  
Amplifier Achievable by  
Varying  
R4 between GAR and QR  
Mute Input (pin 12)  
Input Voltage(HIGH)  
Input Voltage(LOW)  
Input Current  
Gv  
-11  
1.5  
0
dB  
VIH  
VIL  
IMUTE  
VCC  
0.3  
15  
V
V
μA  
8
Reduction of Gain  
MIC+ or MIC- to QR  
Voltage Gain from DTMF to QR  
MUTE=LOW  
MUTE=LOW  
R4=100kΩ  
RL=300Ω  
Gv  
70  
dB  
dB  
Gv  
-19  
Automatic Gain Control Input AGC ( pin 15)  
Controlling the Gain from lR to QR  
and the Gain from MIC+/MIC-  
to LN;R6 between AGC and VEE R6=110kΩ  
Gain Control Range  
Highest Line Current  
for Maximum Gain  
Iline=70mA  
Gv  
Iline  
Iline  
-5.8  
23  
dB  
mA  
mA  
Minimum Line Current  
for Minimum Gain  
61  
5
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
FUNCTIONAL DESCRIPTION  
(with built-in FET source followers) can be used.  
Supply: VCC, LN, SLPE, REG and STAB  
Power for the UTC TEA1062N/TEA1062AN and its  
peripheral circuits is usually obtained from the  
telephone line. The IC supply voltage is derived from  
the line via a dropping resistor and regulated by the  
UTC TEA1062N/TEA1062AN,The supply voltage Vcc  
may also be used to supply external circuits e.g.  
dialling and control circuits. Decoupling of the supply  
voltage is performed by a capacitor between Vcc and  
VEE while the internal voltage regulator is decoupled  
by a capacitor between REG and VEE. The DC current  
drawn by the device will vary in accordance with  
varying values of the exchange voltage(Vexch), the  
feeding bridge resistance(Rexch) and the DC resistance  
Microphone arrangements are illustrated in Fig.10. The  
gain of the microphone amplifier can be adjusted  
between 44dB and 52dB to suit the sensitivity of the  
transducer in use. The gain is proportional to the value  
of R7 which is connected between GAS1 and GAS2.  
Stability is ensured by the external capacitors, C6  
connected between GAS1 and SLPE and C8  
connected between GAS1 and VEE. The value of C6  
is 100pF but this may be increased to obtain a  
first-order low-pass filter. The value of C8 is 10 times  
the value of C6. The cut-off frequency corresponds to  
the time constant R7*C6.  
Mute input (MUTE)  
of  
the  
telephone  
line(Rline).  
The  
UTC  
TEA1062N/TEA1062AN has an internal current  
stabilizer operating at a level determined by a 3.6kΩ  
resistor connected between STAB and VEE( see  
Fig.8). When the line current(Iline) is more than 0.5 mA  
greater than the sum of the IC supply current ( Icc) and  
the current drawn by the peripheral circuitry connected  
to VCC(lp) the excess current is shunted to VEE via LN.  
The regulated voltage on the line terminal(VLN) can be  
calculated as:  
A LOW(UTC TEA1062N is HIGH) level at MUTE  
enables DTMF input and inhibites the microphone  
inputs and the receiving amplifier inputs; a HIGH(UTC  
TEA1062N is LOW) level or an open circuit does the  
reverse. Switching the mute input will cause negligible  
clickis at the telephone outputs and on the line. In case  
the line current drops below 6mA(parallal opration of  
more sets) the circuit is always in speech condition  
independant of the DC level applied to the MUTE input.  
VLN=Vref+ISLPE*R9 or;  
VLN=Vref+[(Iline – ICC - 0.5*10 3A)Ip]*R9  
-
Dual-tone multi-frequency input (DTMF)  
When the DTMF input is enabled dialling tones may  
be sent onto the line. The voltage gain from DTMF to  
LN is typically 25.5dB(when R7=68k) and varies with  
R7 in the same way as the microphone gain. The  
signalling tones can be heard in the earpiece at a low  
level(confidence tone).  
where:Vref is an internally generated temperature  
compensated reference voltage of 3.7V and R9 is an  
external resistor connected between SLPE and VEE. In  
normal use the value of R9 would be 20. Changing  
the value of R9 will also affect microphone gain, DTMF  
gain,gain control characteristics, side tone level,  
maxmimum output swing on LN and the DC  
characteristics (especially at the lower voltages). Under  
normal conditions, when ISLPE>=ICC+0.5mA +Ip, the  
static behaviour of the circuit is that of a 3.7V regulator  
diode with an internal resistance equal to that of  
R9.In the audio frequency range the dynamic  
impedance is largely determined by R1.Fig.3 shows  
the equivalent impedance of the circuit.  
Receiving amplifier (IR,QR and GAR)  
The receiving amplifier has one input (IR) and a  
non-inverting output (QR). Earpiece arrangements are  
illustrated in Fig.11. The IR to QR gain is typically 31dB  
(when R4=100k). It can be adjusted between 20 and  
31dB to match the sensitivity of the transducer in use.  
The gain is set with the value of R4 which is connected  
between GAR and QR.The overall receive gain,  
between LN and QR, is calculated by substracting the  
anti-sidetone network attenuation (32dB) from the  
amplifier gain. Two external capacitors, C4 and C7,  
ensure stability. C4 is normally 100pF and C7 is 10  
times the value of C4. The value of C4 may be  
increased to obtain a first-order low-pass filter.The  
Microphone inputs(MIC+ and MIC-) and  
gain pins (GAS1 and GAS2)  
The UTC TEA1062N/TEA1062AN has symmetrical  
inputs. Its input impedance is 64k(2*32k) and its  
voltage gain is typically 52 dB (when R7=68k.see  
Fig.13). Dynamic, magnetic, piezoelectric or electret  
6
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
cut-off frequency will depend on the time constant  
R4*C4. The output voltage of the receiving amplifier is  
specified for continuous-wave drive. The maximum  
output voltage will be higher under speech conditions  
where the peak to RMS ratio is higher.  
Example  
The balance impedance Zbal at which the optimum  
suppression is present can be calculated by: Suppose  
Zline = 210+(1265//140nF) representing a 5km line  
of 0.5 mm diameter, copper, twisted pair cable  
matched to 600(176/km;38nF/km). When k=0.64  
then R8=390,Zbal=130+(820//220nF). At line  
currents below 9mA the internal reference voltage is  
automatically adjusted to a lower value(typically 1.6V  
at 1mA) This means that more sets can be operated in  
parallel with DC line voltages (excluding the polarity  
guard) down to an absolute minimum voltage of 1.6V.  
With line currents below 9mA the circuit has limited  
sending and receiving levels. The internal reference  
voltage can be adjusted by means of an external  
resistor(RVA). This resistor when connected between  
LN and REG will decrease the internal reference  
voltage and when connected between REG and SLPE  
will increase the internal reference voltage. Current(Ip)  
available from VCC for peripheral circuits depends on  
the external components used. Fig.9 shows this  
current for VCC > 2.2V. If MUTE is LOW (1062 is HIGH)  
when the receiving amplifier is driven the available  
current is further reduced. Current availability can be  
Automatic gain control input (AGC)  
Automatic line loss compensation is achieved by  
connecting a resistor(R6) between AGC and VEE. The  
automatic gain control varies the gain of the  
microphone amplifier and the receiving amplifier in  
accordance with the DC line current. The control range  
is 5.8dB which corresponds to a line length of 5km for  
a 0.5mm diameter twisted pair copper cable with a DC  
resistance of 176/km and average attenuation of  
1.2dB/km. Resistor R6 should be chosen inaccordance  
with the exchange supply voltage and its feeding  
bridge resistance(see Fig.12 and Table 1). The ratio of  
start and stop currents of the AGC curve is  
independent of the value of R6. If no automatic line  
loss compensation is required the AGC may be left  
open-circuit. The amplifier, in this condition, will give  
their maximum specified gain.  
increased  
by connecting the supply IC(1081) in  
Side-tone suppression  
parallel with R1, as shown in Fig.16(c), or, by  
increasing the DC line voltage by means of an  
external resistor(RVA) connected between REG and  
SLPE.  
The anti-sidetone network, R1//Zline, R2, R3, R8, R9  
and Zbal,(see Fig.4) suppresses the transmitted signal  
in the earpiece. Compensation is maximum when the  
following conditions are fulfilled:  
(a) R9*R2=R1[R3+(R8//Zbal)];  
(b) [Zbal/(Zbal+R8)]=[Zline/(Zline+R1)];  
If fixed values are chosen for R1, R2, R3 and R9 then  
condition(a) will always be fullfilled when R8/ZballR3.  
To obtain optimum side-tone suppression condition(b)  
has to be fulfilled which results in:  
Zbal=(R8/R1) Zline=k*Zline where k is a scale factor;  
K=(R8/R1).  
The scale factor (k), dependent on the value of R8,  
is chosen to meet following criteria:  
(a) Compatibility with a standard capacitor from the  
E6 or E12 range for Zbal,  
(b)Zbal//R8|《R3 fulfilling condition (a) and thus  
ensuring correct anti-sidetone bridge operation,  
(c) Zbal+R8|》R9 to avoid influencing the trans-  
mitter gain.  
In practice Zline varies considerably with the type and  
length. The value chosen for Zbal should therefore be  
for an average line length thus giving optimum setting  
for short or long lines.  
7
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
LN  
Leq  
Rp  
R1  
REG  
V
CC  
Vref  
R9  
C3  
C1  
4.7  
µ
F
100  
µF  
Rp=16.2k  
20  
Leq=C3*R9*Rp  
VEE  
Fig.3 Equivalent impedance circuit  
The anti-sidetone network for the UTCTEA1062N/TEA1062AN family shown in Fig.4 attenuates the signl received  
from the line by 32 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole  
audio frequency range. Fig.5 shows a convertional Wheatstone bridge anti-sidetone circuit that can be used as an  
alternative. Both bridge types can be used with either resistive or complex set impedances.  
R1  
R2  
R3  
R1  
R2  
Zline  
Zline  
IR  
IR  
i
m
im  
V
EE  
V
EE  
Rt  
Rt  
R8  
R8  
R9  
R9  
RA  
Zbal  
SLPE  
SLPE  
Fig 5 Equivalent circuit of an anti-sidetone  
network in a wheatstone bridge  
configuration  
Fig 4 Equivalent circuit of UTC TEA1062N/TEA1062AN  
anti-sidetone bridge  
8
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
I
line 150  
(mA)  
130  
110  
90  
(1)  
(2)  
(3)  
(4)  
70  
Tamb  
Ptot  
(1) 45°C 1068mW  
(2) 55°C 934mW  
(3) 65°C 800mW  
(4) 75°C 666mW  
50  
30  
2
4
6
8
10  
12  
VLN-VSLPE(V)  
Fig.6 UTC TEA1062N/TEA1062AN safe operating area  
Rline  
R1  
Iline  
0.5mA  
LN  
I
SLPE+  
VCC  
Rexch  
Vexch  
DC  
AC  
C1  
0.5mA  
PERIPHERAL  
CIRCUITS  
SLPE  
REG  
STAB  
VEE  
C3  
I
SLPE  
R5  
R9  
Fig.8 Supply arrangement  
9
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
2.4  
a
I
p
(mA)  
b
1.6  
0.8  
0
(a) Ip=2.1mA  
(b) Ip=1.7mA  
Iline=15mA at VLN=4V  
R1=620  
and R9=20Ω  
0
1
2
3
4
5
V
cc(V)  
Fig.9 Typical current Ip available from Vcc peripheral circuitry with Vcc>=2.2V.  
curve (a) is valid when the receiving amplifier is not driven or when MUTE =LOW(UTC TEA1062N is  
HIGH) .curve(b) is valid when MUTE=HIGH(UTC TEA1062N is LOW) and the receiving amplifier is driven;  
Vo(rms)=150mV,RL=150.The supply possibilities can be increased simply by setting the voltage drop over  
the circuit VLN to a high value by means of resistor RVA connected between REG and SLPE.  
7
7
MIC+  
MIC+  
13  
V
CC  
(1)  
7
6
MIC+  
MIC-  
V
EE  
MIC-  
MIC-  
6
6
9
(a)  
(b)  
(c)  
Fig. 10 Alternative microphone arrangement  
(a) Magnetic or dynamic microphone. The resistor marked(1) may be connected to decrease the terminating  
impedance.  
(b) Electret microphone.  
(c) Piezoelectric microphone.  
10  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
(1)  
(2)  
4
4
4
9
QR  
QR  
QR  
9
9
VEE  
VEE  
VEE  
(a)  
(b)  
Fig.11 Alternative receiver arrangement  
(c)  
(a) Dynamic earpiece.  
(b) Magnetic earpiece.The resistor marked(1) may be connected to prvent distortion(inductive load)  
(c) Piezoelectric earpiece.The earpiece marked(2) is requirred to increase the phase margin (capacitive load)  
Fig.12 Variation of gain with line urrent,with R6 as a parameter.  
R6=  
Gv  
(dB)  
0
-2  
-4  
R9=20  
(1) R6= 78.7k  
(1) (2) (3)  
(2) R6= 110k  
(3) R6= 140k  
-6  
0
20  
40  
60  
80  
100 120 140  
Iline (mA)  
Rexch()  
600  
400  
800  
1000  
R6(k)  
78.7  
×
×
82  
36  
48  
60  
100  
140  
×
Vexch(V)  
110  
93.1  
120  
×
102  
Table 1 Values of resistor R6 for optimum line loss compensation,for various usual values of exchange  
supply vloltage(Vexch) and exchange feeding bridge resistance(Rexch);R9=20.  
11  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
R1 620  
100 µF  
13  
1
10  
7
IR VCC  
MIC+  
LN  
4
R
L
QR  
C4  
R4  
600Ω  
100pF  
Vi  
100k  
6
5
2
MIC-  
GAR  
GAS1  
GAS2  
C1  
100  
10 TO 140 mA  
C7 1nF  
Vo  
µ
F
11  
DTMF  
R7  
12  
MUTE  
68k  
C8 1nF  
3
10  
Vi  
µF  
VEE REG AGC STAB SLPE  
C6  
100pF  
9
14 15  
8
16  
C3  
4.7  
R6  
µ
F
R5  
3.6k  
R9  
20  
Fig.13 Test circuit defining voltage gain of MIC+,MIC- and DTMF inputs.  
Voltage gain is defined as : GV=20*log(|VO/Vi|).For measuring the gain from MIC+ and MIC- the MUTE input  
should be HIGH(UTC TEA1062N is LOW) or open-circuit, for measuring the DTMF input MUTE should be  
LOW(UTC TEA1062N is HIGH) .Inputs not under test should be open-circuit.  
R1=620  
100 µF  
1
13  
VCC  
C2  
LN  
Z
L
4
10  
7
IR  
QR  
600Ω  
R4  
100k  
C4 Vo  
100pF  
MIC+  
GAR  
5
2
10 TO 140 mA  
6
C7 1nF  
MIC-  
C1  
100  
GAS1  
µ
F
11  
DTMF  
R7  
68k  
C8 1nF  
3
12  
GAS2  
MUTE  
10  
Vi  
µF  
C6  
100pF  
VEE REG AGC STAB  
SLPE  
16  
9
14 15  
8
C3  
4.7  
R6  
µ
F
R5  
3.6k  
R9  
20Ω  
Fig.14 Test circuit for defining voltage gain of the receiving amplifier.  
Voltage gain is defined as: GV=20*log(|VO/Vi|).  
12  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  
UTCTEA1062N / TEA1062AN  
LINEAR INTEGRATED CIRCUIT  
R1  
620  
R10  
130  
R2  
C5  
132k  
C1  
100  
BZX79  
C12  
100nF  
1
LN  
13  
VCC  
BAS11  
(x2)  
µ
F
10  
IR  
C2  
R3  
4
QR  
Telephone  
Line  
C4  
BZW14  
(x2)  
11  
12  
R4  
DTMF  
MUTE  
100pF  
5
UTC TEAI062N  
UTC TEA1062AN  
From dial and  
control circuits  
GAR  
3.92k  
7
6
C7  
MIC+  
MIC-  
1nF  
SLPE GAS1  
16  
GAS2  
3
REG  
14  
AGC STAB  
15  
V
E9E  
2
8
C6  
R8  
100pF  
R7  
390  
R
VA(R16.R14)  
R5  
3.6k  
R6  
R9  
C8  
C3  
Zbal  
20  
1nF  
4.7 µF  
Fig.15 Typical application of the UTC TEA1062AN ,shown here with a piezoelectric earpiece and DTMF dialling. The  
bridge to the left ,the Zener diode and R10 limit the current into the circuit and the voltage across the circuit during  
line transients.Pulse dialling or register recall required a different protection arrangement.  
The DC line voltage can be set to a higher value by resistor RVA(REG to SLPE).  
LN  
VCC  
DTMF  
UTC  
VDD  
DTMF  
dialling  
circuit  
CARDLE  
TEA1062AN  
MUTE  
CONTRAT  
M1  
VSS DP/FL  
VEE  
TELEPHONE  
LINE  
BSN254A  
Fig.16  
Typical applications of the UTC TEA1062N/TEA1062AN (simplified)  
The dashed lines show an optional flash (register recall by timed loop break).  
13  
UTC UNISONIC TECHNOLOGIES CO., LTD.  
QW-R108-011,A  

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