TEA2025D [UTC]
STEREO AUDIO AMPLIFIER; 立体声音频放大器
| 型号： | TEA2025D |
| 厂家： | 
Unisonic Technologies |
| 描述： | STEREO AUDIO AMPLIFIER |
| 文件： | 总8页 (文件大小：248K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
TEA2025D
LINEAR INTEGRATED CIRCUIT
STEREO AUDIO AMPLIFIER
ꢀ
DESCRIPTION
The UTC TEA2025D is a monolithic integrated circuit that
intended for use as dual or bridge power audio amplifier portable
radio cassette players.
SOP-20
ꢀ
FEATURES
* Dual or bridge connection modes.
* Few external components.
* Supply voltage down to 3V.
* High channel separation.
* Very low switch on\off noise.
* Max gain of 45dB with adjust external resistor.
* Soft clipping.
*Pb-free plating product number: TEA2025DL
* Thermal protection.
* 3V<VCC<15V
* P=2*1W,VCC=6V,RL=4Ω
* P=2*2.3W,VCC=9V,RL=4Ω
* P=2*0.1W,VCC=3V,RL=4Ω
■
ORDERING INFORMATION
Order Number
Package
Packing
Normal
Lead Free Plating
TEA2025D-S20-R
TEA2025D-S20-T
TEA2025DL-S20-R
TEA2025DL-S20-T
SOP-20
SOP-20
Tape Reel
Tube
TEA2025DL-S20-R
(1)Packing Type
(2)Package Type
(3)Lead Plating
(1) R: Tape Reel, T: Tube
(2) S20: SOP-20
(3) L: Lead Free Plating, Blank: Pb/Sn
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Copyright © 2005 Unisonic Technologies Co., Ltd
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TEA2025D
LINEAR INTEGRATED CIRCUIT
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PIN CONFIGURATION
BRIDGE
OUT2
Vcc
1
2
3
20
OUT1
BOOT1
GND
19
18
BOOT2
GND
4
5
17
16
GND
GND
GND
GND
6
7
15
14
GND
GND
FEEDBACK
FEEDBACK
8
13
12
11
IN 1(+)
IN 2(+)
SVR
9
GND(Sub)
10
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TEA2025D
LINEAR INTEGRATED CIRCUIT
■
BLOCK DIAGRAM
GND(Sub )
IN 1+
FEED
GND
GND
BOOT 1
OUT1
50Ω
10kΩ
THERMAL
PROTECT
-
1
1
+
START
CIRCUIT
5kΩ
SVR
DECOUPLING
Vss
+
BRIDGE
IN 2+
-
50Ω
2
2
+
10kΩ
50Ω
FEED
GND
GND
BOOT 2
OUT2
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TEA2025D
LINEAR INTEGRATED CIRCUIT
■
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
VSS
RATINGS
15
UNIT
V
Supply Voltage
Output Peak Current
Junction Temperature
Storage Temperature
IO(PEAK)
TJ
1.5
A
150
°C
°C
TSTG
150
Note Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
■
THERMAL DATA
PARAMETER
SYMBOL
θJC
RATINGS
UNIT
°C/W
°C/W
Thermal Resistance Junction-case
15
65
Thermal Resistance Junction-ambient
Note: The θJA is measured with 4 cm2 copper area heatsink.
θJA
■
ELECTRICAL CHARACTERISTICS (Ta=25°C, VCC=9V, Stereo unless otherwise specified)
PARAMETER
SYMBOL
VSS
TEST CONDITIONS
MIN TYP MAX
UNIT
V
Supply Voltage
3
12
50
Quiescent Current
Quiescent Output Voltage
IQ
35
4.5
45
51
mA
V
VOUT
Stereo
Bridge
43
49
47
53
±1
dB
dB
dB
kΩ
Voltage Gain
GV
Voltage Gain Difference
Input Impedance
∆GV(DIFF)
RI
30
0.1
0.02
1
RL=4Ω
RL=32Ω
RL=4Ω
RL=8Ω
RL=16Ω
RL=32Ω
RL=4Ω
RL=8Ω
RL=8Ω
RL=16Ω
RL=32Ω
RL=4Ω
RL=8Ω
RL=8Ω
Stereo
Bridge
VSS=3V
0.7
1.7
0.6
0.25
0.13
2.3
1.3
2.4
0.18
0.06
2.8
1.5
4.7
0.3
0.5
46
VSS=6V
POUT Stereo 8 (per channel)
Output Power (d=10%)
VSS=9V
W
VSS=12V
VSS=3V
POUT Bridge
VSS=6V
VSS=9V
1.5
%
%
Distortion
d
VSS=9V; RL=4Ω
Supply Voltage Rejection
Input Noise Voltage
Cross-Talk
SVR f=100Hz,VR=0.5V,Rg=0
40
40
dB
mV
mV
dB
Rg=0
eN(IN)
1.5
3
3
6
Rg=104Ω
f=1KHz, Rg=10KΩ
CT
52
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TEA2025D
LINEAR INTEGRATED CIRCUIT
■
APPLICATION INFORMATION
Input Capacitor
Input capacitor is PNP type allowing source to be referenced to ground.
In this way no input coupling capacitor is required. However, a series capacitor(0.22µF) to the input side can be
useful in case of noise due to variable resistor contact.
Bootstrap
The bootstrap connection allows to increase the output swing.
The suggested value for the bootstrap capacitors (100µF) avoids a reduction of the output signal also at low
frequencies and low supply voltage.
Voltage Gain Adjust
STEREO MODE
The voltage gain is determined by on-chip resistors R1 and R2 together with the external RfC1 series connected
between pin 8(13) and ground. The frequency response is given approximated by:
VOUT
R1
Rf +R2+
=
1
VIN
JWC1
With Rf=0,C1=100µF, the gain results 46dB with pole at f=32Hz
The purpose of RfI is to reduce the gain. It is recommended to not reduce it under 36dB.
BRIDGE MODE
Figure 7
8(13)
Rf
R2
50
2(19)
R1
10K
C1
The bridge configuration is realized very easily thanks to an internal voltage divider which provides (at pin 1)the CH1
output signal after reduction. It is enough to connect pin8(inverting input of CH 2 )with a capacitor to pin 1 and to
connect to ground the pin 9.
The total gain of the bridge is given by:
VOUT
VIN
R1
Rf +R2+
R3
R4
R1
R2+R4+
(1+
)
=
1
1
JWC1
JWC1
and with the suggested values (C1=C2=100µF,Rf=0)means:
Gv=52dB
Figure 8
IN
OUT
R1
OUT
R1
10K
R2
10K
R3
5K
R2
R4
50
With first pole at f=32Hz
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TEA2025D
LINEAR INTEGRATED CIRCUIT
■
APPLICATION INFORMATION(Cont.)
Output Capacitors.
The low cut off frequency due to output capacitor depending on the load is given by:
1
FL =
2πCOUT *RL
With COUT 470µF and RL=4 ohm it means FL=80Hz.
Stability
A good layout is recommended in order to avoid oscillations. In general, the designer must pay attention on the
following points:
-Short wires of components and short connections.
-No ground loops.
-Bypass of supply voltage with capacitors as nearest as possible to the supply I.C. pin. The low value (polyester)
capacitors must have good temperature and frequency characteristics.
-No sockets.
The heatsink can have a smaller factor of safety compared with that of a conventional circuit. There is no device
damage in the case of excessive junction temperature: all that happens is that POUT (and therefore PD) and Id are
reduced.
APPLICATION SUGGESTION
The recommended values of the components are those shown on stereo application circuit of Fig.2 different values
can be used, the following table can help the designer.
Larger
Than
Component Recommended
Purpose
Smaller Than
Input DC Decoupling in Case of
Slider Contact Noise of Variable
Resistor
C1,C2
0.22µF
Degradation of SVR, Increase of THD at
Low Frequency and Low Voltage
C3
100µF
Ripple Rejection
C4,C5
C6,C7
100µF
470µF
0.15µF
100µF
Bootstrap
Output DC Decoupling
Frequency Stability
Inverting Input DC Decoupling
Increase of Low Frequency Cut-off
Danger of Oscillations
C8,C9
C10,C11
Increase of Low Frequency Cut-off
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TEA2025D
LINEAR INTEGRATED CIRCUIT
■
TYPICAL APPLICATION CIRCUIT
Figure 1:Bridge Application(Powerdip)
Figure 2:Stereo Application(Powerdip)
+V8
+V8
100µF
100µF
0.22µF
C1
0.22µF
C4
100µF
20
100µF
20
IN
12
13
IN.1
IN.2
12
13
18
19
C6
18
19
C10
100µF
470µF
100
µF
OUT.1
RL
C8
9
8
0.15µF
0.15µF
TEA
2025D
0.15µF
TEA
2025D
C2
0.22µF
RL
9
8
3
2
3
2
C7
100µF
100µF
C5
100µF
470µF
100µF
C11
1
100
µF
OUT.2
RL
4,5,6,7,11,
14,15,16,17
10
10
4,5,6,7,11,
14,15,16,17
C9
0.15µF
C3
100µF
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TEA2025D
LINEAR INTEGRATED CIRCUIT
■
TYPICAL CHARACTERISTICS
Supply Current vs.Supply Voltage
(R =4Ω)
Output Voltage vs. Supply Voltage
L
I(mA)
VOUT(V)
50
8
7
40
30
6
5
4
3
2
20
10
STEREO
12
STEREO
1
0
15
3
6
9
3
6
9
12
15
Vss(V)
Vss(V)
Output Power vs. Supply Voltage
(THD=10%,f=1KHz)
THD vs. Output Power
(f=1KHz,Vss=6V)
PoUT(W)
THD(%)
3.5
3
10
RI=8Ω
RI=8Ω
RI=16Ω
2.5
2
RI=4Ω
RI=4Ω
1
1.5
1
R
I
=16Ω
STEREO
15
0.5
0
STEREO
0.8
0.1
0
1
12
3
6
9
0.6
PoUT(W)
0.2
0.4
Vss(V)
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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