TS2043 [UTC]
TOUCH PANEL CONTROLLER; 触摸屏控制器
| 型号： | TS2043 |
| 厂家： | 
Unisonic Technologies |
| 描述： | TOUCH PANEL CONTROLLER |
| 文件： | 总8页 (文件大小：209K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
TS2043
Preliminary
CMOS IC
TOUCH PANEL CONTROLLER
DESCRIPTION
The UTC TS2043 is
a highly integrated 12-bit SAR
analog-to-digital (A/D) converter designed for touch panel
controllers. It features serial interface and low on-resistance drivers
for 4-wire resistive touch panels. The UTC TS2043 contains all the
analog and digital circuitry needed to complete a pen request.
The UTC TS2043 features a low-power dissipation consumes
only 800uW under a 125KHz sample rate and in a 2.7V supply
condition, it consumes only 2.7uW at shutdown mode. The supply
voltage is from 2.7V to 5.5V under normal operation.
The UTC TS2043 can be used in applications such as touch
panels, personal digital Assistants (PDAs), smart phones,
point-to-sales terminals, high speed data acquisition, portable
instruments, and low power instruments.
FEATURES
* Power Supply Voltage: 2.7V ~ 5.5V
* Serial Interface
* 4-Wire Touch Panel Interface
* Embedded Touch Panel Drivers
* 12-Bit AD Converter
* Programmable 8 or 12 Bit Resolution
* Conversion Rate: 125 KHz
* 2 Auxiliary Analog Inputs
* Full Power Down Control
ORDERING INFORMATION
Halogen Free
Package
SSOP-16
Packing
TS2043G-R16-R
Tape Reel
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Copyright © 2010 Unisonic Technologies Co., Ltd
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TS2043
Preliminary
CMOS IC
PIN CONFIGURATION
PIN DESCRIPTION
PIN NO.
PIN NAME
VDD
DESCRIPTION
1
2
Power Supply, 2.7V ~ 5.5V
X+
X+ Input; ADC Input Channel 1.
Y+ Input; ADC Input Channel 2.
X- Input.
3
Y+
4
X-
5
Y-
Y- Input.
6
GND
IN3
Ground.
7
Auxiliary Input 1; ADC Input Channel 3.
Auxiliary Input 2; ADC Input Channel 4.
Reference Voltage Input.
8
IN4
9
VREF
VDD
10
11
12
13
14
15
16
Power Supply, 2.7V ~ 5.5V
/PENIRQ
DOUT
BUSY
DIN
Pen Interrupt. Requires 10KΩ ~ 100KΩ external pull-up resistor.
Serial Data Output. This output pin is high impedance when /CS is high.
Busy Output. This output pin is high impedance when /CS is high.
Serial Data Input.
/CS
Chip Select Input. This input is active low.
External Clock Input.
DCLK
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TS2043
Preliminary
CMOS IC
BLOCK DIAGRAM
VDD
/PENIRQ
DCLK
/CS
15
DIN
14
BUSY
13
DOUT
12
11
1/10
16
Digital Control Logic
2
X+
3
4
5
Y+
X-
SAR DAC
(Cap Array)
4-Channel
MUX
COMP
Y-
6
GND
IN3
IN4
7
8
9
VREF
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TS2043
Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
RATINGS
-0.3 ~ +6
UNIT
V
VDD to GND
Analog Input to GND
Digital Input to GND
Junction Temperature
-0.3 ~ VDD +0.3
-0.3 ~ VDD +0.3
+150
V
V
TJ
°C
°C
°C
-40 ~ +85
Operating Temperature Range
Storage Temperature Range
TOPR
TSTG
-60 ~ +150
Note:
Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
ELECTRICAL CHARACTERISTICS (TA=-40°C to 85°C, VDD=+2.7V, VREF=+2.7V, fsample=125KHz,
fCLK=24*fSAMPLE, 12-bit mode, Digital inputs=GND or VDD. Typical values are at TA=+25°C, unless otherwise
specified.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Power Supply Requirements
Specified Performance
Operating Range
2.7
2.7
3.6
5.5
V
V
Power Supply
VDD
300
800
μA
Nominal Supply Current
Power Dissipation
IDD
Shut Down Mode
(DCLK=DIN=VDD)
1
μA
μW
μW
PD
Shut Down Mode
(VDD=2.7V)
2.7
System Performance
Resolution
12
Bit
Integral nonlinear
Differential nonlinear
Gain Error
INL
+/-2
+/-1
+/-4
+/-6
LSB
LSB
LSB
LSB
DNL
Offset Error
Digital Input/Output
VOH
VOL
VIH
VDD*0.8
V
V
V
V
V
0.4
VDD+0.3
0.8
Logic Family
CMOS
VDD*0.7
-0.3
VIL
/PEN Request (/PENIRQ)
Analog Input
Input Span
VOL
100KΩ Pull-Up
0.65
0
VREF
V
V
Input Range
Capacitance
Reference Input
Range
-0.2
VDD+0.2
25
15
pF
VREF
IREF
1
VDD
V
Input Current
X / Y Switches
X+, Y+
Specified Performance
μA
Switch On-Resistance
Switch On-Resistance
5
5
Ω
Ω
X-, Y-
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TS2043
Preliminary
CMOS IC
TYPICAL APPLICATION CIRCUIT
1
2
3
4
5
6
VDD
X+
16
15
14
13
DCLK
/CS
Clock
Chip Select
Data In
TOUCH PANEL
Y+
X-
DIN
BUSY
Busy Status
Y-
12
11
DOUT
/PENIRQ
VDD
Data Out
Pen Interrupt
GND
IN3
IN4
2.7V
7
8
10
9
0.1uF
10uF
VREF
0.1uF
TS2043
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TS2043
Preliminary
CMOS IC
APPLICATION INFORMATION
OVERVIEW
The UTC TS2043 is a 12-bit switched-capacitor Analog-to-Digital (A/D) converter and incorporates four channel
inputs, a serial interface, and low on-resistance switches for touch panel.. It supplies from a single supply varying from
+2.7V to +5.5V. It requires an external reference, which is directly limiting the input range of the converter. The
four-channel multiplexer contained in the circuit decides the input to this converter (See Figure 1). In addition, an
external clock is also required.
OPERATION OF 24-CLOCKS
The UTC TS2043 communicates with microprocessors or digital signal processors through a synchronous
serial interface. For a total 24 clock cycles on the DCLK input, three serial communications are needed to complete
one conversion. (See Figure 2)
/CS
1
8
1
1
DCLK
Acquire
Conversion
ON
X/Y
SWITGH
Mode1 Mode0
A2
A1 A0
PD1PD0
DIN
BUSY
DOUT
Start
Tri-State
Tri-State
Tri-State
Tri-State
11
(MSB)
0
(LSB)
Figure 2. Serial Interface of TS2043
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TS2043
Preliminary
CMOS IC
APPLICATION INFORMATION(Cont.)
Serial Interface
Once a falling signal applies on /CS pin (active in low), the operation is initiated. After /CS falls, the UTC
TS2043 begins to look for a start bit on the DIN input. At the end of the operation the /CS pin should be pulled high,
which minimizes supply current if DCLK is left running.
Control Byte
The first eight clock cycles provides the control byte on DIN pin. (See Table I and Table II for more information).
The control byte represents the start operation, addressing, resolution, and power down information.
Table I. Control Bits in the Control Byte
Bit 7
Start
Bit 6
A2
Bit 5
A1
Bit 4
A0
Bit 3
Bit 2
Bit 1
PD1
Bit 0
PD0
Mode1
Mode0
Table II. Description of the Control Bits
BIT
7
NAME
Start
DESCRIPTION
Start Bit.
6,5,4
A2,A1,A0
Mode1
Mode0
Input Channel Select Bits.
12-Bit / 8-Bit Conversion
Configuration Bit.
3,2
1,0
PD1,PD0
Power Down Control Bits
Start Bit – Initiate Start
The control byte starts with the first high bit on DIN. The first bit must always be logic high (1) to initiate the start
of the conversion. The UTC TS2043 will not start until the start bit is detected.
Addressing Bits – Input Channel Selection
The next three bits on control byte are addressing bits (A2, A1, A0), which select the active input channel of the
input multiplexer, and touch panel drivers. (See Table III for more information).
Table III. Input Channel Configuration
Input
Channel
X+
A2
A1
X Switch
Y Switch
Reference
0
1
0
1
0
0
1
1
OFF
ON
ON
VREF
VREF
VREF
VREF
Y+
OFF
OFF
OFF
IN3
OFF
OFF
IN4
Mode Bits – Conversion Resolution Configuration
The Mode bits (Mode1, Mode0) set the resolution of this device. With the Mode1 bit LOW (0), the following
conversion will have 12 bits of resolution. With the Mode1 bit HIGH (1) the following conversion will have 8 bits of
resolution. (See Table IV for more information.)
Table IV. Resolution Configuration
Mode1
Mode0
DESCRIPTION
0
0
1
1
1
0
1
0
12bits Resolution
12bits Resolution
8bits Resolution
8bits Resolution
PD0 and PD1 Bits - Power Down Control
The last two bits are PD1 and PD0 bits, which control the power down mode of the UTC TS2043. Through
applying a same logic high(1) this device enters a power-up mode, while enters a power-down mode by a same
logic low (0) on PD1 and PD0 bits.(See Table V for more information).
Table V. Power-Down Selection
PD1
PD0
PENIRQ
Enable
Disable
Disable
Disable
DESCRIPTION
Power-Down between conversions. Y- switch is on.
Power-Down between conversions. Y- switch is off. /PENIRQ is disabled
No used.
0
0
1
1
0
1
0
1
No Power-Down between conversions.
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TS2043
Preliminary
CMOS IC
APPLICATION INFORMATION(Cont.)
OPERATION OF 16-CLOCKS
The typical operation of the UTC TS2043 is 24-clocks (three control bytes) per conversion. However the control
bits for the next conversion can be overlapped with current conversion for a faster conversion. Figure 3 shows the
timing of 16-Clocks per conversion.
/CS
1
8
1
1
1
8
DCLK
X/Y
SWITGH
ON
ON
DIN
BUSY
DOUT
11
(MSB)
10
9
0
11
(MSB)
(LSB)
Figure 3. Timing of 16-clocks per Conversion
ANALOG INPUT
There are four channel inputs in the UTC TS2043. X+ and Y+ inputs are for touch panel measurement, 2 auxiliary
inputs are IN3 and IN4. The input to the A/D converter is selected via the four-channel multiplexer. (see Block
Diagram)
Input Channel
The input channel configuration of the UTC TS2043 is shown in Table V. The control bits are set via the DIN pin.
(see Control byte section). The selected channel is for A/D converter input. Please refer to Figure 5 for detailed
input channel multiplexer. For measuring X+ and Y+, Y switches and X switches are turned on respectively.
Reference Input
An external reference voltage source is needed for the UTC TS2043. The reference input sets the Analog-to-Digital
converter (ADC) input range. If the reference input is from the power supply directly, to avoid noise from power
supply, special care must be taken into consideration.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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