U74HCT374L-P20-R [UTC]
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS; 八路边沿触发D型触发器具有三态输出![U74HCT374L-P20-R](http://pdffile.icpdf.com/pdf1/p00164/img/icpdf/U74HC_917853_icpdf.jpg)
型号: | U74HCT374L-P20-R |
厂家: | ![]() |
描述: | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
文件: | 总6页 (文件大小:228K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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UNISONIC TECHNOLOGIES CO., LTD
U74HCT374
CMOS IC
OCTAL EDGE-TRIGGERED
D-TYPE FLIP-FLOPS WITH
3-STATE OUTPUTS
DESCRIPTION
The U74HCT374 is a octal edge-triggered D-type flip-flops
with 3-state outputs and it has 8 channels.
TSSOP-20
When the OE input is low, on the positive transition of the
clock (CLK) input, the Q outputs are set to the logic levels of the
data (D) inputs.
When the OE input is high, the outputs are in the
high-impedance.
To ensure the high-impedance state during power up or
power down, OE should be tied to VCC through a pull-up
resistor; the minimum value of the resistor is determined by the
current-sinking capability of the driver.
FEATURES
* Inputs are TTL-Voltage Compatible
* Operate from 4.5V to 5.5V
* Inputs Accept Voltages to 5.5V
* Max tpd of 25ns at VCC=5.5V, CL=50pF
* Typ VOL< 0.26V at VCC=4.5V, IOL=6mA, TA=25°C
* Typ VOH> 3.98V at VCC=4.5V, IOH=-6mA, TA=25°C
ORDERING INFORMATION
Ordering Number
Package
Packing
Lead Free
Halogen Free
U74HCT374L-P20-R
U74HCT374L-P20-T
U74HCT374G-P20-R
U74HCT374G-P20-T
TSSOP-20
TSSOP-20
Tape Reel
Tube
www.unisonic.com.tw
Copyright © 2011 Unisonic Technologies Co., Ltd
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U74HCT374
CMOS IC
PIN CONFIGURATION
FUNCTION TABLE
INPUTS( OE )
INPUTS(CLK)
INPUTS(D)
OUTPUT(Q)
L
L
↑
↑
H
L
H
L
L
H or L
X
X
X
Q0
Z
H
LOGIC SYMBOL
1
OE
CLK
1D
2D
3D
4D
5D
6D
7D
8D
EN
11
3
C1
1D
2
5
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
4
7
6
8
9
12
15
16
19
13
14
17
18
LOGIC DIAGRAM
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U74HCT374
CMOS IC
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
VCC
RATINGS
-0.5 ~ 7
-0.5 ~ 7
-0.5 ~ VCC +0.5
±70
UNIT
Supply Voltage
V
V
Input Voltage
VIN
Output Voltage
VOUT
ICC
V
VCC or GND Current
Output Current
mA
mA
mA
mA
℃
IOUT
IIK
±35
Input Clamp Current
Output Clamp Current
Operating Temperature
Storage Temperature
-20
IOK
±20
TOPR
TSTG
-40 ~ + 85
-65 ~ + 150
℃
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
VCC
VIH
UNIT
V
RATINGS
4.5 ~ 5.5
2
Supply Voltage
High-level Input Voltage
Low-level Input Voltage
Input Voltage
V
VIL
0.8
V
VIN
0 ~ VCC
0 ~ VCC
-8
V
Output Voltage
VOUT
IOH
V
High-level Output Current
Low-level Output Current
Input Rise or Fall Times
Operating temperature
mA
mA
ns/V
℃
IOL
8
500
tR, tF
TA
-40 ~ 85
ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
4.499
4.3
MAX UNIT
V
VCC=4.5V, IOH=-20μA
VCC=4.5V, IOH=-6mA
VCC=4.5V, IOL=20μA
VCC=4.5V, IOL=6mA
4.4
Output Voltage High-Level
Output Voltage Low-Level
VOH
3.98
0.001 0.1
VOL
V
0.17
±0.1
0.26
±100 ꢀnA
Input Leakage Current
II(LEAK) VCC=5.5V, VIN=0 or 5.5V
VCC=5.5V, VIN=VIH or VIH,
IOZ
Leakage Current (For output in
high-impedance state)
±0.01 ±0.5 ꢀμA
V
OUT=0 or 5.5V
V
CC=5.5V, VIN=VCC or GND, IOUT=0
8
ꢀμA
mA
pF
Quiescent Supply Current
ICC
ΔICC
CI
VCC=5.5V, one input at 0.5V or 3.4V,
Other inputs at VCC or GND
1.4
3
2.4
10
Additional quiescent supply current
Input Capacitance
VCC=4.5V to 5V
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U74HCT374
CMOS IC
TIMING REQUIREMENTS
PARAMETER
SYMBOL
fCLOCK
TEST CONDITIONS
VCC=4.5V
MIN
TYP
MAX
31
UNIT
Clock Frequency
MHz
ns
VCC=5.5V
VCC=4.5V
VCC=5.5V
VCC=4.5V
VCC=5.5V
VCC=4.5V
36
16
14
20
17
10
10
Pulse Width, CLK High or Low
Setup Time, Data Before CLK↑
Hold Time, Data After CLK↑
tW
tSU
ns
tH
ns
VCC=5.5V
SWITCHING CHARACTERISTICS (See TEST CIRCUIT AND WAVEFORMS)
PARAMETER
SYMBOL
f(MAX)
TEST CONDITIONS
VCC=4.5V, CL=50pF
MIN
31
TYP
36
40
30
25
40
35
26
23
34
29
23
22
10
9
MAX
UNIT
MHz
Maximum Clock Frequency
VCC=5.5V, CL=50pF
VCC=4.5V, CL=50pF
VCC=5.5V, CL=50pF
VCC=4.5V, CL=150pF
VCC=5.5V, CL=150pF
VCC=4.5V, CL=50pF
VCC=5.5V, CL=50pF
VCC=4.5V, CL=150pF
VCC=5.5V, CL=150pF
VCC=4.5V, CL=50pF
36
36
32
46
41
30
27
40
36
30
27
12
11
42
38
tPD
From CLK to Q
ns
(tPLH/tPHL
)
tEN
From OE to Q
ns
ns
ns
(tPZL/tPZH
)
tDIS
From OE to Q
(tPLZ/tPHZ
)
VCC=5.5V, CL=50pF
VCC=4.5V, CL=50pF
VCC=5.5V, CL=50pF
VCC=4.5V, CL=150pF
VCC=5.5V, CL=150pF
tT
(tR/tF)
Output transition rise/fall time
18
16
OPERATING CHARACTERISTICS(Ta=25°С)
PARAMETER
Power Dissipation Capacitance
SYMBOL
CPD
TEST CONDITIONS
RATINGS
85
UNIT
pF
No load, VCC = 5 V, f=1MHz
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U74HCT374
CMOS IC
TEST CIRCUIT AND WAVEFORMS
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
VLOAD
GND
Input
VCC
VM
VLOAD
VCC
CL
RL
VΔ
VIN
tR, tF
15pF
50pF
5V±0.5V
VCC
≤3ns
VCC/2
1kΩ
0.5V
tW
VIN
Input
VM
VM
0
V
Pulse Duration
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U74HCT374
CMOS IC
TEST CIRCUIT AND WAVEFORMS(Cont.)
VIN
Input
VM
VM
0V
tPHL
tPLH
VOH
Output
VM
VM
VOL
tPLH
tPHL
VOH
VM
VM
Output
VOL
Voltage Waveforms Propagation Delay Times
Note: A. CL includes probe and jig capacitance.
Note: B. PRR ≤1MHz, ZO = 50Ω, tR ≤3ns, tF ≤3ns.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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