U74LVC563L-P20-R [UTC]
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS; 八路透明D类锁存器具有三态输出
| 型号： | U74LVC563L-P20-R |
| 厂家： | 
Unisonic Technologies |
| 描述： | OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| 文件： | 总6页 (文件大小：219K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
U74LVC563
CMOS IC
OCTAL TRANSPARENT D-TYPE
LATCHES WITH 3-STATE OUTPUTS
DESCRIPTION
The U74LVC563 is a octal transparent D-TYPE latches with 3-state
outputs. When the latch-enable (LE) is high, the Q outputs follow the
complements of the D inputs. When LE is low, the Q outputs are latched at
the inverses of the levels set up at the D inputs.
When the output-enable ( OE ) input is high, the Q outputs are in a
high-impedance state, and the outputs neither load nor drive the bus lines.
The high-impedance state and increased drive provide the capability to drive
bus lines without interface or pull-up components. While the outputs are in
the high-impedance state, old data can be retained or new data can be
entered, i.e. OE does not affect the internal operations of the latches. When
OE is low, the Q outputs are in a normal logic state (high or low levels).
The U74LVC563 is designed for 1.65V to 3.6V operation. Inputs can be
driven from either 3.3V or 5V devices, so the U74LVC563 can be used in a
mixed 3.3V/5V system environment.
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pull-up resistor; the minimum value of
the resistor is determined by the current-sinking capability of the driver.
FEATURES
* Wide supply voltage range from 1.65V to 3.6V
* Max tPD of 6.8 ns from D to Q at 3.3V
* Max tPD of 7.6 ns from LE to Q at 3.3V
* Up to 5.5V inputs accept voltages
* Low power consumption, ICC = 10μA (Max.) at 3.6V
* ±24mA output driver at 3V
* IOFF supports partial-power-down mode operation
ORDERING INFORMATION
Ordering Number
Lead Free
Package
Packing
Halogen Free
U74LVC563L-P20-R
U74LVC563L-P20-T
U74LVC563G-P20-R
U74LVC563G-P20-T
TSSOP-20
TSSOP-20
Tape Reel
Tube
www.unisonic.com.tw
Copyright © 2011 Unisonic Technologies Co., Ltd
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U74LVC563
CMOS IC
PIN CONFIGURATION
FUNCTION TABLE (each latch)
INPUTS
LE
OUTPUT
Q
OE
D
L
H
L
L
L
H
H
L
H
L
X
X
Q0
H
X
Z
LOGIC DIAGRAM (positive logic)
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U74LVC563
CMOS IC
ABSOLUTE MAXIMUM RATING (unless otherwise specified)
PARAMETER
SYMBOL
VCC
RATINGS
-0.5~6.5
-0.5~6.5
UNIT
Supply Voltage
Input Voltage
Output Voltage
(any output in the high-impedance or power-off state)
Output Voltage (any output in the high or low state)
Input Clamp Current
V
V
VIN
VOUT
-0.5~6.5
V
VOUT
IIK
-0.5~VCC+0.5
-50
V
mA
mA
mA
mA
°C
Output Clamp Current
IOK
-50
Output Current
IOUT
ICC
±50
VCC or GND Current
±100
Storage Temperature
TSTG
-65 ~ +150
Note: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
RECOMMENDED OPERATING COMDITIONS
PARAMETER
Supply Voltage
SYMBOL
CONDITIONS
Operating
Data retention only
CC = 1.65V to 1.95V
MIN
1.65
1.5
MAX
3.6
UNIT
V
VCC
V
0.65* VCC
1.7
High-Level Input Voltage
Low-Level Input Voltage
VIH
VIL
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
V
V
2
VCC = 1.65V to 1.95V
0.35* VCC
0.7
0.8
5.5
VCC
5.5
-4
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
Input Voltage
VIN
0
0
0
V
V
High or low state
3 state
Output Voltage
VOUT
VCC=1.65V
VCC=2.3V
VCC=2.7V
VCC=3V
-8
High-Level Output Current
Low-Level Output Current
IOH
mA
mA
-12
-24
4
VCC=1.65V
VCC=2.3V
VCC=2.7V
VCC=3V
8
IOL
12
24
Input Transition Rise or Fall Rate
Operating Temperature
Δt/Δv
TA
0
10
ns/V
°C
-40
85
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ELECTRICAL CHARACTERISTICS (TA =25°C , unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
IOH = -100μA, VCC = 1.65V to 3.6V
IOH = -4mA, VCC = 1.65V
IOH = -8mA, VCC = 2.3V
MIN
VCC-0.2
1.2
TYP MAX UNIT
1.7
High-Level Output Voltage
VOH
V
IOH = -12mA, VCC = 2.7V
IOH = -12mA, VCC = 3V
2.2
2.4
IOH = -24mA, VCC = 3V
2.2
IOL = 100μA, VCC = 1.65V to 3.6V
IOL = 4mA, VCC = 1.65V
IOL = 8mA, VCC = 2.3V
0.2
0.45
0.7
0.4
Low-Level Output Voltage
VOL
V
IOL = 12mA, VCC = 2.7V
IOL = 24mA, VCC = 3V
0.55
Input Leakage Current
(D, LE, or OE inputs)
OFF-state Current
II(LEAK) VIN = 0 to 5.5V, VCC = 3.6V
±5
μA
IOFF
IOZ
VIN or VO = 5.5V, VCC = 0V
VO = 0 to 5.5V, VCC = 3.6V
±10
±10
10
μA
μA
High-impedance state Current
I
OUT = 0, VIN = VCC or GND,
Quiescent Supply Current
ICC
μA
μA
VCC=3.6V
VIN=3.6V to 5.5V,in disabled state
10
One input at VCC-0.6V,VCC=2.7V to 3.6V,
other inputs at VCC or GND
Additional quiescent Supply
Current
Δ ICC
500
Input Capacitance
Output Capacitance
CIN
VIN = VCC or GND, VCC=3.3V (Note 1)
VOUT = VCC or GND, VCC=3.3V (Note 1)
4
pF
pF
COUT
5.5
Note: 1. All typical values are at VCC = 3.3 V, TA = 25 °C.
TIMING REQUIREMENTS(TA =25°C)
PARAMETER
SYMBOL
tW
TEST CONDITIONS
MIN MAX UNIT
VCC = 2.7V
3.3
Pulse duration, LE high
Setup time, data before LE↓
Hold time, data after LE↓
ns
ns
ns
VCC = 3.3V±0.3V
VCC = 2.7V
3.3
2
tSU
tH
VCC = 3.3V±0.3V
VCC = 2.7V
2
1.5
VCC = 3.3V±0.3V
1.5
SWITCHING CHARACTERISTICS (TA =25°C)
PARAMETER
Propagation delay
SYMBOL
tPLH/tPHL
TEST CONDITIONS
VCC=2.7V, CL=50pF, RL=500Ω
VCC=3.3±0.3V, CL=50pF, RL=500Ω
VCC=2.7V, CL=50pF, RL=500Ω
VCC=3.3±0.3V, CL=50pF, RL=500Ω
VCC=2.7V, CL=50pF, RL=500Ω
VCC=3.3±0.3V, CL=50pF, RL=500Ω
MIN MAX UNIT
7.8
ns
from input D to output Q
Propagation delay
(tPD
tPLH/tPHL
(tPD
PZL/tPZH
(tEN
PLZ/tPHZ
(tDIS
)
1.5
2
6.8
8.2
7.6
8.7
7.7
7.6
7
ns
ns
ns
from input LE to output Q
Propagation delay
)
t
t
from input OE to output Q
Propagation delay
)
1.5
1.5
VCC=2.7V, CL=50pF, RL=500Ω
from input OE to output Q
)
VCC=3.3±0.3V, CL=50pF, RL=500Ω
OPERATING CHARACTERISTICS (TA =25°C)
PARAMETER
Power Dissipation Capacitance
SYMBOL
TEST CONDITIONS
TYP
46
3
UNIT
pF
OE = 0, f=10MHz, outputs enabled
OE = 1, f=10MHz, outputs disabled
CPD
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U74LVC563
CMOS IC
TEST CIRCUIT AND WAVEFORMS
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
VLOAD
GND
Inputs
VCC
VM
VLOAD
CL
RL
VΔ
VIN
VCC
VCC
tR, tF
2.7V
≤2.5ns
≤2.5ns
1.5V
1.5V
6V
6V
50pF
50pF
500Ω
500Ω
3.3V±0.3V
0.3V
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CMOS IC
TEST CIRCUIT AND WAVEFORMS(Cont.)
VIN
VM
Input
VM
0V
tPHL
tPLH
VOH
Output
VM
VM
VOL
tPLH
tPHL
VOH
VM
VM
Output
VOL
Voltage Waveforms Propagation Delay Times
VIN
Input
VM
VM
0V
tPLZ
tPZL
VLOAD/2
Output
VM
S1 at VLOAD
VOL+VΔ
VOL
tPZH
tPHZ
VOH
VOH-VΔ
Output
VM
S1 at Open
0V
Voltage Waveforms Enable and Disable Times
Notes: 1. CL includes probe and jig capacitance.
2. All input pulses are supplied by generators having the following characteristics: PRR ≤10MHz, ZO = 50Ω.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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