UB241L-AA-AF5-R [UTC]
Power Management Circuit,;型号: | UB241L-AA-AF5-R |
厂家: | Unisonic Technologies |
描述: | Power Management Circuit, |
文件: | 总10页 (文件大小:335K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
UB241
Advance
CMOS IC
1-CELL ITHIUM-ION/POLYMER
BATTERY PROTECTION IC
4
DESCRIPTION
5
The UTC UB241 is a series of lithium-ion/lithium-polymer
rechargeable battery protection ICs incorporating high accuracy
voltage detection circuits and delay circuits.
The UTC UB241 is suitable for protection of single cell lithium-ion
/ lithium polymer battery packs from overcharge, over discharge and
over current.
3
2
1
SOT-25
The ultra-small package and less required external components
make it ideal to integrate the UTC UB241 into the limited space of
battery pack.
FEATURES
* Wide Supply Voltage Range: VDD=1.5V~8.0V
* Ultra-Low Quiescent Current: IOPE=3.0μA (VDD=3.5V)
* Ultra-Low Power-Down Current: IPDN=0.2μA (VDD=1.5V)
* Overcharge Detection Voltage: VCU=3.9V~4.4V
* Overcharge Release Voltage: VCL=3.8V~4.4V
* Over Discharge Release Voltage: VDL=2.0V~3.0V
* Over Discharge Release Voltage: VDU=2.0V~3.4V
* Over Current 1 Detection Voltage: VIOV1=0.05V~0.30V
* Over Current 2 Detection Voltage: VIOV2=0.5V (Fixed)
* Short Circuit Detection Voltage: VSHORT=-1.2V (Fixed, based on VDD
* Charger Detection Voltage: VCHA=-0.7V (Fixed)
)
* Delay Times are Generated by an Internal Circuit. (External Capacitors are Unnecessary.)
ORDERING INFORMATION
Ordering Number
Package
SOT-25
Packing
Tape Reel
Lead Free
Halogen Free
UB241G-xx-AF5-R
UB241L-xx-AF5-R
Note: xx: Output Voltage, refer to Marking Information.
UB241G-xx-AF5-R
(1)Packing Type
(1) R: Tape Reel
(2)Package Type
(3)Serial Code
(2) AF5: SOT-25
(3) xx: Refer to SERIAL CODE LIST
(4) G: Halogen Free and Lead Free, L: Lead Free
(4)Green Package
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UB241
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CMOS IC
MARKING INFORMATION
PACKAGE
VOLTAGE CODE (Note)
MARKING
4
5
1
Serial Code
L: Lead Free
XX
X1
SOT-25
G: Halogen Free
2
3
Note: Refer to Serial Code List
SERIAL CODE LIST
Overcharge
Overcharge
Over discharge
Detection
Voltage
[VDL](V)
2.50
Over discharge
Release
Voltage
[VDU](V)
2.90
Over Current
Detection
Voltage
[VIOV1](V)
0.150
Detection
Voltage
[VCU](V)
4.150
Release
Voltage
[VCL](V)
3.900
4.085
4.100
4.150
4.075
4.095
4.070
4.075
4.075
Model
Code
AA
AB
AC
AD
AE
AF
AG
AH
AI
4.185
2.80
2.90
0.150
4.200
2.30
2.40
0.150
4.250
2.40
3.00
0.100
UB241
4.275
2.60
2.90
0.100
4.295
2.40
3.00
0.200
4.320
2.50
2.90
0.100
4.325
2.50
2.90
0.100
4.325
2.50
2.90
0.150
PIN CONFIGURATION
CO
5
DO
4
1
2
3
VM
VDD
VSS
PIN DESCRIPTION
PIN NO.
PIN NAME
VM
DESCRIPTION
1
2
3
4
5
For current sense and charger detection input pin
Positive power input
VDD
VSS
Negative power input
DO
For discharge control: FET gate connection pin
For charge control: FET gate connection pin
CO
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CMOS IC
BLOCK DIAGRAM
0V Battery Charge
Inhibition Detector
VDD
VM
Oscillator
Charger Detector
Short circuit Detector
Over current 2 Detector
Over current 1 Detector
Divider
Overdischarge
Detector
Control
Logic
VM
Overcharge
Detector
VSS
DO
CO
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CMOS IC
ABSOLUTE MAXIMUM RATING (VSS=0V, TA=25°С unless otherwise specified)
PARAMETER
SYMBOL
VDD
RATINGS
VSS-0.3 ~ VSS+12
VDD-12 ~ VDD+0.3
VSS-0.3 ~ VDD+0.3
VDD-14 ~ VDD+0.3
-40 ~ +85
UNIT
V
Input Voltage Between VDD and VSS (Note 2)
CO Output Pin Voltage
VCO
V
DO Output Pin Voltage
VDO
V
VM Input Pin Voltage
VM
V
Ambient Operating Temperature
Storage Temperature
TOPR
TSTG
°С
°С
-55 ~ +125
Notes: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. Pulse (μsec) noise exceeding the above input voltage (VSS+12V) may cause damage to the IC.
ELECTRICAL CHARACTERISTICS (VSS=0V, TA=25°С unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CURRENT CONSEMPTION
Supply Current
IOPE
IPDN
VDD=3.5V, VM=0V
3.0
0.2
8.0
0.5
μA
μA
Power-Down Current
VDD=VM=1.5V
OPERATING VOLTAGE
Operating Voltage Between VDD-pin
and VSS-pin
VDS1
VDS2
1.5
1.5
8
V
V
Operating Voltage Between VDD-pin
and VM-pin
10
DETECTION VOLTAGE
Overcharge Detection Voltage
Overcharge Release Voltage
Overdischarge Detection Voltage
Overdischarge Release Voltage
Over Current 1 Detection Voltage
Over Current 2 Detection Voltage
Load Short Circuit Detection Voltage
Charger Detection Voltage
0V BATTERY CHARGE VOLTAGE
0V Battery Charge Inhibition Battery
Voltage
VCU
VCL
VCU-0.05
VCL-0.05
VDL-0.10
VDU-0.10
VCU
VCL
VDL
VDU
VCU+0.05
VCL+0.05
VDL+0.10
VDU+0.10
VIOV1+0.03
0.65
V
V
V
V
V
V
V
V
VDL
VDU
VIOV1
VIOV2
VDD=3.5V
VDD=3.5V
VIOV1-0.03 VIOV1
0.35
-1.8
-1.6
0.50
-1.2
-0.7
VSHORT VM voltage based on VDD
-0.6
VCHA
VDU≠VDL
-0.2
V0INH
0.9
1.8
V
INTERNAL RESISTANCE
Resistance between VM-pin and
VDD-pin
RVMD
RVMS
VDD=1.8V, VM=0V
100
40
300
100
900
160
kΩ
kΩ
Resistance between VM-pin and
VSS-pin
VDD=3.5V, VM=1.0V
OUTPUT RESISTANCE
CO-pin Resistance “H”
RCOH
RCOL
RDOH
RDOL
VCO=3.0V, VDD=3.5V, VM=0V
VCO=0.5V, VDD=4.5V, VM=0V
VDO=3.0V, VDD=3.5V, VM=0V
VDO=0.5V, VDD=VM=1.8V
5
600
5
10
2400
10
kΩ
kΩ
kΩ
kΩ
CO-pin Resistance “L”
DO-pin Resistance “H”
DO-pin Resistance “L”
5
10
DELAY TIME
Overcharge Detection Delay Time
Overdischarge Detection Delay Time
Over Current 1 Detection Delay Time
Over Current 2 Detection Delay Time
Short Circuit Detection Delay Time
tCU
tDL
0.6
70
4
1.0
125
8
1.4
180
12
s
ms
ms
ms
µs
tIOV1
tIOV2
tSHORT
VDD=3.5V
VDD=3.5V
1
2
3
10
100
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CMOS IC
OPERATION
1. Normal Condition
The UTC UB241 series monitors the voltage of the battery connected between VDD pin and VSS pin and the
voltage difference between VM pin and VSS pin to control charging and discharging. When the battery voltage is in
the range from the overdischarge detection voltage (VDL) to the overcharge detection voltage (VCU), and the VM pin
voltage is in the range from the charger detection voltage (VCHA) to the overcurrent 1 detection voltage (VIOV1), the IC
turns both the charging and discharging control FETs on. This condition is called the normal condition, and in this
condition charging and discharging can be carried out freely.
Note: When a battery is connected to the IC for the first time, discharging may not be enabled. In this case, short
the VM pin and VSS pin or connect the charger to restore the normal condition.
2. Overcurrent Condition
When a battery in the normal status is in the status where the voltage of the VM pin is equal to or higher than the
overcurrent detection voltage because the discharge current is higher than the specified value and the status lasts
for the overcurrent detection delay time, the discharge control FET is turned off and discharging is stopped. This
status is called the overcurrent status. In the overcurrent status, the VM and VSS pins are shorted by the resistor
between VM and VSS (RVMS) in the IC. However, the voltage of the VM pin is at the VDD potential due to the load as
long as the load is connected. When the load is disconnected, the VM pin returns to the VSS potential. This IC detects
the status when the impedance between the EB+ pin and EB- pin (Refer to the typical application circuit) increases
and is equal to the impedance that enables automatic restoration and the voltage at the VM pin returns to overcurrent
detection voltage 1 (VIOV1) or lower and the overcurrent status is restored to the normal status.
Note: The impedance that enables automatic restoration varies depending on the battery voltage and the set value
of overcurrent 1 detection voltage.
3. Overcharge Condition
When the battery voltage becomes higher than the overcharge detection voltage (VCU) during charging under the
normal condition and the detection continues for the overcharge detection delay time (tCU), the UTC UB241 series
turns the charging control FET off to stop charging. This condition is called the overcharge condition. The overcharge
condition is released by the following two cases:
(1) When the battery voltage falls below the overcharge release voltage (VCL), the UTC UB241 series turns the
charging control FET on and turns to the normal condition.
(2) When a load is connected and discharging starts, the UTC UB241 series turns the charging control FET on
and returns to the normal condition. Just after the load is connected and discharging starts, the discharging current
flows through the parasitic diode in the charging control FET. At this moment the VM pin potential becomes Vf, the
voltage for the parasitic diode, higher than VSS level. When the battery voltage goes under the overcharge detection
voltage (VCU) and provided that the VM pin voltage is higher than the overcurrent 1 detection voltage, the UTC
UB241 series releases the overcharge condition.
Noet 1: If the battery is charged to a voltage higher than the overcharge detection voltage (VCU) and the battery
voltage does not fall below the overcharge detection voltage (VCU) even when a heavy load is connected, the
detection of overcurrent 1, overcurrent 2 and load shortcircuiting do not function until the battery voltage falls below
over charge detection voltage (VCU). Since an actual battery has an internal impedance of several dozens of mΩ, the
battery voltage drops immediately after a heavy load that causes overcurrent is connected, and the detection of
overcurrent 1, overcurrent 2 and load short-circuiting function.
Note 2: When a charger is connected after the overcharge detection, the overcharge condition is not released
even if the battery voltage is below the overcharge release voltage (VCL). The overcharge condition is released when
the VM pin voltage goes over the charger detection voltage (VCHA) by removing the charger.
4. Overdischarge Condition
When the battery voltage falls below the overdischarge detection voltage (VDL) during discharging under the
normal condition and the detection continues for the overdischarge detection delay time (tDL), the UTC UB241 series
turns the discharging control FET off to stop discharging. This condition is called the overdischarge condition. When
the discharging control FET is turned off, the VM pin voltage is pulled up by the resistor between VM and VDD in the IC
(RVMD). When the voltage difference between the VM and VDD then is 1.2V (typ.) or lower, the current consumption is
reduced to the power-down current consumption (IPDN). This condition is called the power-down condition.
The power-down condition is released when a charger is connected and the voltage difference between the VM
and VDD becomes 1.2V (typ.) or higher. Moreover when the battery voltage becomes the overdischarge detection
voltage (VDL) or higher, the UTC UB241 series turns the discharging FET on and returns to the normal condition.
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CMOS IC
OPERATION (Cont.)
5. Charger Detection
When a battery in the overdischarge condition is connected to a charger and provided that the VM pin voltage is
lower than the charger detection voltage (VCHA), the UTC UB241 series releases the overdischarge condition and
turns the discharging control FET on when the battery voltage becomes equal to or higher than the overdischarge
detection voltage (VDL) since the charger detection function works. This action is called charger detection.
When a battery in the overdischarge condition is connected to a charger and provided that the VM pin voltage is
not lower than the charger detection voltage (VCHA), the UTC UB241 series releases the overdischarge condition
when the battery voltage reaches the overdischarge detection voltage (VDU) or higher.
6. Abnormal Charge Current Detection
If the VM pin voltage falls below the charger detection voltage (VCHA) during charging under normal condition and it
continues for the overcharge detection delay time (tCU) , the charging control FET turns off and charging stops. This
action is called the abnormal charge current detection.
Abnormal charge current detection works when the DO pin voltage is “H” and the VM pin voltage falls below the
charger detection voltage (VCHA). Consequently, if an abnormal charge current flows to an over-discharged battery,
the UTC UB241 series turns the charging control FET off and stops charging after the battery voltage becomes
higher than the overdischarge detection voltage which make the DO pin voltage “H”, and still after the overcharge
detection delay time (tCU) elapses.
Abnormal charge current detection is released when the voltage difference between VM pin and VSS pin becomes
less than charger detection voltage (VCHA).
7. Delay Circuits
The detection delay times are determined by dividing a clock of the approximately 3.5 kHz with the counter.
Note 1: The detection delay time for overcurrent 2 (tIOV2) and load short-circuiting (tSHORT) start when the
overcurrent 1 (VIOV1) is detected. When the overcurrent 2 (VIOV2) or load short-circuiting (VSHORT) is detected over the
detection delay time for each of them (= tIOV2 or tSHORT) after the detection of overcurrent 1 (VIOV1), the UTC UB241
series turns the FET off within tIOV2 or tSHORT of each detection.
Note 2: When the overcurrent is detected and continues for longer than the overdischarge detection delay time (tDL
without releasing the load, the condition changes to the power-down condition when the battery voltage falls below
the overdischarge detection voltage (VDL). When the battery voltage falls below the overdischarge detection voltage
(VDL) due to the overcurrent, the UTC UB241 series turns the discharging control FET off by the overcurrent
detection. In this case the recovery of the battery voltage is so slow that if the battery voltage after the overdischarge
detection delay time (tDL) is still lower than the over discharge detection voltage (VDL), the UTC UB241 series shifts
to the power-down condition.
)
8. 0V Battery Charge Inhibiting Function
This function inhibits the recharging when a battery that is short-circuited (0V battery) internally is connected.
When the battery voltage is the 0V battery charge inhibition battery voltage (V0INH) or lower, the charging control FET
gate is fixed to EB- pin voltage to inhibit charging. When the battery voltage is the 0V battery charge inhibition
battery voltage (V0INH) or higher, charging can be performed.
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CMOS IC
TIMING CHART
(1) Overcharge Detection, Overdischarge Detection
Charger
Load
VCU
VCL
VDU
VDL
VDD
VSS
VDD
VSS
VDD
VSHORT
VIOV2
VIOV1
VSS
VCHA
tCU
tDL
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CMOS IC
TIMING CHART (Cont.)
(2) Discharge Overcurrent Detection
Charger
Load
VCU
VCL
VDU
VDL
VDD
VSS
VDD
VSS
VDD
VSHORT
VIOV2
VIOV1
VSS
VCHA
tIOV1
tIOV2
tSHORT
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CMOS IC
TIMING CHART (Cont.)
(3) Abnormal Charge Overcurrent Detection
Charger
Load
VCU
VCL
VDU
VDL
VDD
VSS
VDD
VSS
VDD
VSHORT
VIOV2
VIOV1
VSS
VCHA
tDL
tCU
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CMOS IC
TYPICAL APPLICATION CIRCUIT
EB+
R1=100~470Ω
VDD
UTC UB241
Battery
C1=0.1µF
VM
VSS
DO
CO
R2=1kΩ
M1
M2
EB-
Notes: 1. Overdischarge detection voltage must be higher than the threshold voltage of M1 and M2, if not, the M1
may not cut the charging current. If the threshold voltage of M1 equal to or higher than the overdischarge
detection voltage is used, discharging may be stopped before overdischarge is detected.
2. Charger voltage must be higher than the withstanding voltage between the gate and source of M1 and M2,
if not, M1 and M2 may be destroyed.
3. Resistance of R1 can’t be high, the value is about from 100Ω~470Ω, If R1 has a high resistance, the
voltage between VDD pin and VSS pin may exceed the absolute maximum rating when a charger is
connected in reverse since the current flows from the charger to the IC. Insert a resistor of 100Ω or higher
as R1 for ESD protection
4. The capacitance of C1 must not be less than 0.022μF, if not, DO pin may oscillate when load
short-circuiting is detected. Be sure to connect a capacitor of 0.022μF or higher to C1, the typical value is
about 0.1μF.
5. The resistance of R2 can not be higher than 2kΩ, if not, the charging current may not be cut when a
high-voltage charger is connected.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all UTC products described or contained herein.
UTC products are not designed for use in life support appliances, devices or systems where malfunction
of these products can be reasonably expected to result in personal injury. Reproduction in whole or in
part is prohibited without the prior written consent of the copyright owner. UTC reserves the right to
make changes to information published in this document, including without limitation specifications and
product descriptions, at any time and without notice. This document supersedes and replaces all
information supplied prior to the publication hereof.
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