UC3837LG-AG6-R [UTC]
LOW COST POWER-SAVING MODE PWM CONTROLLER;型号: | UC3837LG-AG6-R |
厂家: | Unisonic Technologies |
描述: | LOW COST POWER-SAVING MODE PWM CONTROLLER |
文件: | 总11页 (文件大小:332K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
UC3837L
CMOS IC
LOW COST POWER-SAVING
MODE PWM CONTROLLER
FOR FLYBACK
4
CONVEBNOERS
5
6
3
2
1
DESCRIPTION
The UTC UC3837L is a high performance current mode PWM
SOT-26
controller ideally suited for low standby power. Low VDD startup
current make the power reliable on startup design and a large
value resistor could be used in the startup circuit to minimize the
standby power. At no load condition, the IC operates in
power-saving mode for lower standby power, decreasing frequency
for Higher conversion efficiency at light load condition.
The UTC UC3837L contains protection with automatic recovery
including OLP (over load protection), OCP (cycle-by-cycle current
limiting), and UVLO (VDD over voltage clamp and under voltage
lockout). It also provides the protections including OTP (over
temperature protection), OVP (over voltage protection) in UTC
UC3837L with latched shut down. To protect the power MOSFET,
Gate-drive output is fixed up to 16V max.
The internal slope compensation improves system stability at
high PWM duty cycle output. Leading-edge blanking on current
sense input removes the signal glitch, which offering minimal
external component count in the design. Excellent EMI
performance is achieved with UTC proprietary frequency hopping
technique (ZL201020615247.1) together with soft driver control.
Audio noise is eliminated due to switch frequency more than 20kHz
during operation.
The UTC UC3837L has such applications as: battery charger,
power adaptor, set-top box power supplies, ink jet printers,
open-frame SMPS.
FEATURES
* UTC proprietary frequency hopping technology for Improved EMI * Programming BNO/Line OVP for higher
performance.
security
* Power-saving mode for high light-load and standby efficiency
* Soft Start
* Dynamic peak current limiting for constant output power
* Built-in synchronized slope compensation
* OLP with automatic recovery
* Fixed switch frequency 65kHz
* Gate output voltage clamped at 16V
* Low start-up current
* Cycle-by-cycle current limiting
* Under voltage lockout (UVLO)
* Few external components required
* OTP and OVP ( in UTC UC3837L with latch shut down)
* VDD clamp for higher security
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UC3837L
CMOS IC
ORDERING INFORMATION
Ordering Number
UC3837LG-AG6-R
Package
SOT-26
Packing
Tape Reel
UC3837LG-AG6-R
(1)Packing Type
(1) R: Tape Reel
(2) AG6: SOT-26
(2)Package Type
(3)Green Package
(3) G: Halogen Free and Lead Freee
MARKING
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UC3837L
CMOS IC
PIN CONFIGURATION
PIN DESCRIPTION
PIN NO.
PIN NAME
GND
DESCRIPTION
1
Ground.
Feedback input pin. The PWM duty cycle is determined by voltage level into this pin
and SENSE pin input.
2
FB
3
4
5
6
BNO
SENSE
VDD
Line input voltage brown out protection.
Current sense input pin. Connected to MOSFET current sensing resistor node.
Power supply.
GATE
The totem-pole output driver for driving the power MOSFET.
BLOCK DIAGRAM
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UC3837L
CMOS IC
ABSOLUTE MAXIMUM RATING (VDD=15V, TA=25°C, unless otherwise specified)
PARAMETER
SYMBOL
VDD
RATINGS
30
UNIT
V
Supply Voltage
Input Voltage to FB Pin
Input Voltage to CS Pin
Junction Temperature
Operating Temperature
Storage Temperature
VFB
-0.3 ~ 7
-0.3 ~ 7
+150
V
VSENSE
TJ
V
C
°C
C
TOPR
TSTG
-40 ~ +125
-50 ~ +150
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
OPERATING RANGE
PARAMETER
SYMBOL
VDD
RATINGS
10 ~ 24
UNIT
V
Supply Voltage
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UC3837L
CMOS IC
ELECTRICAL CHARACTERISTICS (VDD=15V, TA=25°C, unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
Supply Section
Start Up Current
ISTR
IOP
VDD=VDD(ON)-0.5V
VFB=3.5V
2
15
2.5
32
μA
mA
V
IC Operating Current
1.5
30
4.6
VCC Zener Clamp Voltage
Latch Release Threshold
Under-Voltage Lockout Section
Start Threshold Voltage
Min. Operating Voltage
Control Section
VCC (clamp) IVCC=20mA
28
VTH_LATCH UTC UC3837L
V
VTHD (ON)
VDD (MIN)
18
20
8
22
V
V
6.5
9.5
VFB Open Loop Voltage Level
PWM Input Gain
VFB-OPEN
5.4
3
V
V/V
V
AVCS
∆VFB/∆VCS
Burst-Mode Out FB Voltage
Burst-Mode Enter FB Voltage
VFB (OUT) VSENSE=0
1.8
1.6
65
VFB (IN)
FSW
VSENSE=0
V
Normal
Switch Frequency
VFB=3.5V
60
20
70
-9
70
KHz
KHz
%
Power-Saving
Before enter burst mode
VFB=3.5V, VSENSE=0
Duty Cycle
DMAX
FJ (SW)
FDV
80
90
+9
10
10
Frequency Hopping
%
Frequency VDD Stability
VDD=12V~20V
T=-40~110°C
%
Frequency Temperature Stability
Protection Section
FDT
%
VCC Over Voltage Protection Threshold
FB PIN Over Load Protection Threshold
Over Load Protection Delay-Time
OTP Threshold
VOVP
VOLP
TDelay
T(THR)
TSS
VFB=3.9V
25
60
27
4.2
88
29
V
V
120
mS
°C
mS
140
5
Soft Start Time
Current Limiting Section
Peak Current Flat Threshold Voltage
Peak Current Valley Threshold Voltage
Lead Edge Blanking Time
Driver Output Section
VCS-F
VCS-V
TLEB
VFB=3.9V, Duty≥60%
0.92
V
V
VFB=3.9V, Duty=0%
0.68 0.74 0.8
200 350 550
ns
Output Voltage Low State
Output Voltage High State
Output Voltage Rise Time
Output Voltage Fall Time
BNO Section
VOL
VOH
tR
VDD=15V, IO=-20mA
VDD=15V, IO=20mA
CL=1.0nF
0.8
V
V
11
100
60
ns
ns
tF
CL=1.0nF
Brown Out Threshold Of Line Voltage
Threshold Voltage For Line Voltage OVP
BNO input Resistor
VBNO
VTH OVP
RIN
0.24 0.28 0.31
V
V
0.9
1
1.1
100
kΩ
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UC3837L
CMOS IC
OPERATION DESCRIPTION
The UTC UC3837L devices integrate many useful designs into one controller for low-power switch-mode power
supplies. The following descriptions highlight some of the features of the UTC UC3837L series.
Start-up Current
The start-up current is only 2.5μA. Low start-up current allows a start-up resistor with a high resistance and a
low-wattage to supply the start-up power for the controller. For AC/DC adaptor with universal input range design, a
2.5~3Mꢀ, 1/8W startup resistor could be used together with a VDD capacitor to provide a fast startup and low power
dissipation solution.
Power-Saving Mode Operation
The proprietary Power-Saving Mode function provides linearly decreasing the switching frequency under light-load
conditions for higher efficiency. The feedback voltage, which is sampled from the voltage feedback loop, is taken as
the reference. Once the feedback voltage dropped below the threshold voltage, the switching frequency starts to
decrease. This Power-Saving Mode function dramatically reduces power consumption under light-load conditions.
The 20KHz minimum frequency control also eliminates the audio noise at any loading conditions.
At zero load condition, the magnitude of power loss is in proportion to the number of switching events within a
fixed period of time. Reducing switching events leads to the reduction on the power loss and thus conserves the
energy. The UTC UC3837L ter burst mode at standby condition to minimize the switching loss and reduces the
standby power consumption. Power supplies using the UTC UC3837L can easily meet even the strictest regulations
regarding standby power consumption.
Switch Frequency Set
The maximum switch frequency is fixed to 65KHz. Switch frequency is modulated by output power POUT during IC
operating. At no load or light load condition, most of the power dissipation in a switching mode power supply is from
switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the snubber circuit. The
magnitude of power loss is in proportion to the number of switching events within a fixed period of time. So lower
switch frequency at lower load, which more and more improve IC’s efficiency at light load. At from no load to light
load condition, The IC will operate at from Burst mode to Reducing Frequency Mode. The relation curve between
F
SW and POUT/POUT (MAX) as followed Fig.1.
Fig.1 The relation Curve Between Fsw And Relative Output Power POUT/ POUT (MAX)
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UC3837L
CMOS IC
OPERATION DESCRIPTION (Cont.)
Frequency Hopping For EMI Improvement
The Frequency hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator is to
set the normal switching frequency; the switching frequency is modulated with a period signal generated by the 2nd
oscillator. The relation between the first oscillator and the 2nd oscillator as followed Fig.2. So the tone energy is
evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design
in meeting stringent EMI requirement.
Built-in Slope Compensation
Built-in slope compensation circuit greatly improves the close loop stability at CCM and prevents the sub-harmonic
oscillation.
Leading-Edge Blanking
Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense-resistor. To avoid
premature termination of the switching pulse, a 400ns leading-edge blanking time is built in. Conventional RC
filtering can therefore be omitted. During this blanking period, the current-limit comparator is disabled and it cannot
switch off the gate driver.
Constant Output Power Limit
When the SENSE voltage, across the sense resistor RS, reaches the threshold voltage, around VCS-V, the output
GATE drive will be turned off after a small propagation delay tD. This propagation delay will introduce an additional
current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage
VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher
than that under low input line voltage. To compensate this variation for wide AC input range, the threshold voltage is
adjusted by the VIN current. Since VIN pin is connected to the rectified input line voltage through a resistor RVIN, a
higher line voltage will generate higher VIN current into the VIN pin. The threshold voltage is decreased if the VIN
current is increased. Smaller threshold voltage, forces the output GATE drive to terminate earlier, thus reduce the
total PWM turn-on time and make the output power equal to that of low line input. This proprietary internal
compensation ensures a constant output power limit for wide AC input voltage from 90VAC to 264VAC.
Under Voltage Lockout (UVLO)
The turn-on and turn-off thresholds of the UTC UC3837L are fixed internally at VTHD(ON)/VDD(MIN) During start-up,
the hold-up capacitor must be charged to VTHD(ON) through the start-up resistor, so that the UTC UC3837L will be
enabled. The hold-up capacitor will continue to supply VDD until power can be delivered from the auxiliary winding of
the main transformer. VDD must not drop below VDD (MIN) during this start-up process. This UVLO hysteresis window
ensures that hold-up capacitor will be adequate to supply VDD during start-up.
Gate Output
The UTC UC3837L output stage is a fast totem pole gate driver. Cross conduction has been avoided to minimize
heat dissipation, increase efficiency, and enhance reliability. A good tradeoff is achieved through dead time control.
The low idle loss and good EMI system design is easier to achieve with this dedicated control scheme. An internal
16V clamp is added for MOSFET gate protection at higher than expected VDD input.
Protection Controls
The IC takes on more protection functions such as OVP, OLP and OTP etc. In case of those failure modes for
continual blanking time, the driver is shut down. Driver is reset after failure is eliminated.
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UC3837L
CMOS IC
OPERATION DESCRIPTION (Cont.)
OVP
The OVP will shut down the switching of the power MOSFET whenever VDD>VOVP. The OVP event as followed
Fig.3.
OLP
OLP will shut down driver when VFB>VOLP for continual a blanking time. The OLP event as followed Fig.4.
OTP
OTP will shut down driver when the IC temperature TJ>T (THR)
.
PCB Layout Note
Noise from the current sense or the control signal can cause significant pulse width jitter in continuous-conduction
mode, and slope compensation helps alleviate these problems. Good placement and layout practices should be
followed. Avoiding long PCB traces and component leads, locating compensation and filter components near the
UTC UC3837L, and increasing the power MOS gate resistance is advised.
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UC3837L
CMOS IC
TYPICAL APPLICATION CIRCUIT (19V / 2.05A)
BOM
Reference
F1
Component
2A/250V
Reference
C1, C3
C7
Component
1nF/1KV X7R SMD
0.1uF/50V X7R SMD
68pF/50V X7R SMD
1nF/50V X7R SMD
IC , PWM controller UC3837L
SOT-26
FL1, FL2
CX1
Choke
0.33uF/275V
2A/600V
C11
BD1
C6, C12
C2
EC 33uF/400V 105°C ±20%
U1
C10
Q1
EC 10uF/50V 105°C ±20%
MOSFET, 10A/650V
RM-8
D4
D3
D1
U3
1N4148, 0.15A/75V, SMD
BAV20WG, 1A/200V, SOD-123
1N4007, 1A/1000V, SMA
IC, TL431
T1
CY1
Y1, 1000pF/400V, 105°C, ±20%
IC, Opto-Coupler, LTV-357-T-C,
SMD
D5
Schottky, 20A/100V
U4
C41, C43
L1
EC 680uF/25V, 105°C, ±20%
Choke
R40
R41
R42
R43
R45
R46
C45
C46
C40
C42
R47
C5
47ꢀ SMD
820ꢀ SMD
R1, R2
R6, R23
R20
1.5M SMD
1.5M SMD
1.8ꢀ SMD
1.5ꢀ SMD
2.2ꢀ SMD
180K SMD
1K SMD
2.2K SMD
680ꢀ SMD
68K SMD
R21, R22
R13
10K SMD
10nF/50V, X7R, SMD
0.1uF/50V, X7R, SMD
100pF/1KV, NPO, SMD
N.C
R7, R8
R18
R15
10ꢀ SMD
R16
47ꢀ SMD
N.C
R17
10K SMD
N.C
R3, R5
20M SMD
R12
RT1
N.C
N.C
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UC3837L
CMOS IC
TYPICAL APPLICATION CIRCUIT
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UC3837L
CMOS IC
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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