UC3842AL-S08-T [UTC]
CURRENT MODE PWM CONTROL CIRCUITS; 电流模式PWM控制电路型号: | UC3842AL-S08-T |
厂家: | Unisonic Technologies |
描述: | CURRENT MODE PWM CONTROL CIRCUITS |
文件: | 总9页 (文件大小:97K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
CURRENT MODE PWM
CONTROL CIRCUITS
SOP-8
ꢀ
DESCRIPTION
The UTC UC3842A/3843A provide the necessary functions to
implement off-line or DC to DC fixed frequency current mode ,
controlled switching circuits with minimal external components.
ꢀ
FEATURES
*Low start up current ( Typical 0.12mA )
*Automatic feed forward compensation
*Pulse-by-Pulse current limiting
DIP-8
*Under-voltage lockout with hysteresis
*Double pulse Suppression
*High current totem pole output to drive MOSFET directly
*Internally trimmed band gap reference
*500kHz operation
*Pb-free plating product number: UC3842AL
UC3843AL
ꢀ
ORDERING INFORMATION
Ordering Number
Package
Packing
Normal
Lead Free Plating
UC3842A-D08-T
UC3842A-S08-R
UC3842A-S08-T
UC3843A-D08-T
UC3843A-S08-R
UC3843A-S08-T
UC3842AL-D08-T
UC3842AL-S08-R
UC3842AL-S08-T
UC3843AL-D08-T
UC3843AL-S08-R
UC3843AL-S08-T
DIP-8
SOP-8
SOP-8
DIP-8
Tube
Tape Reel
Tube
Tube
SOP-8
SOP-8
Tape Reel
Tube
UC3842AL-D08-T
(1)Packing Type
(2)Package Type
(3)Lead Plating
(1) T: Tube, R: Tape Reel
(2) D08: DIP-8, S08: SOP-8
(3) L: Lead Free Plating, Blank: Pb/Sn
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
ꢀ
PIN CONFIGURATION
V
REF
COMP
1
2
3
4
8
7
6
5
V
CC
VFB
Current Sense
RT/CT
Output
GND
ꢀ
BLOCK DIAGRAM
7
5
7
Vcc
GND
Vcc
VREF
8
5V REF
S/R
Internal
Bias
U.V.L.O
V
REF
Good
Logic
1/2VREF
CURRENT
SENSE
1/3VREF
COMPARATOR
VFB
2
1
3
R
1V
ERROR
AMPLIFIER
PWM
LATCH
6
5
OUTPUT
GND
COMP
S
CURRENT SENSE
RT/CT
4
OSCILLATOR
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
ꢀ
ABSOLUTE MAXIMUM RATINGS (Ta=25
℃)
PARAMETER
SYMBOL
VCC
RATINGS
30
UNIT
Supply Voltage(Low Impedance Source)
Supply Voltage(ICC<30mA)
V
V
A
VCC
Self Limiting
±1
Output Current ( Peak )
IO(PEAK)
Output Energy (capacity Load)
Analog Inputs(pin 2,3)
5
-0.3 ~ +6.3
10
µJ
V
VI(ANA)
Error Amplifier Output Sink Current
ISINK(EA)
mA
W
DIP-8
1.0
Power Dissipation( Ta≦25°C)
PD
SOP-8
0.5
W
Derated at Ta>25
°
C
PD
TJ
8
mW/°C
Junction Temperature
Storage Temperature
+150
-65 ~ +150
°
°
C
C
TSTG
Note Absolute maximum ratings are those values beyond which the device which the device could be permanently
damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied.
ꢀ
ELECTRICAL CHARACTERISTICS
(0°
C≦
T
a≦70°C, VCC=15V, RT=10kΩ, CT=3.3nF, unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
4.9
TYP MAX UNIT
Reference Section
Output Voltage
VREF
TJ=25
°
C,IOUT=1mA
VIN25V
5
6
5.1
20
25
V
12≦
Line Regulation
Load Regulation
Temperature Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Output Short Circuit
Oscillator Section
Initial Accuracy
∆
∆
VREF
VREF
mV
mV
1
≦IOUT=20mA
6
(Note 1)
0.2
0.4 mV/°C
Line, Load, Temp(Note 1)
4.82
5.18
V
10Hz
≦
f
≦
10kHz,TJ=25°C (Note 1)
Vosc
ISC
f
50
5
µV
mV
mA
Ta=25
°
C,1000Hrs(Note 1)
25
-30
47
-100 -180
TJ=25
12 VCC
Tmin Ta
°
C
52
0.2
5
57
1
kHz
%
≦
≦
25V
Voltage Stability
Temperature Stability
Amplitude
∆f/∆Vcc
≦
≦Tmax(Note 1)
%
Vosc
Vpin 4 peak to peak
1.7
V
Error Amplifier Section
Input Voltage
VI(EA)
Vpin 1=2.5V
2.42
2.50
-0.3
90
1
2.58
-2
V
Input Bias Current
AVOL
II(BIAS)
µA
2
≦
VOUT
TJ=25 C (Note 1)
I2 VCC 25V
≦4V
60
0.7
60
2
dB
MHz
dB
mA
mA
V
Unity Gain Bandwidth
PSRR
°
≦
≦
70
6
Output Sink Current
Output Source Current
VOUT High
IO(SINK) Vpin 2=2.7V,Vpin 1=1.1V
IO(SOURCE) Vpin 2=2.3V,Vpin 1=5V
-0.5
5
-0.8
6
VOH
VOL
Vpin 2=2.3V, RL=15k
Ω to GND
VOUT Low
Vpin 2=2.7V,Vpin 1=1.1V
0.7
1.1
V
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
ꢀ
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP MAX UNIT
Current Sense section
Gain
GV
(Note 2,3)
2.85
0.9
3
1
3.15
1.1
V/V
V
Maximum Input signal
PSRR
VI(MAX) Vpin 1=5V( Note 2)
12 VCC 25V
≦
≦
70
-2
dB
Input Bias Current
Delay to Output
Output Section
IBIAS
-10
µA
ns
Vpin 3=0 to 2V
150
300
IO(SINK)=20mA
0.1
1.5
13.5
13.5
50
0.4
2.2
V
V
Low
VOL
VOH
IO(SINK)=200mA
IO(SOURCE)=20mA
IO(SOURCE)=200mA
Output Level
13
12
V
High
V
Rise Time
Fall Time
tR
tF
TJ=25
°
°
C,CL=1nF(Note 1)
C,CL=1nF(Note 1)
150
150
ns
ns
TJ=25
50
Under-Voltage Lockout Output Section
3842A
14.5
7.8
8.5
7
16
8.4
10
17.5
9
V
V
V
V
Start Threshold
VTH(ST)
3843A
3842A
3843A
11.5
8.2
Min. Operating Voltage
PWM Section
VOPR(MIN) After Turn On
7.6
MAX
Min
D(MAX)
D(MIN)
95
97
100
0
%
%
Duty Cycle
Total Standby Current
Start-up Current
IST
0.12
11
0.3
17
mA
mA
V
Operating Supply Current
VCC Zener Voltage
ICC(OPR) Vpin 2=Vpin 3=0V
Vz
ICC=25mA
34
Note:1.These parameters, although guaranteed ,are not 100% tested in production.
2. Parameters measured at trip point of latch with Vpin 2=0.
3. Gain defined as:
∆Vpin 1
A=
; 0
≦
Vpin3 0.8V
≦
∆Vpin 3
4. Adjust VCC above the start threshold before setting at 15V.
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
ꢀ
OPEN-LOOP LABORATORY TEST FIXTURE
VREF
RT
1
8
7
6
5
A
Vcc
Error
Amp
Adjust
2
3
4
1kΩ
/ 1W
OUTPUT
5kΩ
CT
High peak current associated with capacity loads necessitate careful grounding techniques. Timing and bypass
capacitors should be connected close to pin 5 in single point GND. The transistor and 5k
to sample the oscillator waveform and apply an adjustable Ramp to Pin 3.
Ω potentio-meter are used
ꢀ
UNDER-VOLTAGE LOCKOUT
Icc
Vcc
<15mA
ON/OFF Command
to rest of IC
7
Von=16V
Voff=10V
<1mA
Voff
Von
Vcc
During Under-Voltage Lockout, the output driver is biased to a high impedance state. Pin 6 should be shunt to
GND with a bleeder resistor to prevent activating the power switch with output leakage currents.
ꢀ
ERROR AMPLIFIER CONFIGURATION
2.5V
0.5mA
Zi
2
1
Zf
Error amplifier can source or sink up to 0.5mA
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
ꢀ
CURRENT SENSE CIRCUIT
Error Amplifier
2R
Is
R
1V
1
3
Current Sense Comparator
R
Rs
C
5
Peak current (Is) determined by the formula: Ismax=10V/Rs.
A small RC filter be required to suppress switch transients.
ꢀ
SLOPE COMPENSATION
8
4
3
RT
CT
Isense
R1
R2
Rsense
C
A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope
compensation for converts requiring duty cycles over 50%.Note that capacitor C, forms a filter with R2 to suppress
the leading edge switch spikes.
ꢀ
OSCILLATOR SECTION
V4
Large RT
Small CT
8
4
5
INTERNAL CLOCK
V4
RT
CT
Small RT
Large CT
INTERNAL CLOCK
Dead time vs. CT(RT>5k
Ω)
Timing Resistance vs. Frequency
100
10
100
10
1
CT=2.2nF
CT=4.7nF
CT=10nF
CT=22nF
1
CT=47nF
CT=100nF
0.1
1
10
CT (nF)
100
2
3
4
6
10
5
10
10
10
Frequency (Hz)
10
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
ꢀ
SHUTDOWN TECHNIQUES
1kΩ
1
8
3
Shutdown
Shutdown
To current
Sense resistor
Shutdown UTC UC3842A can be accomplished by two methods; either raise pin 3 above 1V or pull Pin 1 below a
voltage two diode drops above ground. Either method caused the output of PWM comparator to be high(refer to
block diagram).The PWM latch is reset dominant so that the output will remain low until the next clock cycle after the
shutdown condition at pins 1 and/or 3 is removed . In one example, an externally latched shut –down may be
accomplished by adding an SCR which be reset by cycling VCC below the lower UVLO threshold. At this point the
reference turns off allowing the SCR to reset
.
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
ꢀ
TYPICAL CHARACTERISTICS
Output Saturation Characteristics
4
Error Amplifier Open-Loop Frequency Response
100
Vcc=15V
Ta=+25℃
Ta=-40℃
80
60
40
20
0
0
3
2
1
0
-45
-90
-135
-180
0.01
0.1
Output Current
(Sourse or Sink Current) (A)
1
7
2
3
4
5
6
10
10 10 10
10 10
10
Frequency (Hz)
Istart Temperature Drift
Vcc=9V
V
REF Temperature Drift
Vcc=15V
5.02
5.01
550
500
I
OUT=1mA
5.00
4.99
450
400
4.98
350
4.97
4.96
300
250
-50 -25 0 25 50 75 100 125 150
-50 -25 0 25 50 75 100 125 150
Temperature (℃)
Temperature (℃)
Icc Temperature Drift
Vcc=15V
15
14
IOUT=1mA
13
12
11
10
9
-50 -25
0
25 50 75 100 125 150
Temperature (℃)
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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