UC3842A_11 [UTC]
CURRENT MODE PWM CONTROL CIRCUITS; 电流模式PWM控制电路型号: | UC3842A_11 |
厂家: | Unisonic Technologies |
描述: | CURRENT MODE PWM CONTROL CIRCUITS |
文件: | 总9页 (文件大小:270K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
CURRENT MODE PWM
CONTROL CIRCUITS
DESCRIPTION
The UTC UC3842A/3843A provide the necessary functions to
implement off-line or DC to DC fixed frequency current mode ,
controlled switching circuits with minimal external components.
FEATURES
*Low Start Up Current ( Typical 0.12mA )
*Automatic Feed Forward Compensation
*Pulse-by-Pulse Current Limiting
*Under-voltage Lockout with Hysteresis
*Double Pulse Suppression
*High Current Totem Pole Output to Drive MOSFET Directly
*Internally Trimmed Band Gap Reference
*500kHz Operation
ORDERING INFORMATION
Ordering Number
Lead Free
Package
Packing
Halogen Free
UC3842AL-D08-T
UC3842AL-S08-R
UC3842AL-S08-T
UC3843AL-D08-T
UC3843AL-S08-R
UC3843AL-S08-T
UC3842AP-D08-T
UC3842AP-S08-R
UC3842AP-S08-T
UC3843AP-D08-T
UC3843AP-S08-R
UC3843AP-S08-T
DIP-8
SOP-8
SOP-8
DIP-8
Tube
Tape Reel
Tube
Tube
SOP-8
SOP-8
Tape Reel
Tube
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Copyright © 2011 Unisonic Technologies Co., Ltd
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
PIN CONFIGURATION
VREF
VCC
COMP
VFB
1
2
3
4
8
7
6
5
Current Sense
RT/CT
Output
GND
BLOCK DIAGRAM
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS (Ta=25℃, unless otherwise specified)
PARAMETER
SYMBOL
VCC
RATINGS
30
UNIT
V
Supply Voltage(Low Impedance Source)
Supply Voltage(ICC<30mA)
VCC
Self Limiting
-0.3 ~ +6.3
±1
V
Analog Inputs(pin 2,3)
VI(ANA)
IO(PEAK)
ISINK(EA)
V
Output Current ( Peak )
A
Error Amplifier Output Sink Current
Output Energy (capacity Load)
10
mA
μJ
W
5
1.0
DIP-8
Power Dissipation( Ta≦25°C)
PD
SOP-8
Derated at Ta>25°C
0.5
W
8
mW/°C
°C
°C
Junction Temperature
TJ
+150
-65 ~ +150
Storage Temperature
TSTG
Note Absolute maximum ratings are those values beyond which the device which the device could be permanently
damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied.
ELECTRICAL CHARACTERISTICS
(0°C≦Ta≦70°C, VCC=15V, RT=10kΩ, CT=3.3nF, unless otherwise specified)
PARAMETER
Reference Section
SYMBOL
TEST CONDITIONS
MIN
4.9
TYP MAX UNIT
Output Voltage
VREF
ΔVREF
ΔVREF
TJ=25°C,IOUT=1mA
12≦VIN25V
5
6
5.1
20
25
V
Line Regulation
Load Regulation
Temperature Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Output Short Circuit
Oscillator Section
Initial Accuracy
mV
mV
1≦IOUT=20mA
6
(Note 1)
0.2
0.4 mV/°C
Line, Load, Temp(Note 1)
10Hz≦f≦10kHz,TJ=25°C (Note 1)
4.82
5.18
V
VOSC
ISC
50
5
μV
mV
mA
Ta=25°C,1000Hrs(Note 1)
25
-30
47
-100
-180
f
TJ=25°C
12≦VCC≦25V
52
0.2
5
57
1
kHz
%
Voltage Stability
Temperature Stability
Amplitude
Δf/ΔVcc
Tmin≦Ta≦Tmax(Note 1)
Vpin 4 peak to peak
%
Vosc
1.7
V
Error Amplifier Section
Input Voltage
VI(EA)
Vpin 1=2.5V
2.42
2.50
-0.3
90
1
2.58
-2
V
μA
dB
MHz
dB
mA
mA
V
Input Bias Current
AVOL
II(BIAS)
2 ≦VOUT≦4V
60
0.7
60
2
Unity Gain Bandwidth
PSRR
TJ=25°C (Note 1)
I2≦VCC≦25V
70
6
Output Sink Current
Output Source Current
VOUT High
IO(SINK)
Vpin 2=2.7V,Vpin 1=1.1V
IO(SOURCE) Vpin 2=2.3V,Vpin 1=5V
-0.5
5
-0.8
6
VOH
VOL
Vpin 2=2.3V, RL=15kΩ to GND
Vpin 2=2.7V,Vpin 1=1.1V
VOUT Low
0.7
1.1
V
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP MAX UNIT
Current Sense section
Gain
GV
(Note 2,3)
2.85
0.9
3
1
3.15
1.1
V/V
V
Maximum Input signal
PSRR
VI(MAX) Vpin 1=5V( Note 2)
12≦VCC≦25V
IBIAS
70
-2
dB
μA
ns
Input Bias Current
Delay to Output
Output Section
-10
Vpin 3=0 to 2V
150
300
IO(SINK)=20mA
VOL
0.1
1.5
13.5
13.5
50
0.4
2.2
V
V
Low
IO(SINK)=200mA
Output Level
IO(SOURCE)=20mA
VOH
13
12
V
High
IO(SOURCE)=200mA
V
Rise Time
Fall Time
tR
tF
TJ=25°C,CL=1nF(Note 1)
TJ=25°C,CL=1nF(Note 1)
150
150
ns
ns
50
Under-Voltage Lockout Output Section
3842A
14.5
7.8
8.5
7
16
8.4
10
17.5
9
V
V
V
V
Start Threshold
VTH(ST)
3843A
3842A
3843A
11.5
8.2
Min. Operating Voltage
PWM Section
VOPR(MIN) After Turn On
7.6
MAX
Min
D(MAX)
D(MIN)
95
97
100
0
%
%
Duty Cycle
Total Standby Current
Start-up Current
IST
0.12
11
0.3
17
mA
mA
V
Operating Supply Current
VCC Zener Voltage
ICC(OPR) Vpin 2=Vpin 3=0V
Vz
ICC=25mA
34
Note:1.These parameters, although guaranteed ,are not 100% tested in production.
2. Parameters measured at trip point of latch with Vpin 2=0.
3. Gain defined as:
4. Adjust VCC above the start threshold before setting at 15V.
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
OPEN-LOOP LABORATORY TEST FIXTURE
High peak current associated with capacity loads necessitate careful grounding techniques. Timing and bypass
capacitors should be connected close to pin 5 in single point GND. The transistor and 5kΩ potentio-meter are used
to sample the oscillator waveform and apply an adjustable Ramp to Pin 3.
UNDER-VOLTAGE LOCKOUT
During Under-Voltage Lockout, the output driver is biased to a high impedance state. Pin 6 should be shunt to
GND with a bleeder resistor to prevent activating the power switch with output leakage currents.
ERROR AMPLIFIER CONFIGURATION
2.5V
0.5mA
Zi
2
1
Zf
Error amplifier can source or sink up to 0.5mA
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
CURRENT SENSE CIRCUIT
Error Amplifier
2R
Is
R
1V
1
3
Current Sense Comparator
R
Rs
C
5
Peak current (Is) determined by the formula: Ismax=1.0V/Rs.
A small RC filter be required to suppress switch transients.
SLOPE COMPENSATION
A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope
compensation for converts requiring duty cycles over 50%.Note that capacitor C, forms a filter with R2 to suppress
the leading edge switch spikes.
OSCILLATOR SECTION
Dead time vs. CT(RT>5kΩ)
Timing Resistance vs. Frequency
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
SHUTDOWN TECHNIQUES
1kΩ
1
8
3
Shutdown
Shutdown
To current
Sense resistor
Shutdown UTC UC3842A can be accomplished by two methods; either raise pin 3 above 1V or pull Pin 1 below a
voltage two diode drops above ground. Either method caused the output of PWM comparator to be high(refer to
block diagram).The PWM latch is reset dominant so that the output will remain low until the next clock cycle after the
shutdown condition at pins 1 and/or 3 is removed . In one example, an externally latched shut –down may be
accomplished by adding an SCR which be reset by cycling VCC below the lower UVLO threshold. At this point the
reference turns off allowing the SCR to reset.
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS
Output Saturation Characteristics
Error Amplifier Open-Loop Frequency Response
Istart Temperature Drift
550
VREF Temperature Drift
5.02
5.01
500
Vcc=15V
IOUT=1mA
Vcc=9V
5.00
4.99
450
400
4.98
350
300
4.97
4.96
250
-50 -25 0 25 50 75 100 125 150
-50 -25 0 25 50 75 100 125 150
Temperature (℃)
Temperature (℃)
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UC3842A/3843A
LINEAR INTEGRATED CIRCUIT
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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