UC3873A [UTC]
LOW COST POWER-SAVING MODE PWM CONTROLLER;
| 型号： | UC3873A |
| 厂家： | 
Unisonic Technologies |
| 描述： | LOW COST POWER-SAVING MODE PWM CONTROLLER |
| 文件： | 总10页 (文件大小：309K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
UC3873A
LINEAR INTEGRATED CIRCUIT
LOW COST POWER-SAVING
MODE PWM CONTROLLER
FOR FLYBACK CONVERTERS
DESCRIPTION
The UTC UC3873A is a high performance current mode PWM
controller ideally suited for low standby power. Low VDD startup
current make the power reliable on startup design and a large
value resistor could be used in the startup circuit to minimize the
standby power. At no load condition, the IC operates in
power-saving mode for lower standby power, decreasing frequency
for Higher conversion efficiency at light load condition.
The UTC UC3873A contains protection with automatic recovery
including OLP (over load protection), OCP (cycle-by-cycle current
limiting), and UVLO (VDD over voltage clamp and under voltage
lockout). It also provides the protections including OTP (over
temperature protection), OVP (over voltage protection) in UTC
UC3873A with automatic recovery. To protect the power MOSFET,
Gate-drive output is fixed up to 16V max.
The internal slope compensation improves system stability at high PWM duty cycle output. Leading-edge
blanking on current sense input removes the signal glitch, which offering minimal external component count in the
design. Excellent EMI performance is achieved with UTC proprietary frequency hopping technique
(ZL201020615247.1) together with soft driver control. Audio noise is eliminated due to switch frequency more than
20kHz during operation.
The UTC UC3873A has such applications as: battery charger, power adaptor, set-top box power supplies, ink jet
printers, open-frame SMPS.
FEATURES
* UTC proprietary frequency hopping technology for Improved EMI * VDD clamp for higher security
performance.
* Programming OTP for higher security
* Fixed switch frequency 65kHz
* Gate output voltage clamped at 16V
* Low start-up current
* Cycle-by-cycle current limiting
* Under voltage lockout (UVLO)
* Few external components required
* Power-saving mode for high light-load and standby efficiency
* Soft Start
* Dynamic peak current limiting for constant output power
* Built-in synchronized slope compensation
* OLP with automatic recovery
* OTP and OVP( automatic recovery)
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QW-R103-134.B
UC3873A
LINEAR INTEGRATED CIRCUIT
ORDERING INFORMATION
Ordering Number
Package
SOT-26
Packing
Lead Free
Halogen Free
UC3873AL-AG6-R
UC3873AG-AG6-R
Tape Reel
MARKING
PIN CONFIGURATION
PIN DESCRIPTION
PIN NO.
PIN NAME PIN TYPE
DESCRIPTION
1
2
3
4
GND
P
Ground.
Feedback input pin. The PWM duty cycle is determined by voltage level
into this pin and SENSE pin input.
FB
I
RT
I
Connected through a NTC resistor to GND for OTP.
Current sense input pin. Connected to MOSFET current sensing resistor
node.
SENSE
I
5
6
VDD
P
Power supply.
GATE
O
The totem-pole output driver for driving the power MOSFET.
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UC3873A
LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM
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UC3873A
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS (TA=25°C, VDD =15V, unless otherwise specified)
PARAMETER
SYMBOL
VDD
RATINGS
35
UNIT
V
Supply Voltage
Input Voltage to FB Pin
Input Voltage to CS Pin
Junction Temperature
Operating Temperature
Storage Temperature
VFB
-0.3 ~ 7
-0.3 ~ 7
+150
V
VSENSE
TJ
V
C
°C
C
TOPR
TSTG
-40 ~ +125
-50 ~ +150
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
OPERATING RANGE
PARAMETER
SYMBOL
VDD
RATINGS
10 ~ 24
UNIT
V
Supply Voltage
ELECTRICAL CHARACTERISTICS (TA=25°C, VDD=15V，unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNIT
SUPPLY SECTION
Start Up Current
ISTR
IOP
VDD = VDD(ON)-0.5V
VFB=3.5V
2
15
1.8
35
μA
mA
V
IC Operating Current
0.8
33
VCC Zener Clamp Voltage
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold Voltage
Min. Operating Voltage
CONTROL SECTION
VCC(clamp)
IVCC=20mA
31
VTHD(ON)
VDD(MIN)
16
6
18
7
20
8
V
V
VFB Open Loop Voltage Level
PWM Input Gain
VFB-OPEN
AVCS
VFB(OUT)
VFB(IN)
5.4
3
V
V/V
V
∆VFB/∆VCS
Burst-Mode Out FB Voltage
Burst-Mode Enter FB Voltage
VSENSE =0
1.5
1.35
65
VSENSE =0
V
Normal
Switch Frequency
VFB=3.5V
60
20
70
-9
70
KHz
KHz
%
FSW
Power-Saving
Before enter burst mode
VFB=3.5V, VSENSE=0
Duty Cycle
DMAX
FJ(SW)
FDV
78
90
+9
10
10
Frequency Hopping
%
Frequency VDD Stability
Frequency Temperature Stability
PROTECTION SECTION
VCC Over Voltage Protection Threshold
FB PIN Over Load Protection Threshold
Over Load Protection Delay-Time
OTP Threshold
VDD=12V~20V
T=-40~110°C
%
FDT
%
VOVP
VOLP
TDelay
T(THR)
TSS
VFB=3.9V
25
60
27
4.2
88
29
V
V
120
mS
°C
mS
150
5
Soft start time
CURRENT LIMITING SECTION
Peak Current Flat Threshold Voltage
Peak Current Valley Threshold Voltage
Lead Edge Blanking Time
DRIVER OUTPUT SECTION
Output Voltage Low State
Output Voltage High State
Output Voltage Rise Time
Output Voltage Fall Time
RT SECTION
VCS-F
VCS-V
TLEB
VFB=3.9V, Duty≥60%
0.92
0.65
350
V
V
VFB=4.0V, Duty=0%
0.60
200
0.70
550
ns
VOL
VOH
tR
VDD=15V,IO=-20mA
VDD=15V,IO= 20mA
CL=1.0nF
1
V
V
11
150
60
ns
ns
tF
CL=1.0nF
Output Current of RT pin
Threshold Voltage for OTP
IRT
93
100
107
uA
V
VTH_OTP
0.98
1.04
1.10
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UC3873A
LINEAR INTEGRATED CIRCUIT
OPERATION DESCRIPTION
The UTC UC3873A devices integrate many useful designs into one controller for low-power switch-mode power
supplies. The following descriptions highlight some of the features of the UTC UC3873A series.
Start-up Current
The start-up current is only 2.5μA. Low start-up current allows a start-up resistor with a high resistance and a
low-wattage to supply the start-up power for the controller. For AC/DC adaptor with universal input range design, a
2.5~3MΩ, 1/8W startup resistor could be used together with a VDD capacitor to provide a fast startup and low power
dissipation solution.
Power-Saving Mode Operation
The proprietary Power-Saving Mode function provides linearly decreasing the switching frequency under
light-load conditions for higher efficiency. The feedback voltage, which is sampled from the voltage feedback loop, is
taken as the reference. Once the feedback voltage dropped below the threshold voltage, the switching frequency
starts to decrease. This Power-Saving Mode function dramatically reduces power consumption under light-load
conditions. The 20KHz minimum frequency control also eliminates the audio noise at any loading conditions.
At zero load condition, the magnitude of power loss is in proportion to the number of switching events within a
fixed period of time. Reducing switching events leads to the reduction on the power loss and thus conserves the
energy. The UTC UC3873A enter burst mode at standby condition to minimize the switching loss and reduces the
standby power consumption. Power supplies using the UTC UC3873A can easily meet even the strictest regulations
regarding standby power consumption.
Switch Frequency Set
The maximum switch frequency is fixed to 65KHz. Switch frequency is modulated by output power POUT during IC
operating. At no load or light load condition, most of the power dissipation in a switching mode power supply is from
switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the snubber circuit. The
magnitude of power loss is in proportion to the number of switching events within a fixed period of time. So lower
switch frequency at lower load, which more and more improve IC’s efficiency at light load. At from no load to light
load condition, The IC will operate at from Burst mode to Reducing Frequency Mode. The relation curve between fSW
and POUT/POUT (MAX) as followed Fig.1.
1%~100% Load @ 115 & 230 Vac
70
60
55
115V
40
230V
25
10
1%
100%
9%
19%
30%
POUT/POUT(max)
Fig.1 The relation curve between fSW and relative output power POUT/ POUT (MAX)
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UC3873A
LINEAR INTEGRATED CIRCUIT
OPERATION DESCRIPTION (Cont.)
Frequency Hopping For EMI Improvement
The Frequency hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator is to
set the normal switching frequency; the switching frequency is modulated with a period signal generated by the 2nd
oscillator. The relation between the first oscillator and the 2nd oscillator as followed Fig.2. So the tone energy is
evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design
in meeting stringent EMI requirement.
Fig.2 Frequency Hopping
Built-in Slope Compensation
Built-in slope compensation circuit greatly improves the close loop stability at CCM and prevents the
sub-harmonic oscillation.
Leading-Edge Blanking
Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense-resistor. To avoid
premature termination of the switching pulse, a 400ns leading-edge blanking time is built in. Conventional RC
filtering can therefore be omitted. During this blanking period, the current-limit comparator is disabled and it cannot
switch off the gate driver.
Constant Output Power Limit
When the SENSE voltage, across the sense resistor RS, reaches the threshold voltage, around VCS-V, the output
GATE drive will be turned off after a small propagation delay tD. This propagation delay will introduce an additional
current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage
VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher
than that under low input line voltage. To compensate this variation for wide AC input range, the threshold voltage is
adjusted by the VIN current. Since VIN pin is connected to the rectified input line voltage through a resistor RVIN, a
higher line voltage will generate higher VIN current into the VIN pin. The threshold voltage is decreased if the VIN
current is increased. Smaller threshold voltage, forces the output GATE drive to terminate earlier, thus reduce the
total PWM turn-on time and make the output power equal to that of low line input. This proprietary internal
compensation ensures a constant output power limit for wide AC input voltage from 90VAC to 264VAC.
Under Voltage Lockout (UVLO)
The turn-on and turn-off thresholds of the UTC UC3873A are fixed internally at VTHD(ON)/VDD(MIN) During start-up,
the hold-up capacitor must be charged to VTHD(ON) through the start-up resistor, so that the UTC UC3873A will be
enabled. The hold-up capacitor will continue to supply VDD until power can be delivered from the auxiliary winding of
the main transformer. VDD must not drop below VDD(MIN) during this start-up process. This UVLO hysteresis window
ensures that hold-up capacitor will be adequate to supply VDD during start-up.
Gate Output
The UTC UC3873A output stage is a fast totem pole gate driver. Cross conduction has been avoided to minimize
heat dissipation, increase efficiency, and enhance reliability. A good tradeoff is achieved through dead time control.
The low idle loss and good EMI system design is easier to achieve with this dedicated control scheme. An internal
16V clamp is added for MOSFET gate protection at higher than expected VDD input.
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UC3873A
LINEAR INTEGRATED CIRCUIT
OPERATION DESCRIPTION (Cont.)
Protection Controls
The IC takes on more protection functions such as OVP, OLP and OTP etc. In case of those failure modes for
continual blanking time, the driver is shut down. Driver is reset after failure is eliminated.
OVP
The OVP will shut down the switching of the power MOSFET whenever VDD >VOVP. The OVP event as followed
Fig.3.
Fig.3 OVP case
Fig.4 OLP case
OLP
OLP will shut down driver when VFB> VOLP for continual a blanking time. The OLP event as followed Fig.4.
OTP
OTP will shut down driver when the NTC resistor temperature TJ>T (THR)
.
PCB Layout Note
Noise from the current sense or the control signal can cause significant pulse width jitter in
continuous-conduction mode, and slope compensation helps alleviate these problems. Good placement and layout
practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter
components near the UTC UC3873A, and increasing the power MOS gate resistance is advised.
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UC3873A
LINEAR INTEGRATED CIRCUIT
REFRENCE CIRCUIT 12W (5V/2.4A)
L2
F1
1
2
L
1 BD1
R1
R2
2
4
+
+
C3 R3
D5
EE-22
T1
C1
C2
L1
2
1, 2
3, 4
1
1
1
VO 12W (5V/2.4A)
3
R18
D2
10
N
3
9
R10 C9
C10
8
5
+
+
D4
R4
22
3
U1
C13
C11
1
2
Q1
1
1
2
3
6
5
4
GATE
VDD
GND
FB
RT SENSE
R6
7
GND
R7A
R7
C8
R8
NTC
R5 D3
1
2
+
R12
R13
C4
C5
U3
4
R15
R14
3
2
3
C12
CY1
U2
1
R16
R17
2
BOM
Reference
BD1
C2
Component
BD 1A/600V
Reference
L2
Component
1mH 6×8mm
4N60_TO-220F
R 1.5MΩ 1206
R 200KΩ 1206
R 0Ω 0805
EC 22μF/400V 105°C
Q1
C1
EC 4.7μF/400V 105°C
CC 0.01μF/1000V
EC 10μF/50V
R1,R2
R3
C3
C4
R4
C5,C13
C8
CC 104P/25V 0805
CC 102P/25V 0805
CC 222P/100V 1206
EC 470u/16V 105°C
CC 222P/16V 0805
Diode FR107
R5
R 10Ω 0805
R 43Ω 1206
R 2Ω 1206
R6
C9
R7, R7A
R8
C10, C11
C12
D2
R 51KΩ 1206
R9
NTC R 12KΩ 0805
R 22Ω 1206
R10
R12
R13
R14
R15, R16
R17
R18
T1
D3
Diode FR102
R 820Ω 0805
R 2.2KΩ 0805
R 1KΩ 0805
R 22KΩ 0805 ±1%
R 330KΩ 0805 ±1%
R 220Ω 1206
EE-22
D4
Diode 1N4148_SOD-123
Diode SB2040_TO-220F
Fuse 2A/250VAC
10μH 6mm
D5
F1
L1
U1
IC UTC UC3873A
TL431
U2
U3
PC817B
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UC3873A
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS
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UC3873A
LINEAR INTEGRATED CIRCUIT
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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