UPSS1650G-D08-T [UTC]
HIGH PRECISION CC/CV PRIMARY-SIDE PWM POWER SWITCH;
| 型号： | UPSS1650G-D08-T |
| 厂家： | 
Unisonic Technologies |
| 描述： | HIGH PRECISION CC/CV PRIMARY-SIDE PWM POWER SWITCH |
| 文件： | 总7页 (文件大小：206K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
UPSS1650
Preliminary
CMOS IC
HIGH PRECISION CC/CV
PRIMARY-SIDE PWM POWER
SWITCH
DIP-8
DESCRIPTION
The UTC UPSS1650 is a primary control switch mode charger
and adapter applications. The controlled variable is transferred by
an auxiliary winding from the secondary to the primary side. The
device integrates PWM controller to enhance the performance of
discontinuous conduction mode (DCM) flyback converters.
The UTC UPSS1650 operates in primary-side sensing and
regulation. Opto-coupler and TL431 could be eliminated. It also
provides off-time modulation to linearly decrease PWM frequency
under light-load conditions so that low standby power can be
achieved.
SOP-8
The UTC UPSS1650 achieves high precision CV/CC regulation
and high power efficiency. It offers comprehensive protection
coverage with auto-recovery features including Cycle-by-cycle
current limiting, VDD over voltage protection, VDD clamp, OTP,
leading edge blanking, VDD under voltage lockout, etc.
FEATURES
* Built-in primary winding inductance
* Built-in 600V Power MOSFET
compensation
* Power on soft start
* Gate Output Maximum Voltage Clamped at
15V
* ±5% constant voltage regulation at universal AC input
* High precision constant current regulation at universal AC input
* Primary side control without TL431 and opto-coupler
* Programmable CV and CC regulation
* Cycle-by-cycle current limiting
* Over voltage protection
* VDD under-voltage lockout
* Programmable cable compensation in CV mode
* Flyback topology in DCM operation
* Frequency hopping to reduce system EMI
* Built-in leading edge blanking
ORDERING INFORMATION
Ordering Number
Lead Free
Package
Packing
Halogen Free
UPSS1650L-D08-T
UPSS1650L-S08-R
UPSS1650G-D08-T
UPSS1650G-S08-R
DIP-8
SOP-8
Tube
Tape Reel
UPSS1650L-D08-T
(1) T: Tube, R: Tape Reel
(1)Packing Type
(2)Package Type
(3)Halogen Free
(2) D08: DIP-8, S08: SOP-8
(3) L: Lead Free, G: Halogen Free
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Copyright © 2013 Unisonic Technologies Co., Ltd
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UPSS1650
Preliminary
CMOS IC
PIN CONFIGURATION
VDD
COMP
INV
GND
1
2
3
4
8
7
6
5
GND
DRAIN
DRAIN
CS
PIN DESCRIPTION
PIN NO.
PIN NAME
VDD
DESCRIPTION
1
2
Power Supply
COMP
INV
Loop Compensation
3
The voltage feedback from the auxiliary winding
Current sense input
4
CS
5/6
7/8
DRAIN
GND
Power MOSFET Drain Pin
Ground
BLOCK DIAGRAM
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UPSS1650
Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
BVDSS
IDD
RATINGS
-0.3~Bvdss
10
UNIT
V
Drain Voltage (Off State)
VDD Zener Clamp Continuous Current
COMP Voltage
mA
V
VCOMP
VCS
-0.3~7
CS Input Voltage
-0.3~7
V
INV Input Voltage
VINV
-0.3~7
V
Operating Junction Temperature
Storage Temperature
TJ
-20~150
-55~150
°C
°C
TSTG
Notes: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. Drain Pin Connected 100mm2 PCB copper clad.
THERMAL CHARACTERISTICS
PARAMETER
DIP-8
SYMBOL
RATINGS
UNIT
°C/W
°C/W
75
90
Junction to Ambient
θJA
SOP-8
OUTPUT POWER TABLE
PARAMETER
RATINGS
UNIT
W
230VAC±15%
85-264VAC
6
5
Adapter (Note)
W
Note: Maximum practical continuous power in an Adapter design with sufficient drain pattern as a heat sink, at 50°C
ambient.
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UPSS1650
Preliminary
CMOS IC
ELECTRICAL CHARACTERISTICS (TA=25°C, VDD=15V, unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
SUPPLY SECTION
Turn-on Threshold Voltage
Turn-off Threshold Voltage
VDD OVP Protection
VTH(ON)
VTH(OFF)
VDD_OVP
IDD-ST
13.5 14.5 15.5
V
V
8.5
9
9.5
26
5
V
Startup Current
20
2
μA
mA
mA
Operating Current
IDD-OP
1.6
1.3
Green-Mode Operating Current
OSCILLATOR SECTION
Maximum Frequency
IDD-GREEN
fOSC
fOSC-CM-MIN
fOSC-N-MIN
△f/freq
tFHR
50
55
18
60
kHz
kHz
Hz
%
Minimum Frequency at CCM
Minimum Frequency at No-load
Frequency Hopping Range
Frequency Hopping Period
Frequency Variation vs. VDD Deviation
Frequency Variation vs. Temperature
Deviation
370
±5.0
3
ms
%
fDV
VDD=10~25V
TA=-20°C~+150°C
1
2
fDT
15
%
INV SECTION
Reference Voltage for EA
Reference Voltage for CCM
Max. Cable Compensation Current
CURRENT SENSE SECTION
Current Sense Threshold Voltage
OCP Propagation Delay
Leading Edge Blank Time
Soft Start Time
VVR
1.94 2.00 2.03
V
V
VVR_CCM
ICABLE_MAX
0.5
42
uA
VCS
tD_OC
tLEB
tSS
740 760 780 mV
90
540
10
200
nS
nS
mS
POWER MOSFET SECTION
MOSFET DS Breakdown Voltage
On Resistance
BVDSS
600
17
V
RDS(ON)
20
Ω
OTP SECTION
Threshold Temperature of OTP (Note)
TOTP
+140
°C
Note: When the over-temperature protection is activated, the power system enters auto restart mode and output is
disabled.
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UPSS1650
Preliminary
CMOS IC
OPERATION DESCRIPTION
The UTC UPSS1650 is a primary control switch mode charger and adapter applications. It operates in
primary-side sensing and regulation. Opto-coupler and TL431 could be eliminated. Proprietary built-in CV and CC
control can achieve high precision CV/CC performance. The device integrates PWM controller to enhance the
performance of discontinuous conduction mode (DCM) flyback converters.
Startup control
The VDD pin of UTC UPSS1650 is connected to the line input through a resistor. A large value startup resistor can
be used to minimize the power loss in application because the start current of UTC UPSS1650 is very low. When the
VDD voltage reaches VTH(ON), the internal startup circuit is disabled and the IC turns on.
Operating Current
The Operating current of UTC UPSS1650 is as low as 1.6mA. Good efficiency and very low standby power can be
achieved.
Constant Voltage Operation
The output voltage is defined by the transmission ratio between the secondary and auxiliary winding. The UTC
UPSS1650 captures the auxiliary winding feedback voltage at INV pin and operates in constant-voltage (CV) mode
to regulate the output voltage. The auxiliary voltage reflects the output voltage is given by:
NA
VAUX
=
×（VO + ∆V）
(1)
NS
Where △V indicates the drop voltage of the output diode.
Figure 2. Auxiliary voltage waveform
Via a resistor divider connected between the auxiliary winding and INV, the VAUX is sampled at the Tsampling end
and it is hold until the next sampling. The sampled voltage is compared with 2.0V reference voltage and the error is
amplified. The error amplifier output reflects the load condition and controls the TOFF time and the Ipk to regulate the
output voltage, thus constant output voltage can be achieved.
Constant Current Operation
When the sampled voltage is below 2.0V reference voltage and the error amplifier output reaches its maximum,
thus UTC UPSS1650 operates in constant-current (CC) mode. The CC point and maximum output power can be
externally adjusted by external current sense resistor Rcs. The larger Rcs, the smaller CC point is, and the smaller
output power becomes.
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UPSS1650
Preliminary
CMOS IC
OPERATION DESCRIPTION(Cont.)
Large
Rcs
Vout
Small
Rcs
Iout
Figure 3. Adjustable output power by changing Rcs
Figure 4. Secondary current waveform
In CC operation, the CC loop control function of UTC UPSS1650 will keep a fixed proportion between secondary
inductance de-magnetization time (Tdemag) and switching cycle time (Tsw). The fixed proportion is
Tdemag
Tsw
1
2
=
(2)
Thus the output current is given by:
Iout =
1
2
NP
NS
Tdemag
Tsw
1
4
NP
NS
×
×Ipk×
=
×
×Ipk
(3)
Programmable Cable Drop Compensation
UTC UPSS1650 has a built-in cable voltage drop compensation to achieve good load regulation. An offset voltage
is generated at INV pin by an internal current flowing into the resistor divider. The current is inversely proportional to
the voltage of COMP pin. As a result, it is inversely proportional to the output load current. The voltage drop across
the cable is compensated by this offset voltage at INV pin. It can also be programmed by adjusting the resistance of
the divider to compensate the drop for various cable lines used.
Current Sensing and Leading Edge Blanking
Cycle-by-cycle current limiting is offered in UTC UPSS1650. The switch current is detected by a sense resistor
into the CS pin. When the power switch is turned on, a turn-on spike will occur on this resistor. A 500ns leading-edge
blanking is built in to avoid false-termination of the switching pulse so that the external RC filtering is no longer
needed.
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UPSS1650
Preliminary
CMOS IC
OPERATION DESCRIPTION(Cont.)
Protection Control
Good power supply system reliability is achieved with its comprehensive protection features including VDD
over-voltage protection, VDD Clamp, GATE Clamp, Power on soft start, Cycle-by-cycle current limiting, short circuit
protection, leading edge blanking, OTP and UVLO, etc.
VDD is supplied by transformer auxiliary winding output. The output of UTC UPSS1650 is shutdown when VDD
drops below VTH(OFF) and the power converter enters power on start-up sequence thereafter.
TYPICAL APPLICATION CIRCUIT
L
Is
Vo
D1
Co
Io
N
NP
NS
VDD
DRAIN
UTC
UPSS1650
COMP
GND
NA
INV
CS
RCS
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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