US2651L-S08-R [UTC]
Switching Regulator/Controller,;
| 型号： | US2651L-S08-R |
| 厂家： | 
Unisonic Technologies |
| 描述： | Switching Regulator/Controller, |
| 文件： | 总6页 (文件大小：357K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
US2651
Preliminary
CMOS IC
HIGH PRECISION LOW COST
MCM POWER SWITCH
DESCRIPTION
DIP-8
The UTC US2651 is a high performance, high precision and low
cost PWM Power switch for non-isolated buck application. It
combines a dedicated current mode PWM controller and error
amplifier for low component count. UTC US2651 use UTC
proprietary frequency shuffling technique for EMI performance. And
oscillator with frequency-reduction control is implemented.
The UTC US2651 has soft start control and protection function,
such as Cycle-by-Cycle current limiting, Over Loading Protection,
Output Short-Circuit Protection, RCS short Protection, OTP, VDD
OVP, and UVLO.
SOP-8
FEATURES
* Power on soft-start
* Load compensation
* Built-in error amplifier
* Oscillator of fixed frequency with frequency-reduction control
* Frequency shuffling for EMI improvement
* Built-in Leading Edge Blanking (LEB)
* Cycle-by-Cycle current limiting
* Over loading protection
* Output short-circuit protection
* VDD Under Voltage Lockout with hysteresis (UVLO)
* VDD OVP
ORDERING INFORMATION
Ordering Number
Lead Free
Package
Packing
Halogen Free
US2651G-D08-T
US2651G-S08-R
US2651L-D08-T
DIP-8
SOP-8
Tube
Tape Reel
US2651L-S08-R
US2651G-D08-T
(1) T: Tube, R: Tape Reel
(2) D08: DIP-8, S08: SOP-8
(1)Packing Type
(2)Package Type
(3)Green Package
(3) G: Halogen Free and Lead Free, L: Lead Free
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US2651
Preliminary
CMOS IC
MARKING
DIP-8
SOP-8
8
7
6
5
8
6
5
7
Date Code
Date Code
L: Lead Free
G: Halogen Free
UTC
U S 2 6 5 1
UTC
US2651
L: Lead Free
G: Halogen Free
Lot Code
Lot Code
2
1
3
4
4
1
2
3
PIN CONFIGURATION
VDD
COMP
NC
GND
GND
1
2
3
4
8
7
6
5
DRAIN
DRAIN
CS
PIN DESCRIPTION
PIN NO.
PIN NAME
VDD
DESCRIPTION
1
2
3
4
Power supply
COMP
NC
Loop compensation for CV stability
Not connected
CS
Current sense input
HV MOSFET Drain Pin. The Drain pin is connected to the primary lead of the
transformer/ inductance.
Ground
5, 6
7, 8
DRAIN
GND
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US2651
Preliminary
CMOS IC
BLOCK DIAGRAM
VDD
1
DRAIN
5/6
LDO
OVP
Gate
Internal
Supply
Driver
Power
MOSFET
UVLO &
Output
POR
regulation
PWM
Generator
OCP
Load
Comp
4
CS
OLP
Vref
+
CLK
Genterator
3
NC
LEB
7/8 GND
EA
-
Frequency
Shuffling
2
COMP
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US2651
Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
BVDSS
RATINGS
-0.3 ~ BVdss
-0.3 ~ 40
10
UNIT
V
Drain Voltage (Off State)
VDD Voltage
V
VDD Zenzer Clamp Continuous Current
COMP Voltage
IDD
VCOMP
VCS
mA
V
-0.3 ~ 7
CS Input Voltage
-0.3 ~ 7
V
Operating Junction Temperature
Storage Temperature
TJ
-40 ~ +150
-55 ~ +150
°C
°C
TSTG
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
THERMAL DATA
PARAMETER
SYMBOL
RATINGS
UNIT
°C/W
°C/W
DIP-8
75
90
Junction to Ambient
θJA
SOP-8
ELECTRICAL CHARACTERISTICS (TA=25°C, VDD=16V, if not otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE (VDD) SECTION
Standby Current
IDD ST
IDD OP
VDD= UVLO (OFF)-0.1V
35
3.0
9
μA
Operation Supply Current CS=0V,
VDD=18V
Operation Current
mA
VDD Under Voltage Lockout Enter
VDD Under Voltage Lockout Exit
Over Voltage Protection
Threshold
UVLO(ON) VDD Falling
UVLO (OFF) VDD Rising
7
8
V
V
13.5 14.8 16
OVP
VDD
Ramp VDD Until Gate Shut Down
26 27.5 29
V
V
In Normal Regulation, VDD will be
Regulated to 19.3V
Ramp VDD Until Comp Voltage Lower
than 2.5V
17
20
CURRENT SENSE INPUT SECTION
LEB Time
TLEB
VTH_OC
TD_OC
300
ns
Over Current Threshold
OCP Propagation Delay
750 860 970 mV
110
ns
Input Impedance
ZSENSE_IN
40
40
KΩ
FREQUENCY SECTION
IC Maximum Frequency
Frequency Shuffling Range
ERROR AMPLIFIER SECTION
DC Gain of EA
Freq_MAX
50
±6
60 KHz
%
△ f/Freq
Gain
60
6
dB
Max. Cable Compensation
Current
I_COMP_MAX VDD=18V, COMP=0V
μA
POWER MOSFET SECTION
MOSFET Drain-Source
Breakdown Voltage
BVDSS
RDS(ON)
600
V
On Resistance
Static, ID=0.45A
15
Ω
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US2651
Preliminary
CMOS IC
OPERATION DESCRIPTION
The UTC US2651 is a cost effective PWM power switch optimized for off-line non-isolated buck applications
including electrical appliance and linear regulator replacement. It operates in current mode and regulates output
voltage with dedicated features. High integration can afford low cost and component count solution.
Startup Current and Start up Control
Startup current of UTC US2651 is designed to be very low so that VDD could be charged up above UVLO threshold
and starts up quickly. A large value startup resistor can therefore be used to minimize the power loss in application.
Operating Current
The Operating current of UTC US2651 is as low as 3mA. Good efficiency is achieved with the low operating
current together with ‘Muti-mode’ control features.
Oscillator operationF
The switching frequency of UTC US2651 is internally fixed at 50KHZ. No external frequency setting components
are required for PCB design simplification.
At light load or zero load condition, most of the power dissipation in a switching mode power supply is from
switching loss on the MOSFET. The magnitude of power loss is in proportion to the switching frequency. Lower
switching frequency leads to the reduction on the power loss and thus conserves the energy. The switching
frequency is internally adjusted at light load or no load condition. The switch frequency reduces at light/no load
condition to improve the conversion efficiency. The minimum switching frequency is 400Hz.
Frequency shuffling for EMI improvement
The frequency shuffling (switching frequency modulation) is implemented in UTC US2651. The oscillation
frequency is modulated so that the tone energy is spread out. The spread spectrum minimizes the conduction band
EMI and therefore eases the system design.
Built-in error amplifier
In UTC US2651, on-chip EA (error amplifier) is implemented to regulate output voltage. Through inner resistor
divider, the VDD voltage is detected at inverter input of EA to regulate output voltage.
Load Compensation for good CV regulation
In UTC US2651, load compensation is implemented to achieve good load regulation. An offset voltage is
generated at inverter input of EA by an internal current flowing into the resister divider. The current is inversely
proportional to the voltage across pin COMP, as a result, it is inversely proportional to the output load current, thus
the output voltage can be compensated specially in zero loading condition. As the load current decreases from
full-load to no-load, the offset voltage at inverter input of EA will increase.
Current Sensing and Leading Edge Blanking
Cycle-by-Cycle current limiting is offered in UTC US2651 current mode PWM control. The switch current is
detected by a sense resistor into the CS pin. An internal leading edge blanking circuit chops off the sensed voltage
spike at initial internal power MOSFET on state so that the external RC filtering on sense input is no longer needed.
The PWM duty cycle is determined by the current sense input voltage and the EA output voltage.
Gate Drive
The internal power MOSFET in UTC US2651 is driven by a dedicated gate driver for power switch control. Too
weak the gate drive strength results in higher conduction and switch loss of MOSFET while too strong gate drive
compromises EMI.
A good tradeoff is achieved through the built-in totem pole gate design with right output strength control.
Protection Control
Good power supply system reliability is achieved with its rich protection features including Cycle-by Cycle current
limiting (OCP), Over Loading Protection, Over Voltage Protection, Output Short-Circuit Protection and Under Voltage
Lockout on VDD (UVLO).
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US2651
Preliminary
CMOS IC
TYPICAL APPLICATION CIRCUIT
ES1G
1mH
UTC US2651
10μF
47nF
1
2
3
4
8
7
6
5
GND
VDD
COMP
NC
510K 2Ω
19V/0.25A
GND
DRAIN
DRAIN
510K
CS
ES1G
470μF
DC
OUT
10μF
AC
IN
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all UTC products described or contained herein.
UTC products are not designed for use in life support appliances, devices or systems where malfunction
of these products can be reasonably expected to result in personal injury. Reproduction in whole or in
part is prohibited without the prior written consent of the copyright owner. UTC reserves the right to
make changes to information published in this document, including without limitation specifications and
product descriptions, at any time and without notice. This document supersedes and replaces all
information supplied prior to the publication hereof.
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