VL-PS-PDA320240D-03 [VARITRONIX]
SPECIFICATION OF LCD MODULE TYPE; 规格液晶显示模组式![VL-PS-PDA320240D-03](http://pdffile.icpdf.com/pdf1/p00117/img/icpdf/VL-PS-PDA320240D-03_639229_icpdf.jpg)
型号: | VL-PS-PDA320240D-03 |
厂家: | ![]() |
描述: | SPECIFICATION OF LCD MODULE TYPE |
文件: | 总17页 (文件大小:1496K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 2 OF 17
DOCUMENT REVISION HISTORY
DOCUMENT
REVISION
DATE
DESCRIPTION
CHANGED
BY
CHECKED
BY
FROM
TO
A
2005.06.23 First Release.
Based on
CHEN HUI
JUAN
LIU ZHI
QIANG
a.) Test Specification:
VL-TS-PDA320240D-03 REV. A
2005.06.10
b.) VL-QUA-012B, REV. W,
2004.03.20
According to VL-QUA-012B,
LCD size is middle because Unit
Per Laminate=6 which is in the
range of 2pcs/Laminate to 6pcs
/Laminate.
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 3 OF 17
CONTENTS
Page No.
1.
2.
GENERAL DESCRIPTION
4
4
8
MECHANICAL SPECIFICATIONS
3.
ABSOLUTE MAXIMUM RATINGS
3.1.
3.2.
ELECTRICAL MAXIMUM RATINGS – FOR IC ONLY
ENVIRONMENTAL CONDITIONS
8
8
4.
ELECTRICAL SPECIFICATIONS
INTERFACE SIGNALS
9
4.1.
4.2.
4.3.
4.4.
4.5.
9
TYPICAL ELECTRICAL CHARACTERISTICS
TOUCH PANEL ELECTRICAL SPECIFICATION
TIMING SPECIFICATIONS
10
10
11
15
PRECAUTION WHEN CONNECTING AND
DISCONNECTING THE POWER
5.
6.
REMARK
16
17
LCD COSMETIC CONDITIONS
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 4 OF 17
VARITRONIX LIMITED
Preliminary Specification
of
LCD Module Type
PDA320240D-03
1. General Description
• 320 X 240 dots.
• FSTN Positive Black & White Transflective LCD Graphic Module.
• Viewing Angle: 6 O’clock direction
• Driving scheme: 1/240 Duty, 1/13 bias.
• ‘NOVATEK’ NT7701 (TCP form) 160 Output LCD Segment/Common Drivers or equivalent.
• ‘NOVATEK’ NT7702 (TCP form) 240 Output LCD Segment/Common Drivers or equivalent.
• DC/DC Converters.
• White LED05 backlight.
• FFC connection.
• Touch Panel.
• Connector.
2. Mechanical Specifications
The mechanical detail is shown in Fig. 1 (A) and summarized in Table 1 below.
Table 1
Parameter
Specifications
96.3(W) x 129.3(H) x 6.9(D) (Exclude component height,
connector for touch panel & TAB).
78.38(W) x 59.18(H)
Unit
mm
Outline dimensions
Viewing area (Touch Panel)
Active area (Touch Panel)
Active area (LCD)
Display format
mm
mm
mm
-
mm
mm
mm
gram
77.58(W) x 58.38(H)
76.785(W) x 57.585(H)
320 (H) dots x 240 (V) dots
0.225(W) x 0.225(H)
Dot size
Dot spacing
0.015(W) x 0.015(H)
Dot pitch
0.24(W) x 0.24(H)
Overall Weight
TBD
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 5 OF 17
Figure 1(A): Module specification
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 6 OF 17
C1
.
.
.
.
.
.
.
PDA320240D
COM1
.
.
240
LCD GRAPHIC DISPLAY
LCD COMMON
DRIVER
.
COM240
320 X 240 DOTS
EIO2
'NOVATEK' NT7702
(TCP)
C240
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
S1
S320
LP
FR
DISPOFF
. . . . .
SEG1
SEG160
SEG161. . . . .
SEG320
LCD SEGMENT DRIVER
LCD SEGMENT DRIVER
'NOVATEK' NT7701
(TCP)
'NOVATEK' NT7701
(TCP)
LP
FR DISPOFFD0~3
XCK
DISPOFF
XCK
FR
LP
D0~3
VSS
VDD
FLM
3
V0,V1,V4
3
3
V0,V2,V3
DC/DC Conveters and
bias voltage circuit
3
CL1
CL2
M
D-OFF
DB0~DB3
4
A
K
WHITE LED05 BACKLIGHT
Figure 1(B): Block Diagram of the module.
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 7 OF 17
TP_U
TP_L
TOUCH PANEL
TP_D
TP_R
Figure 1(C): Block Diagram of Touch Panel
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 8 OF 17
3. Absolute Maximum Ratings
3.1 Electrical Maximum Ratings – for IC Only
Table 2
Parameter
Supply voltage range (Logic)
Supply voltage (LCD)
Input voltage range
Symbol
VDD - VSS
V0
Min.
-0.3
-0.3
-0.3
Max.
+7.0
Unit
V
+30.0
V
VIN
VDD+0.3
V
Note: 1.) The module may be destroyed if they are used beyond the absolute maximum ratings.
2.) All voltage values are referenced to VSS= 0V.
3.2 Environmental Conditions
Table 3
Operating
Temperature
(Topr)
Storage
Temperature
(Tstg)
Item
Remark
(Note 1)
Min.
0°C
Max.
+50°C
Min.
-20°C
Max.
+70°C
Ambient Temperature
(Except Touch Panel)
Humidity
Vibration (IEC 68-2-6)
cells must be mounted
on a suitable connector
Shock (IEC 68-2-27)
Half-sine pulse shape
Dry
No condensation
3 directions
90% max. RH for Ta ≤ 40°C
Frequency: 10 ∼ 55 Hz
Amplitude: 0.75 mm
Duration: 20 cycles in each direction.
Pulse duration: 11 ms
3 directions
Peak acceleration: 981 m/s2 = 100 g
Number of shocks: 3 shocks in 3
mutually perpendicular axes.
Note 1: Product cannot sustain in extreme storage conditions for a long time.
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 9 OF 17
4. Electrical Specifications
4.1 Interface signals
Table 4(A): Pin description (LCD Driver)
Pin No.
Symbol
FLM
M
Description
1
2
Input/output for chip select or data of the shift register.
AC signal input for LCD driving waveform
-The input signal is level-shifted from logic voltage level to the LCD
driver voltage level, and it controls the LCD driver circuit
-Normally, inputs a frame inversion signal.
The LCD driver output pin’s output voltage level can be set using the
shift register output signal and the FR signal.
3
4
5
CL1
Latch pulse input/shift clock input for the shift register.
Display data shift clock input for segment mode.
Control input for deselect output level.
CL2
____________
D-OFF
6
DB0
DB1
DB2
DB3
VDD
VSS
VEE *
VSS
NC
Input pin for display data.
7
8
9
10
11
12
13
14
15
16
Power supply for logic.
Ground (0V)
Positive power supply for LCD driving voltage. *
Ground (0V)
No connection
A
Anode of backlight
K
Cathode of backlight.
* This pin should be NC (No Connection) when Built-in DC/DC converter is used
Table 4(B): Pin description (TOUCH PANEL)
Pin No.
17
Symbol
TP_R
TP_D
TP_L
TP_U
Description
RIGHT Input Position
BOTTOM Input Position
LEFT Input Position
TOP Input Position
18
19
20
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 10 OF 17
4.2
Typical Electrical Characteristics
At Ta = 25 °C, VDD = 3.0V±5%, VSS = 0V.
Table 5
Conditions
Parameter
Symbol
Min.
2.85
16.3
Typ.
3.0
Max.
3.15
16.7
Unit
V
Supply voltage (Logic) VDD-VSS
Supply voltage (LCD) VLCD
(Built-in)
VDD=3.0V,
16.5
V
Note 1
Input signal voltage
VIH
VIL
IDD
“High” level,
0.8 VDD
-
-
0.2 VDD
30
V
V
Note 2
“Low” level,
-
-
-
Note 2
Supply Current
(Logic & LCD)
Character mode,
VDD = 3.0V. Note (1)
Checker board mode,
VDD = 3.0V. Note (1)
Forward current
=20mA
20
30
3.2
mA
mA
V
-
45
Supply voltage of
White LED05
VLED
3.0
3.4
backlight
Luminance (on the
backlight surface)
70
100
-
cd/m2
Number of LED
chips=1x4=4
Note 1: There is tolerance in optimum LCD driving voltage during production and it will be
within the specified range.
Note 2: Apply to pins DB0~DB3, EIO2, LP, XCK and FR.
4.3 Touch Panel Electrical Specification
Table 6
Item
Specification
465 ohm±35%
653 ohm±35%
<2%
>20M ohm
>80% Min.
Condition
X axis
Terminal Resistance
Y axis
Linearity
Insulation Resistance
Transparency
+25V
-
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 11 OF 17
4.4
Timing Specifications
Refer to Fig. 2, Segment mode characteristics (NT7701)
At Ta = 0 °C to +50 °C, VDD = 3.0V±5%, VSS = 0V.
Table 7
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 12 OF 17
DB0~3
Figure 2: Timing waveform of the segment mode (NT7701)
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 13 OF 17
Refer to Fig. 3, Common mode characteristics (NT7702).
At Ta = 0 °C to +50 °C, VDD = 3.0V±5%, VSS = 0V.
Table 8
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 14 OF 17
Figure 3: Timing waveform of the common mode (NT7702)
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 15 OF 17
4.5 Precaution when Connecting and Disconnecting the Power
Be careful when connecting or disconnecting the power.
This LSI has a high-voltage LCD driver, so it may be permanently damaged by a high current, which
may occur, if a voltage is supplied to the LCD driver power supply while the logic system power
supply is floating.
The details are as follows:
ꢀ
When connecting the power supply, connect the LCD driver power after connecting the logic
system power. Furthermore, when disconnecting the power, disconnect the logic system power
after disconnecting the LCD driver power.
ꢀ
We recommend that you connect a serial resistor (50-100 Ω) or fuse to the LCD driver power V0
of the system as a current limiting device. Also, set a suitable value of the resistor in
consideration of LCD display grade.
In addition, when connecting the logic power supply, the logic condition of this LSI inside is insecure.
Therefore connect the LCD driver power supply after resetting the logic condition of this LSI inside
on /DOFF function. After that, the /DOFF cancel the function after the LCD driver power supply has
become stable. Furthermore, when disconnecting the power, set the LCD driver output pins to level
VSS on the /DOFF function. After that, disconnect the logic system power after disconnecting the
LCD driver power.
When connecting the power supply, follow the recommended sequence shown.
Figure 4: Power sequence
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 16 OF 17
5. Remark
VL-PS-PDA320240D-03 REV. A
(PDA320240D-03)
JUN/2005
PAGE 17 OF 17
6. LCD Cosmetic Conditions
a.) Reference document follow VL-QUA-012B.
b.) LCD size of the product is middle.
“Varitronix Limited reserves the right to change this specification.”
FAX:(852) 2343-9555.
URL:http://www.varitronix.com
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