FX-424-DAF-A2C1 [VECTRON]
Low Jitter Frequency Translator; 低抖动频率转换器
| 型号： | FX-424-DAF-A2C1 |
| 厂家： | 
Vectron International, Inc |
| 描述： | Low Jitter Frequency Translator |
| 文件： | 总8页 (文件大小：269K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary Data Sheet
FX-424
Low Jitter Frequency Translator
Features
•
•
•
•
•
•
•
•
•
Quartz-based PLL for Ultra-Low Jitter
Frequency Translation up to 850 MHz
Accepts up to 4 ext.-muxed clock inputs
CMOS / LVDS / LVPECL Inputs compatible
Differential LVPECL or LVCMOS Output
Lock Detect / Loss of Signal Alarms
Output Disable
20.3 x 13.7 x 5.1 mm SMT package
RoHS/Lead Free Compliant
Description
Applications
•
•
•
•
•
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Wireless Infrastructure
10 Gigabit FC
The FX-424 is a precision quartz-based frequency
translator used to translate an input frequency such
as 8 kHz, 1.544 MHz, 2.048 MHz, 19.44 MHz etc.
to any specific frequency from 1.544 MHz to 850
MHz. The FX-424 can perform either up or down
frequency conversion. The FX-424’s superior jitter
performance is achieved through the use of a
precision VCXO or VCSO. With the use of an
external multiplexer, up to 4 different input clocks
can be translated to a common output frequency.
10GbE LAN / WAN
OADM and IP Routers
Test Equipment
Military Communcations
Figure 1. Functional Block Diagram
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 1 of 8
Rev: 18Dec05
FX-424 Low Jitter Frequency Translator
Table 1. Electrical Performance
Parameter
Symbol Minimum Typical Maximum Units
Notes
Frequency
1,2,3
1,2,3
1,2,3
Input Frequency
Capture Range
Output Frequency
FIN
APR
FOUT
0.008
±40
1.544
170
850
MHz
ppm
MHz
Supply
Voltage
2,3
3
3.13
3.3
45
3.46
60
V
mA
VCC
ICC
Current (No Load)
Input Signal
CMOS
LVPECL
FIN
FIN
CMOS
LVPECL
2,3
2,3
LVCMOS
LVCMOS Output (Option A)
Differential Output (Option F)
Common Mode Output Voltage
Output High Voltage
Output Low Voltage
Peak-to-Peak Output Voltage
Rise Time
2,3
2,3
2,3
2,3
4,5
4,5
2,3
VOCM
VOH
VOL
VP-P
tR
V
CC-1.5
VCC-1.3
VCC-1.1
V
V
V
VCC-1.025
VCC-0.950
VCC-0.880
VCC-1.810
VCC-1.700
700
VCC-1.620
mV-pp
ns
ns
0.5
0.5
50
tF
SYM
Fall Time
Symmetry
45
55
%
SSB Phase Noise, FOUT = 155.52/622.08
@ 10 Hz Offset
-64/-27
-95/-55
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Φn
Φn
Φn
Φn
Φn
Φn
Φn
@ 100 Hz Offset
@ 1 kHz Offset
@ 10 kHz Offset
@ 100 kHz Offset
@ 1 MHz Offset
@ 10 MHz Offset
-123/-85
-143/-110
-146/-130
-146/-146
-146/-146
5,6
50
ps RMS
°C
5, 6
1,3
Jitter Generation
ΦJ
TOP
-40
85
Operating Temperature
1. See Standard Frequencies and Ordering Information.
2. Parameters are tested with production test circuit below (Fig 2).
3. Parameters are tested at ambient temperature with test limits guard-banded for specified operating temperature.
4. Measured from 20% to 80% of a full output swing (Fig 3).
5. Not tested in production, guaranteed by design, verified at qualification.
6. The FX-424 phase noise and jitter performance can be optimized for specific applications. Please consult with Vectron’s Application
Engineers for more information.
Figure 2. Test Circuit
Figure 3. LVPECL Waveform
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 2 of 8
Rev: 18Dec05
FX-424 Low Jitter Frequency Translator
Figure 4. Pin Configuration
Table 2. Pin Out
Pin #
Symbol
SEL0
I/O
I
Level
LVTTL
LVTTL
Supply
Function
Input Frequency Select*
1
2
3
4
SEL1
I
Input Frequency Select*
Case and Electrical Ground
Not present
GND
GND
VCXO Control Voltage Monitor
VMON
OD
O
I
Analog
5
6
Under locked conditions VMON should be > 0.3V and <3.0V. The input
frequency may be out of range if the voltage exceeds these levels.
Output Disable
Disabled = Logic “1”
Enabled = Logic “0” or no connect
LVCMOS
Supply
GND
GND
O
7
8
Case and Electrical Ground
LVPECL or
LVCMOS
FOUT
Frequency Output
O or
GND
LVPECL or
LVCMOS
Complementary Frequency Output – Note for LVCMOS option this pad
will be tied to GND.
CFOUT
LD
9
Lock Detect
Locked = Logic “1”
Loss of Signal = Logic “0”
O
LVCMOS
Supply
10
GND
GND
GND
GND
11
12
Case and Electrical Ground
Case and Electrical Ground
Supply
LVCMOS or
LVPECL
Supply
Input Frequency. The FX-424 series AC couples the input for handling of
either LVCMOS or LVPECL input signals.
FIN
I
13
VCC
VCC
14
Power Supply Voltage (3.3 V ±5%)
*
For applications requiring two to four input frequencies, Vectron will assign a unique part number and the Input Frequency versus SEL[1:0]
settings will be provided in a Specification Control Drawing. For single input configurations it is recommended that SEL0 and SEL1 are tied
to ground.
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 3 of 8
Rev: 12Dec05
FX-424 Low Jitter Frequency Translator
Outline Diagram
Suggested Pad Layout
Figure 6.
Figure 5.
Table 3. Absolute Maximum Ratings
Parameter
Symbol
Ratings
0 to 6
Unit
V
Power Supply
VCC
IOUT
TS
Output Current
mA
Storage Temperature
Soldering Temp/Time
-55 to 125
260/40
°C
TLS
°C/sec
Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is
not implied at these or any other conditions in excess of conditions represented in the operational sections of this
data sheet. Exposure to absolute maximum ratings for extended periods may adversely affect device reliability.
Reliability
VI qualification includes aging at various extreme temperatures, shock and vibration, temperature cycling, and IR
reflow simulation. The FX-424 family is undergoing the following qualification tests:
Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Solderability
Conditions
MIL-STD-883, Method 2002
MIL-STD-883, Method 2007
MIL-STD-883, Method 2003
MIL-STD-883, Method 1014
MIL-STD-883, Method 2016
Gross and Fine Leak
Resistance to Solvents
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 4 of 8
Rev: 18Dec05
FX-424 Low Jitter Frequency Translator
eliability
Handling Precautions
Although ESD protection circuitry has been designed into the FX-424 proper precautions should be taken when
handling and mounting. VI employs a human body model (HBM) and a charged-device model (CDM) for ESD
susceptibility testing and design protection evaluation
ESD Ratings
Model
Minimum
500 V
Conditions
Human Body Model
Charged Device Model
MIL-STD 883, Method 3015
JEDEC, JESD22-C101
500 V
Reflow Profile (IPC/JEDEC J-STD-020C)
Parameter
PreHeat Time
Symbol
t S
Value
60 sec Min, 180 sec Max
3 oC/sec Max
Ramp Up
R UP
t L
Time Above 217 oC
Time To Peak Temperature
Time At 260 oC
60 sec Min, 150 sec Max
480 sec Max
t AMB-P
t P
20 sec Min, 40 sec Max
6 oC/sec Max
Ramp Down
R DN
The FX-424 is being qualified to meet the JEDEC
standard for Pb-Free assembly. The temperatures
and time intervals listed are based on the Pb-Free
small body requirements. The temperatures refer to
the topside of the package, measured on the package
body surface. The FX-424 should not be subjected to
a wash process that will immerse it in solvents. NO
t L
t P
260
R
217
200
R DN
150
CLEAN is the recommended procedure. The FX-424
.
has been designed for pick and place reflow
soldering. The FX-424 may be reflowed once and
should not be reflowed in the inverted position.
t S
t AMB-P
25
Time (sec)
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 5 of 8
Rev: 12Dec05
FX-424 Low Jitter Frequency Translator
Application Circuits
+3.3V
10uF
0.1uF
100pF
+3.3V
R1
130
R1
130
14
VCC
Z = 50
Z = 50
FOUT
8
9
Output Frequency
CFOUT
13
FIN
Input Frequency
R2
82
R2
82
FX-424
1
2
SEL0
SEL1
5
VMON
LD
10
6
OD
1
Figure 7. Single Input Frequency Translation - LVPECL Termination
+3.3V
10uF
0.1uF
100pF
+3.3V
R1
130
R1
130
Input Frequencies
14
VCC
F1
F2
F3
F3
0 0
0 1
1 0
11
FOUT
8
9
Z = 50
Z = 50
Output Frequency
CFOUT
13
6
FIN
R2
82
R2
82
FX-424
OD
5
VMON
LD
1
2
SEL0
SEL1
10
1
Figure 8. Four Input Frequencies Translated to Common Output Frequency – LVPECL Termination
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Rev: 18Dec05
Page 6 of 8
FX-424 Low Jitter Frequency Translator
Tape and Reel (EIA-481-2-A)
Po
ØDo
W2
F
W
C
N
A
D
W1
P1
B
Tape Dimensions (mm)
Reel Dimensions (mm)
Dimension
Tolerance
FX-424
W
F
Do
Po
P1
A
B
C
D
N
W1
W2 # Per
Typ Typ Typ Typ Typ Typ Min Typ Min Min Typ Max Reel
44
20.2
1.5
4
20
330
1.5
13
20.2
100
44.4 50.4
100
Vectron plans to offer both tape-n-reel and matrix trays as packaging options for the FX-424. The standard
shipping container for volume production is a matrix tray. The trays are 100% recyclable and offer the added
feature that they can be continuously fed into a pick-n-place machine. (Matrix tray drawing not currently
available)
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 7 of 8
Rev: 12Dec05
FX-424 Low Jitter Frequency Translator
Standard Frequencies
8 kHz
16 kHz
64 kHz
C
D
E
F
H
J
K
L
M
N
P
R
26.00 MHz
27.00 MHz
38.88 MHz
44.736 MHz
51.84 MHz
T
W
X
Y
0
1
2
3
4
622.08 MHz
666.5143 MHz
8
9
1.024 MHz
1.544 MHz
2.048 MHz
4.096 MHz
8.192 MHz
13.000 MHz
16.384 MHz
19.440 MHz
61.44 MHz
77.76 MHz
82.944 MHz
112.000 MHz
139.264 MHz
155.520 MHz
166.6286 MHz
5
6
7
20.480 MHz
Not all combinations are possible.
Special SCD
S
Ordering Information
For Additional Information, Please Contact:
USA: Vectron International, 267 Lowell Rd, Hudson, NH 03051 . . . .Tel: 1-88-VECTRON-1
EUROPE: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tel: +49 (0) 7268 8010
ASIA: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tel: +86-21-5048-0777
Fax: 1-888-FAX-VECTRON
Fax: +49 (0) 7268 8012 81
Fax: +86-21-5048-1881
Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice.
No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information.
Vectron International, 267 Lowell Road, Hudson, NH 03051
Tel: 1-88-VECTRON-1 • Web: www.vectron.com
Page 8 of 8
Rev: 18Dec05
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