BCM6123T60E10A5T00 [VICOR]
DC/DC CONVERTER 1500W;
| 型号： | BCM6123T60E10A5T00 |
| 厂家： | 
VICOR CORPORATION |
| 描述： | DC/DC CONVERTER 1500W |
| 文件： | 总29页 (文件大小：2093K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BCM® Bus Converter
BCM6123x60E10A5yzz
S
®
C
NRTL US
C
US
Isolated Fixed-Ratio DC-DC Converter
Features & Benefits
Product Ratings
•
•
•
•
•
•
•
Up to 150A continuous secondary current
Up to 2206W/in3 power density
97.6% peak efficiency
VPRI = 54V (36 – 60V)
ISEC = up to 150A
K = 1/6
V
SEC = 9V (6 – 10V)
(no load)
2,250VDC isolation
Product Description
Parallel operation for multi-kW arrays
OV, OC, UV, short circuit and thermal protection
BCM6123 through-hole ChiP package
The BCM6123x60E10A5yzz is a high-efficiency Bus Converter,
operating from a 36 to 60VDC primary bus to deliver an isolated,
ratiometric secondary voltage from 6 to 10VDC
.
ꢀ2.402 x 0.990 x 0.284in
The BCM6123x60E10A5yzz offers low noise, fast transient
response, and industry leading efficiency and power density. In
addition, it provides an AC impedance beyond the bandwidth of
most downstream regulators, allowing input capacitance normally
located at the input of a PoL regulator to be located at the primary
side of the BCM. With a primary to secondary K factor of 1/6, that
capacitance value can be reduced by a factor of 36x, resulting in
savings of board area, material and total system cost.
[61.00 x 25.14 x 7.21mm]
•
PMBus™ management interface [a]
Typical Applications
•
•
•
•
•
•
High-End Computing Systems
Automated Test Equipment
Industrial Systems
Leveraging the thermal and density benefits of Vicor ChiP
packaging technology, the BCM offers flexible thermal
management options with very low top and bottom side thermal
impedances. Thermally-adept ChiP-based power components
enable customers to achieve low cost power system solutions
with previously unattainable system size, weight and efficiency
attributes quickly and predictably.
High-Density Power Supplies
Communications Systems
Transportation
[a] When used with D44TL1A0 and I13TL1A0
BCM® Bus Converter
Page 1 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Typical Applications
BCM
TM
EN
enable/disable
switch
VAUX
F1
+VPRI
–VPRI
+VSEC
VPRI
CPRI
PoL
–VSEC
GND
PRIMARY
SECONDARY
ISOLATION BOUNDARY
BCM6123x60E10A5y00 at point-of-load
BCM
SER-OUT
SER-OUT
EN
SER-IN
enable/disable
switch
SER-IN
FUSE
+VPRI
–VPRI
+VSEC
VPRI
C
PoL
I_BCM_ELEC
–VSEC
PRIMARY
SECONDARY
SOURCE_RTN
Digital
Supervisor
D44TL1A0
ISOLATION BOUNDARY
Digital Isolator
Host µC
I13TL1A0
NC
PRI_OUT_A
SEC_IN_A
SEC_IN_B
SEC_OUT_C
SEC_COM
VDDB
t
SER-IN
+
–
V
EXT
VDD
TXD
PRI_OUT_B
PRI_IN_C
SER-OUT
SGND
RXD
PRI_COM
SGND
PMBus
PMBus
SGND
SGND
SGND
BCM6123x60E10A5y01 at point-of-load
BCM® Bus Converter
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07/2018
BCM6123x60E10A5yzz
Pin Configuration
TOP VIEW
2
1
A’ +VSEC
A
B
C
D
E
+VSEC
–VSEC
2
2
B’
C’
–VSEC1
–VSEC
–VSEC
1
+VSEC
+VSEC
D’ +VSEC
E’ +VSEC
–VSEC
2
2
F’
–VSEC
1
1
F
G
H
G’
–VSEC
–VSEC
+VSEC
H’ +VSEC
+VPRI
+VPRI
+VPRI
I’
J’
K’
I
J
TM/SER-OUT
EN
VAUX/SER-IN
K
–VPRI
+VPRI
L’
L
BCM6123 ChiP™
Pin Descriptions
Power Pins
Pin Number
Signal Name
Type
Function
I1, J1, K1, L1
+VPRI
PRIMARY POWER
Positive primary transformer power terminal
Negative primary transformer power terminal
PRIMARY POWER
RETURN
L’2
–VPRI
A1, D1, E1, H1, A’2,
D’2, E’2, H’2
SECONDARY
POWER
+VSEC
Positive secondary transformer power terminal
Negative secondary transformer power terminal
B1, C1, F1, G1
B’2, C’2, F’2, G’2
SECONDARY
POWER RETURN
[b]
–VSEC
Analog Control Signal Pins
Pin Number
Signal Name
Type
Function
I’2
J’2
TM
EN
OUTPUT
INPUT
Temperature Monitor; primary side referenced signals
Enables and disables power supply; primary side referenced signals
Auxiliary Voltage Source; primary side referenced signals
K’2
VAUX
OUTPUT
PMBus™ Control Signal Pins
Pin Number
Signal Name
Type
Function
I’2
J’2
SER-OUT
EN
OUTPUT
INPUT
UART transmit pin; Primary side referenced signals
Enables and disables power supply; Primary side referenced signals
UART receive pin; Primary side referenced signals
K’2
SER-IN
INPUT
[b] For proper operation an external low impedance connection must be made between listed –VSEC1 and –VSEC2 terminals.
BCM® Bus Converter
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Rev 1.4
07/2018
BCM6123x60E10A5yzz
Part Ordering Information
Max
Secondary
Voltage
Secondary
Output
Current
Product
Function
Package Package
Max Primary
Range
Identifier
Temperature
Option
Size
Mounting Input Voltage
Grade
BCM
6123
x
60
E
10
A5
y
zz
00 = Analog Ctrl
01 = PMBus Ctrl
T = –40 to 125°C
Bus Converter
Module
61 = L
23 = W
10V
No Load
T = TH
60V
36 – 60V
150A
M = –55 to 125°C 0R = Reversible Analog Ctrl
0P = Reversible PMBus Ctrl
All products shipped in JEDEC standard high profile (0.400” thick) trays (JEDEC Publication 95, Design Guide 4.10).
Standard Models
Max
Secondary
Voltage
Secondary
Output
Current
Product
Function
Package
Size
Package
Mounting
Max Primary
Input Voltage
Range
Identifier
Temperature
Grade
Option
BCM
BCM
6123
6123
T
T
60
60
E
E
10
10
A5
A5
T
T
00
01
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter
Comments
Min
Max
Unit
+VPRI_DC to –VPRI_DC
–1
80
V
VPRI_DC or VSEC_DC Slew Rate
(Operational)
1
V/µs
+VSEC_DC to –VSEC_DC
TM/SER-OUT to –VPRI_DC
EN to –VPRI_DC
–1
15
4.6
5.5
4.6
V
V
V
V
–0.3
VAUX/SER-IN to –VPRI_DC
BCM® Bus Converter
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BCM6123x60E10A5yzz
Electrical Specifications
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
General Powertrain PRIMARY to SECONDARY Specification (Forward Direction)
Primary Input Voltage Range
(Continuous)
VPRI_DC
36
60
V
V
VPRI_DC voltage where µC is initialized,
(i.e., VAUX = Low, powertrain inactive)
VPRI µController
VµC_ACTIVE
14
Disabled, EN Low, VPRI_DC = 54V
TINTERNAL ≤ 100ºC
5
PRI to SEC Input Quiescent Current
IPRI_Q
mA
10
9
VPRI_DC = 54V, TINTERNAL = 25ºC
VPRI_DC = 54V
7.2
5
14
12
17
PRI to SEC No-Load
Power Dissipation
PPRI_NL
W
VPRI_DC = 36 – 60V, TINTERNAL = 25ºC
VPRI_DC = 36 – 60V
VPRI_DC = 60V, CSEC_EXT = 6000μF,
RLOAD_SEC = 20% of full-load current
30
PRI to SEC Inrush Current Peak
IPRI_INR_PK
A
TINTERNAL ≤ 100ºC
35
DC Primary Input Current
Transformation Ratio
IPRI_IN_DC
K
At ISEC_OUT_DC = 150A, TINTERNAL ≤ 100ºC
Primary to secondary, K = VSEC_DC / VPRI_DC, at no load
25.5
A
1/6
V/V
Secondary Output Current
(Continuous)
ISEC_OUT_DC
150
180
A
A
10ms pulse, 25% duty cycle,
ISEC_OUT_AVG ≤ 50% of rated ISEC_OUT_DC
Secondary Output Current (Pulsed)
ISEC_OUT_PULSE
VPRI_DC = 54V, ISEC_OUT_DC = 150A
VPRI_DC = 36 – 60V, ISEC_OUT_DC = 150A
VPRI_DC = 54V, ISEC_OUT_DC = 75A
VPRI_DC = 54V, ISEC_OUT_DC = 150A
96.1
94.5
96.9
95.4
96.7
PRI to SEC Efficiency (Ambient)
PRI to SEC Efficiency (Hot)
ηAMB
%
97.6
96
ηHOT
η20%
%
%
PRI to SEC Efficiency
(Over Load Range)
30A < ISEC_OUT_DC < 150A
90
RSEC_COLD
RSEC_AMB
RSEC_HOT
FSW
VPRI_DC = 54V, ISEC_OUT_DC = 150A, TINTERNAL = –40°C
VPRI_DC = 54V, ISEC_OUT_DC = 150A
0.9
1.2
1.2
1.6
2
1.5
2
PRI to SEC Output Resistance
mΩ
VPRI_DC = 54V, ISEC_OUT_DC = 150A, TINTERNAL = 100°C
Frequency of the output voltage ripple = 2x FSW
1.6
2.2
0.95
Switching Frequency
0.85
0.90
MHz
mV
CSEC_EXT = 0μF, ISEC_OUT_DC =150A, VPRI_DC = 54V,
20MHz BW
140
Secondary Output Voltage Ripple
VSEC_OUT_PP
TINTERNAL ≤ 100ºC
200
Primary Input Leads Inductance
(Parasitic)
Frequency 2.5MHz (double switching frequency),
simulated lead model
LPRI_IN_LEADS
6.7
nH
nH
Secondary Output Leads Inductance
(Parasitic)
Frequency 2.5MHz (double switching frequency),
simulated lead model
LSEC_OUT_LEADS
0.64
BCM® Bus Converter
Page 5 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
General Powertrain PRIMARY to SECONDARY Specification (Forward Direction) Cont.
Effective Primary Capacitance
(Internal)
CPRI_INT
CSEC_INT
CSEC_OUT_EXT
Effective value at 54VPRI_DC
Effective value at 9VSEC_DC
11.2
202
µF
µF
µF
Effective Secondary Capacitance
(Internal)
Rated Secondary Output
Capacitance (External)
Excessive capacitance may drive module
into short-circuit protection
6000
Rated Secondary Output Capacitance
(External), Parallel Array Operation
CSEC_OUT_AEXT Max = N • 0.5 • CSEC_OUT_EXT MAX, where
N = the number of units in parallel
CSEC_OUT_AEXT
Powertrain Protection PRIMARY to SECONDARY (Forward Direction)
Start up into a persistent fault condition. Non-latching
fault detection given VPRI_DC > VPRI_UVLO+
Auto Restart Time
tAUTO_RESTART
VPRI_OVLO+
VPRI_OVLO–
490
560
71
ms
V
Primary Overvoltage
Lockout Threshold
63
61
67
65
2
Primary Overvoltage
Recovery Threshold
69
V
Primary Overvoltage
Lockout Hysteresis
VPRI_OVLO_HYST
tPRI_OVLO
V
Primary Overvoltage
Lockout Response Time
100
1
µs
ms
A
From powertrain active; fast current limit protection
disabled during soft start
Secondary Soft-Start Time
tSEC_SOFT-START
ISEC_OUT_OCP
tSEC_OUT_OCP
ISEC_OUT_SCP
tSEC_OUT_SCP
tOTP+
Secondary Output Overcurrent
Trip Threshold
170
225
125
210
3
240
Secondary Output Overcurrent
Response Time Constant
Effective internal RC filter
ms
A
Secondary Output Short-Circuit
Protection Trip Threshold
Secondary Output Short-Circuit
Protection Response Time
1
µs
°C
Overtemperature
Shut-Down Threshold
Temperature sensor located inside controller IC
BCM® Bus Converter
Page 6 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade); All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Powertrain Supervisory Limits PRIMARY to SECONDARY (Forward Direction)
Primary Overvoltage
Lockout Threshold
VPRI_OVLO+
VPRI_OVLO–
VPRI_OVLO_HYST
tPRI_OVLO
64
60
66
64
2
68
66
V
V
Primary Overvoltage
Recovery Threshold
Primary Overvoltage
Lockout Hysteresis
V
Primary Overvoltage
Lockout Response Time
100
28
30
2
µs
V
Primary Undervoltage
Lockout Threshold
VPRI_UVLO–
VPRI_UVLO+
VPRI_UVLO_HYST
tPRI_UVLO
26
28
30
32
Primary Undervoltage
Recovery Threshold
V
Primary Undervoltage
Lockout Hysteresis
V
Primary Undervoltage
Lockout Response Time
100
µs
From VPRI_DC = VPRI_UVLO+ to powertrain active, EN
Primary-to-Secondary Start-Up Delay tPRI_TO_SEC_DELAY floating (i.e., one-time start-up delay from application
of VPRI_DC to VSEC_DC
20
ms
)
Secondary Output Overcurrent
Trip Threshold
ISEC_OUT_OCP
tSEC_OUT_OCP
tOTP+
192
204
3
216
A
ms
°C
°C
°C
s
Secondary Output Overcurrent
Response Time Constant
Effective internal RC filter
Overtemperature
Shut-Down Threshold
Temperature sensor located inside controller IC
125
Overtemperature
Recovery Threshold
tOTP–
105
110
3
115
–45
Undertemperature
Shut-Down Threshold
Temperature sensor located inside controller IC;
Protection not available for M-Grade units.
tUTP
Start up into a persistent fault condition. Non-latching
fault detection given VPRI_DC > VPRI_UVLO+
Undertemperature Restart Time
tUTP_RESTART
BCM® Bus Converter
Page 7 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade); All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
General Powertrain SECONDARY to PRIMARY Specification (Reverse Direction)
Secondary Input Voltage Range
(Continuous)
VSEC_DC
6
10
V
VSEC_DC = 9V, TINTERNAL = 25ºC
VSEC_DC = 9V
7.2
9
14
12
17
152
25
5
SEC to PRI No-Load
Power Dissipation
PSEC_NL
W
VSEC_DC = 6 – 10V, TINTERNAL = 25ºC
VSEC_DC = 6 – 10V
DC Secondary Input Current
ISEC_IN_DC
At IPRI_DC = 25A, TINTERNAL ≤ 100ºC
A
A
Primary Output Current (Continuous)
IPRI_OUT_DC
10ms pulse, 25% duty cycle,
IPRI_OUT_AVG ≤ 50% of rated IPRI_OUT_DC
Primary Output Current (Pulsed)
IPRI_OUT_PULSE
30
A
VSEC_DC = 9V, IPRI_OUT_DC = 25A
VSEC_DC = 6 – 10V, IPRI_OUT_DC= 25A
VSEC_DC = 9V, IPRI_OUT_DC = 12.5A
VSEC_DC = 9V, IPRI_OUT_DC = 25A
96.0
93.8
96.9
95.4
96.5
SEC to PRI Efficiency (Ambient)
SEC to PRI Efficiency (Hot)
ηAMB
%
97.5
95.9
ηHOT
η20%
%
%
SEC to PRI Efficiency
(Over Load Range)
5A < IPRI_OUT_DC < 25A
90
RPRI_COLD
RPRI_AMB
RPRI_HOT
VSEC_DC = 9V, IPRI_OUT_DC = 25A, TINTERNAL = –40°C
VSEC_DC = 9V, IPRI_OUT_DC = 25A
47
61
76
55
72
84
63
83
92
SEC to PRI Output Resistance
Primary Output Voltage Ripple
mΩ
mV
VSEC_DC = 9V, IPRI_OUT_DC = 25A, TINTERNAL = 100°C
CPRI_OUT_EXT = 0μF, IPRI_OUT_DC = 25A,
VSEC_DC = 9V, 20MHz BW
800
VPRI_OUT_PP
TINTERNAL ≤ 100ºC
1200
BCM® Bus Converter
Page 8 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade); All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Protection SECONDARY to PRIMARY (Reverse Direction)
Effective Primary Output
Capacitance (External)
Excessive capacitance may drive module
into SC protection
CPRI_OUT_EXT
VSEC_OVLO+
tPRI_OVLO
VSEC_UVLO–
tSEC_UVLO
100
V
V
Secondary Overvoltage
Lockout Threshold
Module latched shut down with VPRI_DC < VPRI_UVLO–_R
10.6
4.3
11.2
100
4.7
11.8
Secondary Overvoltage
Lockout Response Time
µs
V
Secondary Undervoltage
Lockout Threshold
Module latched shut down with VPRI_DC < VPRI_UVLO–_R
5.1
Secondary Undervoltage
Lockout Response Time
100
µs
Applies only to reversible products in forward and in
reverse direction; IPRI_DC ≤ 20% while
VPRI_UVLO–_R < VPRI_DC < VPRI_MIN
Primary Undervoltage
Lockout Threshold
VPRI_UVLO–_R
26
28
28
30
32
V
Primary Undervoltage
Recovery Threshold
Applies only to reversible products in forward and in
reverse direction
VPRI_UVLO+_R
VPRI_UVLO_HYST_R
IPRI_OUT_OCP
tPRI_OUT_OCP
IPRI_SCP
30
2
V
V
Primary Undervoltage
Lockout Hysteresis
Applies only to reversible products in forward and in
reverse direction
Primary Output Overcurrent
Trip Threshold (Analog)
Module latched shutdown with VPRI_DC < VPRI_UVLO–_R
Effective internal RC filter
28.3
37.5
32
35
3
40
A
Primary Output Overcurrent
Response Time Constant (Analog)
ms
A
Primary Short Circuit Protection
Trip Threshold
Module latched shutdown with VPRI_DC < VPRI_UVLO–_R
Primary Short Circuit Protection
Response Time
tPRI_SCP
1
34
3
µs
A
Primary Output Overcurrent
Trip Threshold (PMBus™)
IPRI_OUT_OCP
tPRI_OUT_OCP
Module latched shutdown with VPRI_DC < VPRI_UVLO–_R
Effective internal RC filter
36
Primary Output Overcurrent
Response Time Constant (PMBus)
ms
BCM® Bus Converter
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Operating Area
175
150
125
100
75
50
25
0
20
30
40
50
60
70
80
90 100 110 120
Case Temperature (°C)
Top only at temperature
Top and leads at temperature
Top, leads and belly at temperature
Figure 1 — Specified thermal operating area
2000
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
200
150
100
50
0
800
36
38
41
43
46
48
50
53
55
58
60
36
38
41
43
46
48
50
53
55
58
60
Primary Input Voltage (V)
Primary Input Voltage (V)
ISEC_OUT_DC
ISEC_OUT_PULSE
PSEC_OUT_DC
PSEC_OUT_PULSE
Figure 2 — Specified electrical operating area using rated RSEC_HOT
110
100
90
80
70
60
50
40
30
20
10
0
0
20
40
60
80
100
Secondary Output Current (% ISEC_DC
)
Figure 3 — Specified primary start up into load current and external capacitance
BCM® Bus Converter
Page 10 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Analog Control Signal Characteristics
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade); All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Temperature Monitor
• The TM pin is a standard analog I/O configured as an output from an internal µC.
• The TM pin monitors the internal temperature of the controller IC within an accuracy of 5°C.
• µC 250kHz PWM output internally pulled high to 3.3V.
Signal Type
State
Attribute
Symbol
Conditions / Notes
Min
Typ
100
Max Unit
Powertrain Active
to TM Time
Start Up
tTM
µs
TM Duty Cycle
TM Current
TMPWM
ITM
18.18
68.18
4
%
mA
Recommended external filtering
TM Capacitance (External)
TM Resistance (External)
CTM_EXT
RTM_EXT
Recommended external filtering
Recommended external filtering
0.01
1
µF
DIGITAL
OUTPUT
kΩ
Regular
Operation
Specifications using recommended filter
TM Gain
ATM
10
mV / °C
V
TM Voltage Reference
VTM_AMB
Internal temperature = 27ºC
1.27
RTM_EXT = 1kΩ, CTM_EXT = 0.01µF,
VPRI_DC = 54V, ISEC_DC = 150A
28
TM Voltage Ripple
VTM_PP
mV
TINTERNAL ≤ 100ºC
40
Enable / Disable Control
• The EN pin is a standard analog I/O configured as an input to an internal µC.
• It is internally pulled high to 3.3V.
• When held low, the BCM internal bias will be disabled and the powertrain will be inactive.
• In an array of BCMs, EN pins should be interconnected to synchronize start up.
Signal Type
State
Attribute
Symbol
Conditions / Notes
Min
2.3
Typ
250
Max Unit
VPRI_DC > VPRI_UVLO+, EN held low both
conditions satisfied for T > tPRI_UVLO+_DELAY
EN to Powertrain
Active Time
Start Up
tEN_START
µs
ANALOG
INPUT
EN Voltage Threshold
EN Resistance (Internal)
EN Disable Threshold
VEN_TH
REN_INT
V
Regular
Operation
Internal pull-up resistor
1.5
kΩ
VEN_DISABLE_TH
1
V
BCM® Bus Converter
Page 11 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Analog Control Signal Characteristics (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade); All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Auxiliary Voltage Source
• The VAUX pin is a standard analog I/O configured as an output from an internal µC.
• VAUX is internally connected to µC output and internally pulled high to a 3.3V regulator with 2% tolerance, a 1% resistor of 1.5kΩ.
• VAUX can be used as a “Ready to process full power” flag. This pin transitions VAUX voltage after a 2ms delay from the start of powertrain activating,
signaling the end of soft start.
• VAUX can be used as “Fault flag”. This pin is pulled low internally when a fault protection is detected.
Signal Type
State
Attribute
Symbol
Conditions / Notes
Min
2.8
Typ
2
Max Unit
Powertrain Active to
VAUX Time
Start Up
tVAUX
Powertrain active to VAUX High
ms
VAUX Voltage
VVAUX
IVAUX
3.3
4
V
VAUX Available Current
mA
50
10
ANALOG
OUTPUT
Regular
Operation
VAUX Voltage Ripple
VVAUX_PP
mV
µF
TINTERNAL ≤ 100ºC
100
VAUX Capacitance
(External)
CVAUX_EXT
0.01
VAUX Resistance (External)
VAUX Fault Response Time
RVAUX_EXT
tVAUX_FR
VPRI_DC < VµC_ACTIVE
1.5
kΩ
µs
Fault
From fault to VVAUX = 2.8V, CVAUX = 0pF
BCM® Bus Converter
Page 12 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
PMBus™ Control Signal Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade); All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
UART SER-IN / SER-OUT Pins
• Universal Asynchronous Receiver/Transmitter (UART) pins.
• The BCM communication version is not intended to be used without a Digital Supervisor.
• Isolated I2C communication and telemetry is available when using Vicor Digital Isolator and Vicor Digital Supervisor. Please see specific product data sheet
for more details.
• UART SER-IN pin is internally pulled high using a 1.5kΩ to 3.3V.
Signal Type
State
Attribute
Baud Rate
Symbol
Conditions / Notes
Min
Typ
750
Max
Unit
GENERAL I/O
BRUART
Rate
Kbit/s
SER-IN Pin
VSER-IN_IH
VSER-IN_IL
2.3
V
V
SER-IN Input Voltage Range
1
DIGITAL
INPUT
SER-IN Rise Time
SER-IN Fall Time
tSER-IN_RISE 10 – 90%
tSER-IN_FALL 10 – 90%
RSER-IN_PLP Pull up to 3.3V
CSER-IN_EXT
400
25
ns
ns
kΩ
pF
SER-IN RPULLUP
1.5
Regular
Operation
SER-IN External Capacitance
SER-OUT Pin
400
0.5
6
VSER-OUT_OH 0mA ≥ IOH ≥ –4mA
VSER-OUT_OL 0mA ≤ IOL ≤ 4mA
tSER-OUT_RISE 10 – 90%
2.8
V
V
SER-OUT Output
Voltage Range
DIGITAL
OUTPUT
SER-OUT Rise Time
55
45
ns
ns
mA
Ω
SER-OUT Fall Time
tSER-OUT_FALL 10 – 90%
SER-OUT Source Current
SER-OUT Output Impedance
ISER-OUT
ZSER-OUT
VSER-OUT = 2.8V
120
Enable / Disable Control
• The EN pin is a standard analog I/O configured as an input to an internal µC.
• It is internally pulled high to 3.3V.
• When held low, the BCM internal bias will be disabled and the powertrain will be inactive.
• In an array of BCMs, EN pins should be interconnected to synchronize start up.
• PMBus ON/OFF command has no effect if the BCM EN pin is not in the active state. This BCM has active high EN pin logic.
Signal Type
State
Attribute
Symbol
Conditions / Notes
Min
Typ
250
Max
Unit
VPRI_DC > VPRI_UVLO+
,
Start Up
EN to Powertrain Active Time
tEN_START
EN held low both conditions satisfied
for t > tPRI_UVLO+_DELAY
µs
ANALOG
INPUT
EN Voltage Threshold
EN Resistance (Internal)
EN Disable Threshold
VENABLE
REN_INT
2.3
V
kΩ
V
Regular
Operation
Internal pull-up resistor
1.5
VEN_DISABLE_TH
1
BCM® Bus Converter
Page 13 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
PMBus™ Reported Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade); All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Monitored Telemetry
• The BCM communication version is not intended to be used without a Digital Supervisor.
• The current telemetry is only available in forward operation. The input and output current reported value is not supported in reverse operation.
Digital Supervisor
PMBus Read Command
Accuracy
(Rated Range)
Functional
Reporting Range
Update
Rate
Attribute
Reported Units
Input Voltage
(88h) READ_VIN
(89h) READ_IIN
5% (LL – HL)
28 – 66V
0 – 34A
100µs
100µs
100µs
100µs
100ms
100ms
VACTUAL = VREPORTED x 10–1
IACTUAL = IREPORTED x 10–2
VACTUAL = VREPORTED x 10–1
IACTUAL = IREPORTED x 10–2
RACTUAL = RREPORTED x 10–5
TACTUAL = TREPORTED
20% (10 – 20% of FL)
5% (20 – 133% of FL)
Input Current
Output Voltage [b]
Output Current
Output Resistance
Temperature [c]
(8Bh) READ_VOUT
5% (LL – HL)
4.7 – 11V
0 – 204A
20% (10 – 20% of FL)
5% (20 – 133% of FL)
(8Ch) READ_IOUT
5% (50 – 100% of FL) at NL
10% (50 – 100% of FL) (LL – HL)
(D4h) READ_ROUT
0.5 – 3mΩ
–55 to 130ºC
(8Dh) READ_TEMPERATURE_1
7°C (Full Range)
[c] Default READ Output Voltage returned when unit is disabled = –300V.
[d] Default READ Temperature returned when unit is disabled = –273°C.
Variable Parameter
• Factory setting of all below Thresholds and Warning limits are 100% of listed protection values.
• Variables can be written only when module is disabled either EN pulled low or VIN < VIN_UVLO–
.
• Module must remain in a disabled mode for 3ms after any changes to the below variables allowing ample time to commit changes to EEPROM.
Functional
Reporting
Range
Digital Supervisor
Accuracy
(Rated Range)
Default
Value
Attribute
Conditions / Notes
PMBus Command [d]
Input / Output Overvoltage
Protection Limit
VIN_OVLO– is automatically 3%
lower than this set point
(55h) VIN_OV_FAULT_LIMIT
(57h) VIN_OV_WARN_LIMIT
(D7h) DISABLE_FAULTS
(5Bh) IIN_OC_FAULT_LIMIT
(5Dh) IIN_OC_WARN_LIMIT
(4Fh) OT_FAULT_LIMIT
5% (LL – HL)
5% (LL – HL)
5% (LL – HL)
28 – 66V
28 – 66V
14 – 36V
0 – 34A
100%
100%
100%
100%
100%
100%
100%
0ms
Input / Output Overvoltage
Warning Limit
Input / Output Undervoltage
Protection Limit
Can only be disabled to a preset
default value
Input Overcurrent
Protection Limit
20% (10 – 20% of FL)
5% (20 – 133% of FL)
Input Overcurrent
Warning Limit
20% (10 – 20% of FL)
5% (20 – 133% of FL)
0 – 34A
Overtemperature
Protection Limit
7°C (Full Range)
7°C (Full Range)
50µs
0 – 125°C
0 – 125°C
0 – 100ms
Overtemperature
Warning Limit
(51h) OT_WARN_LIMIT
(60h) TON_DELAY
Additional time delay to the
undervoltage start-up delay
Turn-On Delay
[e] Refer to Digital Supervisor datasheet for complete list of supported commands.
BCM® Bus Converter
Page 14 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
BCM Timing Diagram
BCM® Bus Converter
Page 15 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
High-Level Functional State Diagram
VµC_ACTIVE < VPRI_DC < VPRI_UVLO+
START-UP SEQUENCE
TM Low
VPRI_DC > VPRI_UVLO+
STANDBY SEQUENCE
TM Low
EN High
EN High
VAUX Low
VAUX Low
Powertrain Stopped
Powertrain Stopped
ENABLE falling edge,
or OTP detected
tPRI_TO_SEC_DELAY
expired
Input OVLO or UVLO,
Output OCP,
ONE TIME DELAY
Fault
Auto-
recovery
INITIAL START UP
or UTP detected
ENABLE falling edge,
or OTP detected
FAULT
SEQUENCE
TM Low
SUSTAINED
OPERATION
TM PWM
Input OVLO or UVLO,
Output OCP,
EN High
EN High
or UTP detected
VAUX Low
VAUX High
Powertrain Stopped
Powertrain Active
Short Circuit detected
BCM® Bus Converter
Page 16 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Application Characteristics
Temperature controlled via top-side cold plate, unless otherwise noted. All data presented in this section are collected from units processing power in the
forward direction (primary side to secondary side). See associated figures for general trend data.
15
14
13
12
11
10
9
8
7
6
5
98.0
97.5
97.0
96.5
96.0
4
3
36
39
41
44
47
49
52
55
57
60
-40
-20
0
20
40
60
80
100
Primary Input Voltage (V)
Case Temperature (ºC)
TTOP SURFACE CASE
:
- 40°C
25°C
80°C
VPRI
:
36V
54V
60V
Figure 4 — No-load power dissipation vs. VPRI_DC
Figure 5 — Full-load efficiency vs. temperature; VPRI_DC
98
96
94
92
90
88
86
84
82
80
54
48
42
36
30
24
18
12
6
0
0
15
30
45
60
75
90 105 120 135 150
0
15
30
45
60
75
90 105 120 135 150
Secondary Output Current (A)
Secondary Output Current (A)
VPR:I
36V
54V
60V
VPR:I
36V
54V
60V
Figure 6 — Efficiency at TCASE = –40°C
Figure 7 — Power dissipation at TCASE = –40°C
98
96
94
92
90
88
86
84
82
80
54
48
42
36
30
24
18
12
6
0
0
15
30
45
60
75
90 105 120 135 150
0
15
30
45
60
75
90 105 120 135 150
Load Current (A)
Load Current (A)
VPRI
:
36V
54V
60V
VPRI
:
36V
54V
60V
Figure 8 — Efficiency at TCASE = 25°C
Figure 9 — Power dissipation at TCASE = 25°C
BCM® Bus Converter
Page 17 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Application Characteristics (Cont.)
Temperature controlled via top-side cold plate, unless otherwise noted. All data presented in this section are collected from units processing power in the
forward direction (primary side to secondary side). See associated figures for general trend data.
98
96
94
92
90
88
86
84
82
80
54
48
42
36
30
24
18
12
6
0
0
13
25
38
50
63
75
88 100 113 125
0
13
25
38
50
63
75
88 100 113 125
Secondary Output Current (A)
Secondary Output Current (A)
VPRI
:
36V
54V
60V
VPRI
:
36V
54V
60V
Figure 10 — Efficiency at TCASE = 80°C
Figure 11 — Power dissipation at TCASE = 80°C
3
200
175
150
125
100
75
2
1
0
50
25
0
0
15
30
45
60
75
90 105 120 135 150
-40
-20
0
20
40
60
80
100
Load Current (A)
Case Temperature (°C)
VPRI
:
54V
ISEC
:
150A
Figure 12 — RSEC vs. temperature; nominal VPRI_DC
Figure 13 — VSEC_OUT_PP vs. ISEC_DC ; no external CSEC_OUT_EXT
.
ISEC_DC = 125A at TCASE = 80°C
Board-mounted module, scope setting:
20MHz analog BW
Figure 14 — Full-load secondary voltage and primary current
ripple, 2700µF CPRI_IN_EXT; no external CSEC_OUT_EXT
.
Board-mounted module, scope setting:
20MHz analog BW
BCM® Bus Converter
Page 18 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Application Characteristics (Cont.)
Temperature controlled via top-side cold plate, unless otherwise noted. All data presented in this section are collected from units processing power in the
forward direction (primary side to secondary side). See associated figures for general trend data.
Figure 15 — 0 – 150A transient response:
CPRI_IN_EXT = 2700µF, no external CSEC_OUT_EXT
Figure 16 — 150 – 0A transient response:
CPRI_IN_EXT = 2700µF, no external CSEC_OUT_EXT
Figure 17 — Start up from application of VPRI_DC = 54V,
Figure 18 — Start up from application of EN with pre-applied
20% ISEC_OUT_DC, 100% CSEC_OUT_EXT
VPRI_DC = 54V, 20% ISEC_OUT_DC, 100% CSEC_OUT_EXT
BCM® Bus Converter
Page 19 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
General Characteristics
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade); All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Mechanical
Min
Typ
Max
Unit
Length
Width
L
W
H
60.87 [2.396] 61.00 [2.402] 61.13 [2.407]
24.76 [0.975] 25.14 [0.990] 25.52 [1.005]
mm [in]
mm [in]
mm [in]
cm3 [in3]
g [oz]
Height
Volume
Weight
7.11 [0.280]
7.21 [0.284]
11.06 [0.675]
41 [1.45]
7.31 [0.288]
Vol
W
Without heatsink
Nickel
0.51
0.02
2.03
0.15
Lead Finish
Palladium
Gold
µm
0.003
0.051
Thermal
Operating Temperature
TINTERNAL
BCM6123x60E10A5yzz (T-Grade)
–40
125
°C
Estimated thermal resistance to maximum
temperature internal component from
isothermal top
Thermal Resistance Top Side
θINT-TOP
1.4
1.3
°C/W
Estimated thermal resistance to
Thermal Resistance Leads
θINT-LEADS maximum temperature internal
°C/W
component from isothermal leads
Estimated thermal resistance to
θINT-BOTTOM maximum temperature internal
component from isothermal bottom
Thermal Resistance Bottom Side
Thermal Capacity
1.4
34
°C/W
Ws/°C
Assembly
Storage Temperature
ESD Withstand
BCM6123x60E10A5yzz (T-Grade)
–55
125
°C
ESDHBM
ESDCDM
Human Body Model, “ESDA / JEDEC JDS-001-2012” Class I-C (1kV to < 2kV)
Charge Device Model, “JESD 22-C101-E” Class II (200V to < 500V)
BCM® Bus Converter
Page 20 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
General Characteristics (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade); All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Soldering [e]
Min
Typ
Max
Unit
Peak Temperature Top Case
135
°C
Safety
PRIMARY to SECONDARY
2,250
2,250
707
Isolation voltage / Dielectric test
VHIPOT
PRIMARY to CASE
SECONDARY to CASE
Unpowered Unit
At 500VDC
VDC
Isolation Capacitance
Insulation Resistance
CPRI_SEC
RPRI_SEC
620
780
940
pF
10
MΩ
MIL-HDBK-217Plus Parts Count - 25°C
Ground Benign, Stationary, Indoors /
Computer
4.45
7.01
MHrs
MHrs
MTBF
Telcordia Issue 2 - Method I Case III; 25°C
Ground Benign, Controlled
cTÜVus EN 60950-1
cURus UL 60950-1
Agency Approvals / Standards
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
[f] Product is not intended for reflow solder attach.
BCM® Bus Converter
Page 21 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
PMBus™ System Diagram
-OUT
BCM
EN Control
3.3V, at least 20mA
when using 4xDISO
SCL
Ref to Digital Isolator
datasheet for more details
Digital Isolator
3 kΩ
VDD
3 kΩ
BCM EN
5V EXT
VDDB
SEC-IN-A
SEC-IN-B
PRI-OUT-A
PRI-OUT-B
PRI-IN-C
SER-IN
SER-OUT
-IN BCM
TXD1’
RXD1
RXD4
RXD3
RXD2
RXD1
TXD4
TXD3
SEC-OUT-C
VDD
NC
CP
D
VCC
PRI-COM
SEC-COM
SD
RD
Q
D
D44TL1A0 NC
Q
NC
SSTOP
Flip-flop
VDD
Host
µc
SGND
SDA
SCL
74LVC1G74DC
10 kΩ
PMBus
FDG6318P
R1
R2
10 kΩ
SGND
The PMBus communication enabled bus converter provides accurate telemetry monitoring and reporting, threshold and warning
limits adjustment, in addition to corresponding status flags.
The BCM internal µC is referenced to primary ground. The Digital Isolator allows UART communication interface with the host Digital
Supervisor at typical speed of 750kHz across the isolation barrier. One of the advantages of the Digital Isolator is its low power
consumption. Each transmission channel is able to draw its internal bias circuitry directly from the input signal being transmitted to
the output with minimal to no signal distortion.
The Digital Supervisor provides the host system µC with access to an array of up to four BCMs. This array is constantly polled for
status by the Digital Supervisor. Direct communication to individual BCM is enabled by a page command. For example, the page
(0x00) prior to a telemetry inquiry points to the Digital Supervisor data and pages (0x01 – 0x04) prior to a telemetry inquiry points to
the array of BCMs connected data. The Digital Supervisor constantly polls the BCM data through the UART interface.
The Digital Supervisor enables the PMBus compatible host interface with an operating bus speed of up to 400kHz. The Digital
Supervisor follows the PMBus command structure and specification.
Please refer to the Digital Supervisor data sheet for more details.
BCM® Bus Converter
Page 22 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
BCM in a ChiP™
0.24nH
5mΩ
LPRI_IN_LEADS
6.7nH
RSEC
1.62mΩ
LSEC_OUT_LEADS
0.64nH
ISEC
+
+
CPRI_INT_ESR
0.75mΩ
CSEC_INT_ESR
81µΩ
V•I
K
1/6 • ISEC
+
–
1/6 • VPRI
+
–
IPRI_Q
140mA
CPRI_INT
11.2µF
CSEC_INT
202µF
VSEC
VPRI
–
–
Figure 19 — BCM AC model
The BCM uses a high-frequency resonant tank to move energy
from primary to secondary and vice versa. The resonant LC tank,
operated at high frequency, is amplitude modulated as a function
of the primary voltage and the secondary current. A small amount
of capacitance embedded in the primary and secondary stages of
The effective DC voltage transformer action provides additional
interesting attributes. Assuming that RSEC = 0Ω and
IPRI_Q = 0A, Equation 3 now becomes Equation 1 and is essentially
load independent, resistor R is now placed in series with VPRI
.
the module is sufficient for full functionality and is key to achieving
high power density.
The BCM6123x60E10A5yzz can be simplified into the model
shown in Figure 19.
R
BCM
K = 1/6
VSEC
+
–
At no load:
VPRI
VSEC = VPRI • K
(1)
K represents the “turns ratio” of the BCM.
Rearranging Equation 1:
Figure 20 — K = 1/6 BCM with series primary resistor
VSEC
K =
(2)
The relationship between VPRI and VSEC becomes:
VPRI
VSEC = VPRI – IPRI • R • K
(5)
(
)
In the presence of a load, VSEC is represented by:
Substituting the simplified version of Equation 4
(IPRI_Q is assumed = 0A) into Equation 5 yields:
VSEC = VPRI • K – ISEC • RSEC
(3)
and ISEC is represented by:
2
VSEC = VPRI • K – ISEC • R • K
(6)
IPRI – IPRI_Q
ISEC
=
(4)
This is similar in form to Equation 3, where RSEC is used to represent
the characteristic impedance of the BCM. However, in this case a
real resistor, R on the primary side of the BCM is effectively scaled
by K2 with respect to the secondary.
K
RSEC represents the impedance of the BCM, and is a function of
the RDS_ON of the primary and secondary MOSFETs and the winding
resistance of the power transformer. IPRI_Q represents the quiescent
current of the BCM controller, gate drive circuitry and core losses.
Assuming that R = 1Ω, the effective R as seen from the secondary
side is 28mΩ, with K = 1/6.
BCM® Bus Converter
Page 23 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
A similar exercise can be performed with the additon of a capacitor
or shunt impedance at the primary of the BCM. A switch in series
with VPRI is added to the circuit. This is depicted in Figure 21.
Low impedance is a key requirement for powering a high-current,
low-voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a BCM
between the regulation stage and the point of load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, these benefits are
not achieved if the series impedance of the BCM is too high. The
impedance of the BCM must be low, i.e., well beyond the crossover
frequency of the system.
S
BCM
K = 1/6
VSEC
+
–
C
VPRI
A solution for keeping the impedance of the BCM low involves
switching at a high frequency. This enables the use of small
magnetic components because magnetizing currents remain low.
Small magnetics mean small path lengths for turns. Use of low-loss
core material at high frequencies also reduces core losses.
Figure 21 — BCM with primary capacitor
The two main terms of power loss in the BCM are:
A change in VPRI with the switch closed would result in a change in
capacitor current according to the following equation:
ꢀNo load power dissipation (PPRI_NL): defined as the power
used to power up the module with an enabled powertrain
at no load.
dVPRI
IC (t) = C
(7)
ꢀResistive loss (PRSEC): refers to the power loss across
dt
the BCM modeled as pure resistive impedance.
Assume that with the capacitor charged to VPRI, the switch is
opened and the capacitor is discharged through the idealized
BCM. In this case,
PDISSIPATED = PPRI_NL + PRSEC
(10)
Therefore,
IC = ISEC • K
(8)
PSEC_OUT = PPRI_IN – PDISSIPATED = PPRI_IN – PPRI_NL – PRSEC (11)
substituting Equation 1 and 8 into Equation 7 reveals:
The above relations can be combined to calculate the overall
module efficiency:
C
dVSEC
dt
ISEC(t) =
(9)
•
K2
PSEC_OUT
PPRI_IN – PPRI_NL – PRSEC
The equation in terms of the secondary has yielded a K2 scaling
factor for C, specified in the denominator of the equation.
η =
=
=
(12)
PPRI_IN
PPRI_IN
A K factor less than unity results in an effectively larger capacitance
on the secondary when expressed in terms of the primary. With
K = 1/6 as shown in Figure 21, C = 1µF would appear as
2
VPRI • IPRI – PPRI_NL – I
• RSEC
( SEC)
VPRI • IPRI
C = 36µF when viewed from the secondary.
2
PPRI_NL + I
• RSEC
( SEC)
= 1 –
(
)
VPRI • IPRI
BCM® Bus Converter
Page 24 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Input and Output Filter Design
Thermal Considerations
The ChiP™ module provides a high degree of flexibility in that
it presents three pathways to remove heat from the internal
power-dissipating components. Heat may be removed from the
top surface, the bottom surface and the leads. The extent to which
these three surfaces are cooled is a key component in determining
the maximum current that is available from a ChiP, as can be
seen from Figure 1.
A major advantage of BCM systems versus conventional PWM
converters is that the transformer based BCM does not require
external filtering to function properly. The resonant LC tank,
operated at extreme high frequency, is amplitude modulated as a
function of primary voltage and secondary current and efficiently
transfers charge through the isolation transformer. A small amount
of capacitance embedded in the primary and secondary stages
of the module is sufficient for full functionality and is key to
achieving power density.
Since the ChiP has a maximum internal temperature rating, it
is necessary to estimate this internal temperature based on a
system-level thermal solution. Given that there are three pathways
to remove heat from the ChiP, it is helpful to simplify the thermal
solution into a roughly equivalent circuit where power dissipation
is modeled as a current source, isothermal surface temperatures
are represented as voltage sources and the thermal resistances are
represented as resistors. Figure 22 shows the “thermal circuit” for a
BCM6123 ChiP in an application where the top, bottom, and leads
are cooled. In this case, the BCM power dissipation is PDTOTAL and
This paradigm shift requires system design to carefully evaluate
external filters in order to:
ꢀGuarantee low source impedance:
To take full advantage of the BCM’s dynamic response, the
impedance presented to its primary terminals must be low from
DC to approximately 5MHz. The connection of the bus converter
module to its power source should be implemented with minimal
distribution inductance. If the interconnect inductance exceeds
100nH, the input should be bypassed with a RC damper to
retain low source impedance and stable operation. With an
interconnect inductance of 200nH, the RC damper may be as
high as 1µF in series with 0.3Ω. A single electrolytic or equivalent
low-Q capacitor may be used in place of the series RC bypass.
the three surface temperatures are represented as TCASE_TOP
,
TCASE_BOTTOM, and TLEADS. This thermal system can now be very
easily analyzed using a SPICE simulator with simple resistors,
voltage sources, and a current source. The results of the simulation
provide an estimate of heat flow through the various dissipation
pathways as well as internal temperature.
ꢀFurther reduce primary and/or secondary voltage ripple
without sacrificing dynamic response:
Thermal Resistance
MAX INTERNAL TEMP
Top
θINT-TOP
Given the wide bandwidth of the module, the source response
is generally the limiting factor in the overall system response.
Anomalies in the response of the primary source will appear at
the secondary of the module multiplied by its K factor.
Thermal Resistance
Bottom
Thermal Resistance
Leads
θINT-BOTTOM
θINT-LEADS
Power Dissipation
(W)
+
–
+
–
+
–
TCASE_BOTTOM(°C)
TLEADS(°C)
TCASE_TOP(°C)
ꢀProtect the module from overvoltage transients imposed
by the system that would exceed maximum ratings and
induce stresses:
The module primary/secondary voltage ranges shall not be
exceeded. An internal overvoltage lockout function prevents
operation outside of the normal operating primary range. Even
when disabled, the powertrain is exposed to the applied voltage
and the power MOSFETs must withstand it.
Figure 22 — Top case, bottom case and leads thermal model
Alternatively, equations can be written around this circuit and
analyzed algebraically:
TINT – PD1 • θINT-TOP = TCASE_TOP
TINT – PD2 • θINT-BOTTOM = TCASE_BOTTOM
TINT – PD3 • θINT-LEADS = TLEADS
PDTOTAL = PD1+ PD2+ PD3
Total load capacitance at the secondary of the BCM shall not
exceed the specified maximum. Owing to the wide bandwidth and
low secondary impedance of the module, low-frequency bypass
capacitance and significant energy storage may be more densely
and efficiently provided by adding capacitance at the primary of
the module. At frequencies <500kHz the module appears as an
impedance of RSEC between the source and load.
Where TINT represents the internal temperature and PD1, PD2, and
PD3 represent the heat flow through the top side, bottom side, and
leads, respectively.
Within this frequency range, capacitance at the primary appears as
effective capacitance on the secondary per the relationship defined
in Equation 13.
CPRI_EXT
Thermal Resistance
CSEC_EXT
=
(13)
MAX INTERNAL TEMP
2
Top
K
θINT-TOP
Thermal Resistance
Bottom
Thermal Resistance
Leads
This enables a reduction in the size and number of capacitors used
in a typical system.
θINT-BOTTOM
θINT-LEADS
Power Dissipation
(W)
+
–
+
–
TCASE_BOTTOM(°C)
TLEADS(°C)
TCASE_TOP(°C)
Figure 23 — Top case and leads thermal model
BCM® Bus Converter
Page 25 of 29
Rev 1.4
07/2018
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Figure 23 shows a scenario where there is no bottom side cooling.
In this case, the heat flow path to the bottom is left open and the
equations now simplify to:
ZIN_EQ1
ZOUT_EQ1
BCM®1
R0_1
VPRI
VSEC
TINT – PD1 • θINT-TOP = TCASE_TOP
TINT – PD3 • θINT-LEADS = TLEADS
PDTOTAL = PD1+ PD3
ZOUT_EQ2
ZIN_EQ2
BCM®2
R0_2
+
Load
DC
Thermal Resistance
MAX INTERNAL TEMP
Top
θINT-TOP
Thermal Resistance
Bottom
Thermal Resistance
Leads
ZOUT_EQn
BCM®n
R0_n
ZIN_EQn
θINT-BOTTOM
θINT-LEADS
Power Dissipation
(W)
+
–
TCASE_BOTTOM(°C)
TLEADS(°C)
TCASE_TOP(°C)
Figure 25 — BCM parallel array
Figure 24 — Top case thermal model
Figure 24 shows a scenario where there is no bottom side and
Fuse Selection
leads cooling. In this case, the heat flow paths to the bottom and
leads are left open and the equations now simplify to:
In order to provide flexibility in configuring power systems,
ChiP™ modules are not internally fused. Input line fusing
of ChiP products is recommended at the system level to provide
thermal protection in case of catastrophic failure.
TINT – PD1 • θINT-TOP = TCASE_TOP
PDTOTAL = PD1
The fuse shall be selected by closely matching system
requirements with the following characteristics:
Please note that Vicor has a suite of online tools, including a
simulator and thermal estimator that greatly simplify the task of
determining whether or not a BCM thermal configuration is valid
for a given condition. These tools can be found at:
ꢀCurrent rating
(usually greater than maximum current of BCM)
ꢀMaximum voltage rating
http://www.vicorpower.com/powerbench.
(usually greater than the maximum possible input voltage)
ꢀAmbient temperature
ꢀNominal melting I2t
Current Sharing
The performance of the BCM topology is based on efficient
transfer of energy through a transformer without the need of
closed loop control. For this reason, the transfer characteristic
can be approximated by an ideal transformer with a positive
temperature coefficient series resistance.
ꢀRecommend fuse: ≤40A Littelfuse 456 Series (primary side)
Reverse Operation
BCMs are capable of reverse power operation. Once the unit is
started, energy will be transferred from the secondary back to
the primary whenever the secondary voltage exceeds VPRI • K.
The module will continue operation in this fashion for as long as
no faults occur.
This type of characteristic is close to the impedance characteristic
of a DC power distribution system both in dynamic (AC) behavior
and for steady state (DC) operation.
When multiple BCMs of a given part number are connected in an
array, they will inherently share the load current according to the
equivalent impedance divider that the system implements from the
power source to the point of load. Ensuring equal current sharing
among modules requires that BCM array impedances be matched.
Transient operation in reverse is expected in cases where there is
significant energy storage on the output and transient voltages
appear on the input.
Some general recommendations to achieve matched array
impedances include:
ꢀDedicate common copper planes within the PCB to deliver and
return the current to the modules.
ꢀProvide as symmetric a PCB layout as possible among modules
ꢀA dedicated input filter for each BCM in an array is required to
prevent circulating currents.
For further details see:
AN:016 Using BCM Bus Converters in High Power Arrays.
BCM® Bus Converter
Page 26 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
BCM Through-Hole Package Mechanical Drawing and Recommended Land Pattern
25.14 .ꢀ3
.990 .015
12.57
.495
11.4ꢀ
.450
2.0ꢀ
.030
(9) PL.
2.0ꢀ
.030
(9) PL.
27.21
1.071
(2) PL.
21.94
.364
17.09
.67ꢀ
(2) PL.
(2) PL.
ꢀ0.50
1.201
12.52
.49ꢀ
7.94
.ꢀ12
(2) PL.
(2) PL.
ꢀ.ꢀ7
.1ꢀ2
1.49
.053
(2) PL.
0
0
0
0
(2) PL.
6.76
.266
61.00 .1ꢀ
2.402 .005
(2) PL.
1.02
.040
1.02
.040
(ꢀ) PL.
(ꢀ) PL.
13.05
.710
20.34
.320
(2) PL.
(2) PL.
2ꢀ.64
.9ꢀ1
(2) PL.
27.55
1.035
(2) PL.
TOP VIEW (COMPONENT SIDE)
BOTTOM VIEW
.05 [.002]
NOTES:
1- RoHS COMPLIANT PER CST-0001 LATEST REVISION.
7.21 .10
.284 .004
SEATING
PLANE
2- UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE : MM / [INCH]
4.17
.164
.41
.016
(24) PL.
(24) PL.
27.21 .08
1.071 .00ꢀ
(2) PL.
+VSEC
-VSEC1
+VSEC
21.94 .08
.864 .00ꢀ
(2) PL.
-VSEC2
17.09 .08
.67ꢀ .00ꢀ
(2) PL.
-VSEC1
+VSEC
+VSEC
-VSEC1
-VSEC2
+VSEC
+VSEC
-VSEC2
12.52 .08
.49ꢀ .00ꢀ
(2) PL.
7.94 .08
.ꢀ12 .00ꢀ
(2) PL.
ꢀ.ꢀ7 .08
.1ꢀ2 .00ꢀ
(2) PL.
1.49 .08
.058 .00ꢀ
(2) PL.
0
0
-VSEC1
+VSEC
-VSEC2
+VSEC
6.76 .08
.266 .00ꢀ
(2) PL.
1.52 .08
.060 .00ꢀ
PLATED THRU
.25 [.010]
ANNULAR RING
(6) PL.
2.54 .08
.100 .00ꢀ
PLATED THRU
.ꢀ8 [.015]
ANNULAR RING
(18) PL.
+VPRI TM/SER-OUT
+VPRI EN
+VPRI VAUX/SER-IN
+VPRI -VPRI
18.05 .08
.710 .00ꢀ
(2) PL.
20.84 .08
.820 .00ꢀ
(2) PL.
2ꢀ.64 .08
.9ꢀ1 .00ꢀ
(2) PL.
27.55 .08
1.085 .00ꢀ
(2) PL.
RECOMMENDED HOLE PATTERN
(COMPONENT SIDE)
BCM® Bus Converter
Page 27 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Revision History
Revision
1.0
Date
Description
Page Number(s)
08/26/15
09/28/15
Initial Release
Changed PRI to SEC Input Quiescent Current
n/a
5
1.1
Added PMBus enabled product and associated related specifications
Updated electrical specifications table for forward direction
Added electrical specifications table for reverse direction
Updated figure 2
all
5, 6 & 7
8 & 9
10
1.2
07/26/16
Updated figures 14 & 15
18
1.3
1.4
07/28/17
Updated height specification
1, 20, 27
All
07/16/18
Implemented content improvements
BCM® Bus Converter
Page 28 of 29
Rev 1.4
07/2018
BCM6123x60E10A5yzz
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and
accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom
power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor
makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves
the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by
Vicor has been checked and is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies.
Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Visit http://www.vicorpower.com/dc-dc/isolated-fixed-ratio/lv-bus-converter-module for the latest product information.
Vicor’s Standard Terms and Conditions and Product Warranty
All sales are subject to Vicor’s Standard Terms and Conditions of Sale, and Product Warranty which are available on Vicor’s webpage
(http://www.vicorpower.com/termsconditionswarranty) or upon request.
Life Support Policy
VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used
herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and
whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to
result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform
can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms
and Conditions of Sale, the user of Vicor products and components in life support applications assumes all risks of such use and indemnifies
Vicor against all liability and damages.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the
products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property
rights is granted by this document. Interested parties should contact Vicor’s Intellectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers:
6,911,848; 6,930,893; 6,934,166; 7,145,786; 7,782,639; 8,427,269 and for use under 6,975,098 and 6,984,965.
Contact Us: http://www.vicorpower.com/contact-us
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
www.vicorpower.com
email
Customer Service: custserv@vicorpower.com
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©2017 – 2018 Vicor Corporation. All rights reserved. The Vicor name is a registered trademark of Vicor Corporation.
The PMBus™ name, SMIF, Inc. and logo are trademarks of SMIF, Inc.
I2C™ is a trademark of NXP Semiconductor
All other trademarks, product names, logos and brands are property of their respective owners.
BCM® Bus Converter
Page 29 of 29
Rev 1.4
07/2018
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