NBM3814B46C15A6C08 [VICOR]
Non-Isolated, Fixed-Ratio DC-DC Converter;
| 型号： | NBM3814B46C15A6C08 |
| 厂家： | 
VICOR CORPORATION |
| 描述： | Non-Isolated, Fixed-Ratio DC-DC Converter |
| 文件： | 总23页 (文件大小：916K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NBM™ in a VIA Package
Bus Converter
NBM3814x46C15A6yzz
Non-Isolated, Fixed-Ratio DC-DC Converter
Features & Benefits
Product Ratings
• Up to 160A continuous low voltage side current
• Fixed transformation ratio(K) of 1/3
• Up to 1258 W/in3 power density
• 97.9% peak efficiency
VHI = 42V (36 – 46V)
ILO = up to 160A
K = 1/3
VLO = 14V (12 – 15.3V)
(no load)
Product Description
• Bidirectional operation capability
• Integrated ceramic capacitance filtering
• Parallel operation for multi-kW arrays
• OV, OC, UV, short circuit and thermal protection
• 3814 package
The NBM in a VIA package is a high efficiency Bus Converter,
operating from a 36 to 46VDC high voltage bus to deliver a non-
isolated 12 to 15.3VDC unregulated, low voltage.
This unique ultra-low profile module incorporates DC-DC
conversion, integrated filtering in a chassis or PCB mount
form factor.
• High MTBF
The NBM offers low noise, fast transient response and industry
leading efficiency and power density.
• Thermally enhanced VIA™ package
Leveraging the thermal and density benefits of Vicor’s VIA
packaging technology, the NBM module offers flexible thermal
management options with very low top and bottom side thermal
impedances.
Typical Applications
• DC Power Distribution
When combined with downstream Vicor DC-DC conversion
components and regulators, the NBM allows the Power Design
Engineer to employ a simple, low-profile design which will
differentiate the end system without compromising on cost or
performance metrics.
• Information and Communication
Technology (ICT) Equipment
• High End Computing Systems
• Automated Test Equipment
• Industrial Systems
The NBM non-isolated topology allows start up and steady
state operation in forward and reverse directions. It provides
bidirectional protections. However if power train is disabled by any
protection, and VLO is present, then voltage equal to VLO minus two
diode drops will appear on high voltage side.
• High Density
Energy Systems
• Transportation
Size:
3.76 x 1.40 x 0.37 in
95.59 x 35.54 x 9.40 mm
Part Ordering Information
High
Max
High
Side
Max
Low
Side
Max
Low
Side
Side
Voltage
Range
Ratio
Product
Function
Package
Length
Package
Width
Package
Type
Product Grade
(Case Temperature)
Option Field
Voltage
Voltage Current
NBM
38
14
x
46
C
15 A6
y
zz
NBM =
Non-Isolated
00 = Chassis/Always On
04 = Short Pin/Always On
08 = Long Pin/Always On
Length in
Width in
B = Board VIA
C = -20 to 100°C[1]
T = -40 to 100°C[1]
Internal Reference
Bus Converter Inches x 10 Inches x 10 V = Chassis VIA
Module
[1] High Temperature Current Derating may apply; See Figure 1, specified thermal operating area.
NBM™ in a VIA Package
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Typical Application
NBM in a VIA Package
FUSE
+HI
+LO
LO
Side
HI
Side
V
HI
V
PGND
LO
PoL
NBM3814x46C15A6yzz at point of load providing fixed ratio step-down DC-DC conversion to PoL devices.
NBM is operating in forward direction.
NBM in a VIA Package
FUSE
+HI
+LO
LO
Side
HI
Side
V
LO
V
PGND
LOAD
HI
NBM3814x46C15A6yzz providing fixed ratio step-up DC-DC conversion. NBM is operating in reverse direction.
NBM™ in a VIA Package
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Pin Configuration
10
1
TOP VIEW
3
12
+HI
+HI
PGND
PGND
+LO
+LO
PGND
PGND
11
2
4
13
NBM in a 3814 VIA Package - Chassis (Lug) Mount
11
13
2
TOP VIEW
4
+HI
+HI
PGND
PGND
+LO
+LO
PGND
PGND
10
1
3
12
NBM in a 3814 VIA Package - Board (PCB) Mount
Pin Descriptions
Pin Number
Signal Name
Type
Function
1, 2
3, 4
+HI
+LO
HIGH SIDE POWER
LOW SIDE POWER
POWER RETURN
Positive auto-transformer power terminal - on high voltage side
Positive auto-transformer power terminal - on low voltage side
10, 11, 12, 13
PGND
Common negative auto-transformer power terminal
NBM™ in a VIA Package
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Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter
Comments
Min
Max
60
1
Unit
V
+HI to PGND
-1
HI_DC or LO_DC slew rate
+LO to PGND
V/µs
V
-1
20
Dielectric Withstand*
High Voltage Side to Case
See note below
N/A
N/A
VDC
VDC
High Voltage Side to
Low Voltage Side
Low Voltage Side to Case
N/A
VDC
* The PGND of the NBM in a VIA package is directly connected to the case. The NBM does not contain any insulation (isolation) from high voltage side to
low voltage side
NBM™ in a VIA Package
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Electrical Specifications
Specifications apply over all line and load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TCASE
≤100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
General Powertrain High Voltage Side to Low Voltage Side Specification (Forward Direction)
Hi Side Input Voltage range,
continuous
VHI_DC
36
46
V
V
VHI_DC voltage where µC is initialized,
(powertrain inactive)
VHI µController
VµC_ACTIVE
15
Disabled, VHI_DC = 42V
8
HI to LO Input Quiescent Current
IHI_Q
mA
T
CASE ≤ 100ºC
12
19.5
28
VHI_DC = 42V, TCASE = 25ºC
VHI_DC = 42V
12.5
5
HI to LO No Load Power Dissipation
PHI_NL
W
VHI_DC = 36V to 46V, TCASE = 25 ºC
VHI_DC = 36V to 46V
22
31
VHI_DC = 46V, CLO_EXT = 3000µF, RLOAD_LO = 20% of full
load current
30
HI to LO Inrush Current Peak
IHI_INR_PK
A
T
CASE ≤ 100ºC
75
DC HI Side Input Current
Transformation Ratio
IHI_IN_DC
K
At ILO_OUT_DC = 160A, TCASE ≤ 85ºC
53.9
A
High voltage to low voltage, K = VLO_DC / VHI_DC, at no
load
1/3
V/V
LO Side Output Current
(continuous)
ILO_OUT_DC
TCASE ≤ 85°C
160
176
A
A
LO Side Output Current
(pulsed)
10ms pulse, 25% Duty cycle, ILO_OUT_AVG ≤ 50% rated
ILO_OUT_DC
ILO_OUT_PULSE
VHI_DC = 42V, ILO_OUT_DC = 160A
VHI_DC = 36V to 46V, ILO_OUT_DC = 160A
VHI_DC = 42V, ILO_OUT_DC = 80A
96.8
96.5
97.3
97.6
HI to LO Efficiency (ambient)
hAMB
%
97.8
97.1
HI to LO Efficiency (hot)
hHOT
h20%
VHI_DC = 42V, ILO_OUT_DC = 160A, TCASE = 85°C
32A < ILO_OUT_DC < 160A
96.7
95
%
%
HI to LO Efficiency
(over load range)
RLO_COLD
RLO_AMB
RLO_HOT
FSW
VHI_DC = 42V, ILO_OUT_DC = 160A, TCASE = -40°C
VHI_DC = 42V, ILO_OUT_DC = 160A
0.8
0.9
1.3
1.7
1.7
2.1
HI to LO Output Resistance
mΩ
VHI_DC = 42V, ILO_OUT_DC = 160A, TCASE = 85°C
Frequency of the LO Side Voltage Ripple = 2x FSW
1.5
2.1
2.4
Switching Frequency
1.14
1.20
1.26
MHz
mV
CLO_EXT = 0µF, ILO_OUT_DC = 160A, VHI_DC = 42V,
20MHz BW
110
LO Side Output Voltage Ripple
VLO_OUT_PP
T
CASE ≤ 100ºC
205
NBM™ in a VIA Package
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Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TCASE
≤100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
General Powertrain High Voltage Side to Low Voltage Side Specification (Forward Direction) Cont.
Effective HI side Capacitance
(Internal)
CHI_INT
CLO_INT
CLO_OUT_EXT
CLO_OUT_AEXT
Effective Value at 42VHI_DC
Effective Value at 14VLO_DC
16.8
140
µF
µF
µF
Effective LO Side Capacitance
(Internal)
Effective LO Side Output Capacitance
(External)
Excessive capacitance may drive module into SC
protection
3000
Effective LO Side Output Capacitance
(External)
CLO_OUT_AEXT Max = N * 0.5 * CLO_OUT_EXT MAX, where
N = the number of units in parallel
Protection High Voltage Side to Low Voltage Side (Forward Direction)
Startup into a persistent fault condition. Non-Latching
fault detection given VHI_DC > VHI_UVLO+
Auto Restart Time
tAUTO_RESTART
VHI_OVLO+
VHI_OVLO-
940
48
1010
52
ms
V
HI Side Overvoltage Lockout
Threshold
50
48
2
HI Side Overvoltage Recovery
Threshold
46
50
V
HI Side Overvoltage Lockout
Hysteresis
VHI_OVLO_HYST
tHI_OVLO
V
HI Side Overvoltage Lockout
Response Time
30
30
32
2
µs
V
HI Side Undervoltage Lockout
Threshold
VHI_UVLO-
28
30
32
34
HI Side Undervoltage Recovery
Threshold
VHI_UVLO+
VHI_UVLO_HYST
tHI_UVLO
V
HI Side Undervoltage Lockout
Hysteresis
V
HI Side Undervoltage Lockout
Response Time
100
µs
From VHI_DC = VHI_UVLO+ to powertrain active, (i.e One
time Startup delay form application of VHI_DC to VLO_DC
HI Side Undervoltage Startup Delay
tHI_UVLO+_DELAY
30
ms
)
From powertrain active. Fast Current limit protection
disabled during Soft-Start
HI Side Soft-Start Time
tHI_SOFT-START
ILO_OUT_OCP
tLO_OUT_OCP
ILO_OUT_SCP
tLO_OUT_SCP
tOTP+
1
200
4
ms
A
LO Side Output Overcurrent Trip
Threshold
177
240
240
LO Side Output Overcurrent
Response Time Constant
Effective internal RC filter
ms
A
LO Side Output Short Circuit
Protection Trip Threshold
LO Side Output Short Circuit
Protection Response Time
1
110
3
µs
°C
°C
°C
s
Overtemperature Shutdown
Threshold
Temperature sensor located inside controller IC
125
Overtemperature Recovery
Threshold
tOTP–
105
115
-45
Undertemperature Shutdown
Threshold
Temperature sensor located inside controller IC;
Protection not available for M-Grade units.
tUTP
Startup into a persistent fault condition. Non-Latching
fault detection given VHI_DC > VHI_UVLO+
Undertemperature Restart Time
tUTP_RESTART
NBM™ in a VIA Package
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Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TCASE
≤100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
General Powertrain Low Voltage Side to High Voltage Side Specification (Reverse Direction)
LO Side Input Voltage range,
continuous
VLO_DC
12
15.3
V
VLO_DC = 14V, TCASE = 25ºC
VLO_DC = 14V
12.5
20
29
5
LO to HI No Load Power Dissipation
PLO_NL
W
VLO_DC = 12V to 15.3V, TCASE = 25ºC
VLO_DC = 12V to 15.3V
At IHI_DC = 53.3A, TCASE ≤ 85ºC
TCASE ≤ 85°C
22
31
DC LO Side Input Current
ILO_IN_DC
162
53.3
A
A
HI Side Output Current (continuous)
IHI_OUT_DC
10ms pulse, 25% Duty cycle,
HI Side Output Current (pulsed)
IHI_OUT_PULSE
58.7
A
IHI_OUT_AVG ≤ 50% rated IHI_OUT_DC
VLO_DC = 14V, IHI_OUT_DC = 53.3A
96.4
96.1
97.3
96.3
97.2
LO to HI Efficiency (ambient)
hAMB
VLO_DC = 12V to 15.3V, IHI_OUT_DC= 53.3A
VLO_DC = 14V, IHI_OUT_DC = 26.7A
%
97.8
96.9
LO to HI Efficiency (hot)
hHOT
h20%
VLO_DC = 14V, IHI_OUT_DC = 53.3A, TCASE = 85°C
%
%
LO to HI Efficiency (over load range)
10.66A < IHI_OUT_DC < 53.3A
94.6
RHI_COLD
RHI_AMB
RHI_HOT
VLO_DC = 14V, IHI_OUT_DC = 53.3A, TCASE = -40°C
VLO_DC = 14V, IHI_OUT_DC = 53.3A
10
12
16
16
20
23
20
24
26
LO to HI Output Resistance
mΩ
VLO_DC = 14V, IHI_OUT_DC = 53.3A, TCASE = 85°C
CHI_OUT_EXT = 0µF, IHI_OUT_DC = 53.3A,
VLO_DC = 14V, 20MHz BW
330
HI Side Output Voltage Ripple
VHI_OUT_PP
mV
T
CASE ≤ 100ºC
615
NBM™ in a VIA Package
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Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TCASE
≤100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Protection Low Voltage Side to High Voltage Side (Reverse Direction)
Excessive capacitance may drive module into SC
protection when starting from low voltage side to high
voltage side
Effective HI Side Output Capacitance
(External)
CHI_OUT_EXT
300
µF
LO Side Overvoltage Lockout
Threshold
VLO_OVLO+
VHI_OVLO-
tHI_OVLO
16
16.7
16
17.4
16.7
V
V
LO Side Overvoltage Recovery
Threshold
15.3
LO Side Overvoltage Lockout
Response Time
30
µs
V
LO Side Undervoltage Lockout
Threshold
VLO_UVLO-
VHI_UVLO+-
tLO_UVLO
IHI_OUT_OCP
tHI_OUT_OCP
IHI_SCP
9.3
10
10
10.7
11.4
LO Side Undervoltage Recovery
Threshold
10.7
100
66.7
4
V
LO Side Undervoltage Lockout
Response Time
µs
A
HI Side Output Overcurrent Trip
Threshold
Powertrain is stopped but current can flow from LO
Side to HI Side through MOSFET body Diodes
56
80
HI Side Output Overcurrent Response
Time Constant
Effective internal RC filter
ms
A
HI Side Short Circuit Protection Trip
Threshold
Powertrain is stopped but current can flow from LO
Side to HI Side through MOSFET body Diodes
810
HI Side Short Circuit Protection
Response Time
tHI_SCP
1
µs
NBM™ in a VIA Package
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200
180
160
140
120
100
80
60
40
20
0
-60
-40
-20
0
20
40
60
80
100
120
Case Temperature (°C)
36 – 46V
Figure 1 — Specified thermal operating area
1. The NBM in a VIA Package is cooled through bottom case (bottom housing).
2. The thermal rating of the NBM in a VIA Package is based on typical measured device efficiency.
3. The case temperature in the graph is the measured temperature of the bottom housing, such that operating internal junction temperature of the NBM in a
VIA Package does not exceed 125°C.
3000
2700
2400
2100
1800
1500
1200
900
200
180
160
140
120
100
80
60
600
40
300
20
0
0
36
37
38
39
40
41
42
43
44
45
46
36
37
38
39
40
HI Side Voltage (V)
ILO_OUT_DC ILO_OUT_PULSE
41
42
43
44
45
46
HI Side Voltage (V)
PLO_OUT_DC PLO_OUT_PULSE
Figure 2 — Specified electrical operating area using rated RLO_HOT
110
100
90
80
70
60
50
40
30
20
10
0
0
20
40
60
80
100
LO Side Current (% ILO_OUT_DC
)
Figure 3 — Specified HI side start-up into load current and external capacitance
NBM™ in a VIA Package
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NBM™ Forward Direction Timing Diagram
NBM™ in a VIA Package
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NBM™ Reverse Direction Timing Diagram
NBM™ in a VIA Package
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Application Characteristics
Product is mounted and temperature controlled via top side cold plate, unless otherwise noted. All data presented in this section are collected data from high
voltage side sourced units processing power in forward direction.See associated figures for general trend data.
98.0
97.5
97.0
96.5
96.0
30
27
24
21
18
15
12
9
6
3
0
-40
-25
-10
5
20
35
50
65
80
95
36 37 38 39 40 41 42 43 44 45 46 47
Case Temperature (ºC)
HI Side Input Voltage (V)
VHI:
36V
42V
46V
TTOP SURFACE CASE
:
-40°C
25°C
85°C
Figure 4 — No load power dissipation vs. VHI_DC
Figure 5 — Full load efficiency vs. temperature; VHI_DC
99
97
95
93
91
89
87
80
99
97
95
93
91
89
80
72
64
56
48
40
32
24
16
8
72
64
56
48
40
32
24
16
8
PD
87
PD
85
83
81
79
85
83
81
79
0
0
0
16
32
48
64
80
96 112 128 144 160
0
16
32
48
64
80
96 112 128 144 160
LO Side Output Current (A)
LO Side Output Current (A)
VHI_DC
:
36V
42V
46V
VHI_DC
:
36V
42V
46V
Figure 6 — Efficiency and power dissipation at TCASE = -40°C
Figure 7 — Efficiency and power dissipation at TCASE = 25°C
3
99
97
95
93
91
89
87
85
83
81
79
90
81
72
63
54
45
36
27
18
9
2
1
0
PD
0
0
16
32
48
64
80
96 112 128 144 160
-40
-20
0
20
40
60
80
100
LO Side Output Current (A)
Case Temperature (°C)
VHI_DC
:
36V
42V
46V
ILO_DC
:
160A
Figure 8 — Efficiency and power dissipation at TCASE = 85°C
Figure 9 — RLO vs. temperature; Nominal VHI_DC
ILO_DC = 160A at TCASE = 85°C
NBM™ in a VIA Package
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60
54
48
42
36
30
24
18
12
6
0
0
16
32
48
64
80
96 112 128 144 160
LO Side Output Current (A)
VHI_DC
:
42V
Figure 10 — VLO_OUT_PP vs. ILO_DC ; No external CLO_OUT_EXT Board
Figure 11 — Full load ripple, 300µF CHI_IN_EXT; No external
.
mounted module, scope setting : 20MHz analog BW
CLO_OUT_EXT Board mounted module, scope setting :
.
20MHz analog BW
Figure 13 — 160A – 0A transient response:
Figure 12 — 0A– 160A transient response:
CHI_IN_EXT = 300µF, no external CLO_OUT_EXT
CHI_IN_EXT = 300µF, no external CLO_OUT_EXT
Figure 14 — Forward start up from application of VHI_DC = 42V, 20%
Figure 15 — Reverse start up from application of VLO_DC = 14V,
ILO_DC, 100% CLO_OUT_EXT
20% IHI_DC, 100% CHI_OUT_EXT
NBM™ in a VIA Package
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General Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TCASE
≤100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Mechanical
mm / [in]
mm / [in]
mm / [in]
mm / [in]
cm3/ [in3]
Length
L
L
Lug (Chassis) Mount
95.34 / [3.75] 95.59 / [3.76] 95.84 / [3.77]
95.34 / [3.75] 95.59 / [3.76] 95.84 / [3.77]
35.29 / [1.39] 35.54 / [1.40] 35.79 / [1.41]
9.019 / [0.355] 9.40 / [0.37] 9.781 / [0.385]
31.93 / [1.95]
Length
PCB (Board) Mount
Width
W
H
Height
Volume
Weight
Vol
W
Without heatsink
130.4 / [4.6]
g / [oz]
Pin Material
Underplate
C145 copper, 1/2 hard
Low stress ductile Nickel
Palladium
50
0.8
100
6
µin
µin
Pin Finish
Soft Gold
0.12
2
Thermal
NBM3814x46C15A6yzz (T-Grade)
NBM3814x46C15A6yzz (C-Grade)
-40
-20
125
125
Operating junction temperature
Operating case temperature
TINTERNAL
NBM3814x46C15A6yzz (T-Grade),
derating applied, see safe thermal
operating area
-40
-20
100
100
°C
TCASE
NBM3814x46C15A6yzz (C-Grade),
derating applied, see safe thermal
operating area
Estimated thermal resistance to
maximum temperature internal
component from isothermal top
Thermal resistance top side
RJC_TOP
1.39
0.51
°C/W
°C/W
Estimated thermal resistance of thermal
coupling between the top and bottom
case surfaces
Thermal Resistance Coupling between
top case and bottom case
RHOU
Estimated thermal resistance to
maximum temperature internal
component from isothermal bottom
Thermal resistance bottom side
Thermal capacity
RJC_BOT
0.83
52
°C/W
Ws/°C
Assembly
NBM3814x46C15A6yzz (T-Grade)
NBM3814x46C15A6yzz (C-Grade)
-40
-40
125
125
°C
°C
Storage
Temperature
TST
Human Body Model,
ESDHBM
“ESDA / JEDEC JDS-001-2012” Class I-C
(1kV to < 2 kV)
1000
200
ESD Withstand
Charge Device Model,
“JESD 22-C101-E” Class II (200V to
< 500V)
ESDCDM
NBM™ in a VIA Package
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General Characteristics (Cont.)
Specifications apply over all line, load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TCASE
≤100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Safety
Min
Typ
Max
Unit
Isolation capacitance
CHI_lo
RHI_lo
Unpowered unit
N/A
0
N/A
N/A
pF
Isolation resistance
At 500VDC
MΩ
MIL-HDBK-217Plus Parts Count - 25°C
Ground Benign, Stationary, Indoors /
Computer
2.2
3.6
MHrs
MHrs
MTBF
Telcordia Issue 2 - Method I Case III;
25°C Ground Benign, Controlled
Agency approvals / standards
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
NBM™ in a VIA Package
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NBM in a VIA Package
IHI
ILO
RLO
+
+
V•I
K
K • ILO
K • VHI
+
–
+
–
VHI
VLO
IHI_Q
–
–
Figure 16 — NBM DC model (Forward direction)
The NBM in a VIA package uses a high frequency resonant tank
to move energy from high voltage side to low voltage side and
vice versa. The resonant LC tank, operated at high frequency, is
amplitude modulated as a function of HI side voltage and LO side
current. A small amount of capacitance embedded in the high
attributes. Assuming that RLO = 0Ω and IHI_Q = 0A, Eq. (3) now
becomes Eq. (1) and is essentially load independent, resistor R is
now placed in series
with VHI.
voltage side and low voltage side stages of the module is sufficient
for full functionality and is key to achieving high power density.
The NBM3814x46C15A6yzz can be simplified into the preceeding
model.
R
NBM
V
LO
+
–
K = 1/3
VHI
At no load:
VLO = VHI • K
(1)
(2)
Figure 17 — K = 1/3 NBM with series HI side resistor
K represents the “turns ratio” of the NBM.
Rearranging Eq (1):
The relationship between VHI and VLO becomes:
VLO
K =
VHI
•
•
K
VLO = (VHI – IHI R)
(5)
In the presence of load, VLO is represented by:
Substituting the simplified version of Eq. (4)
(IHI_Q is assumed = 0A) into Eq. (5) yields:
VLO = VHI • K – ILO • RLO
and ILO is represented by:
IHI – IHI_Q
(3)
(4)
2
•
•
•
R K
VLO = VHI K – ILO
(6)
This is similar in form to Eq. (3), where RLO is used to represent the
characteristic impedance of the NBM™. However, in this case a real
R on the high voltage side of the NBM is effectively scaled by K2
with respect to the low voltage side.
ILO
=
K
RLO represents the impedance of the NBM, and is a function of the
RDS_ON of the HI side and LO side MOSFETs, PC board resistance of
HI side and LO side boards and the winding resistance of the power
auto-transformer. IHI_Q represents the HI side quiescent current
of the NBM control, gate drive circuitry, and core losses. The
use of DC voltage transformation provides additional interesting
Assuming that R = 1Ω, the effective R as seen from the low voltage
side is 111mΩ, with K = 1/3.
NBM™ in a VIA Package
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A similar exercise should be performed with the additon of a
capacitor or shunt impedance at the high voltage side of the NBM.
A switch in series with VHI is added to the circuit. This is depicted in
Figure 18.
Low impedance is a key requirement for powering a high-
current, low-voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a NBM
between the regulation stage and the point of load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, the benefits are
not useful if the series impedance of the NBM is too high. The
impedance of the NBM must be low, i.e. well beyond the
crossover frequency of the system.
S
NBM
V
LO
+
–
K = 1/3
C
V
HI
A solution for keeping the impedance of the NBM low involves
switching at a high frequency. This enables small magnetic
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low loss
core material at high frequencies also reduces core losses.
Figure 18 — NBM with HI side capacitor
The two main terms of power loss in the NBM module are:
n No load power dissipation (PHI_NL): defined as the power
used to power up the module with an enabled powertrain
at no load.
A change in VHI with the switch closed would result in a change in
capacitor current according to the following equation:
n Resistive loss (RLO): refers to the power loss across
the NBM module modeled as pure resistive impedance.
dVHI
(7)
Ic(t) = C
dt
Pdissipated = PHI_NL + PRLO
(10)
(11)
Assume that with the capacitor charged to VHI, the switch is
opened and the capacitor is discharged through the idealized NBM.
In this case,
Therefore,
PLO_OUT = PHI_IN – Pdissipated = PHI_IN – PHI_NL – PRLO
•
Ic= ILO
K
(8)
The above relations can be combined to calculate the overall
module efficiency:
substituting Eq. (1) and (8) into Eq. (7) reveals:
C
K2
dVLO
dt
(9)
ILO
=
•
ꢀꢀ
h
pLO_OUt
pHi_iN
pHi_iN – pHi_NL – pRLO
pHi_iN
=
=
(12)
The equation in terms of the LO side has yielded a K2 scaling factor
for C, specified in the denominator of the equation.
A K factor less than unity results in an effectively larger capacitance
on the low voltage side when expressed in terms of the high side.
With a K = 1/3 as shown in Figure 18, C = 1µF would appear as
2
VHI
i
HI – pHI_NL – (iLO
)
R
•
LO
•
=
VHi • iHi
C = 9µF when viewed from the low voltage side.
2
pHI_NL + (iLO
)
R
•
LO
=
1
–
(
)
VHI • iHI
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This enables a reduction in the size and number of capacitors used
in a typical system.
Filter Design
A major advantage of NBM systems versus conventional PWM
converters is that the auto-transformer based NBM does not
require external filtering to function properly. The resonant LC
tank, operated at extreme high frequency, is amplitude modulated
as a function of HI side voltage and LO side current and efficiently
transfers charge through the auto-transformer. A small amount
of capacitance embedded in the HI side and LO side stages of the
module is sufficient for full functionality and is key to achieving
power density.
Thermal Considerations
The VIA™ package provides effective conduction cooling from
either of the two module surfaces. Heat may be removed from the
top surface, the bottom surface or both. The extent to which these
two surfaces are cooled is a key component for determining the
maximum power that can be processed by a VIA, as can be seen
from specified thermal operating area in Figure 1. Since the VIA has
a maximum internal temperature rating, it is necessary to estimate
this internal temperature based on a system-level thermal solution.
To this purpose, it is helpful to simplify the thermal solution into a
roughly equivalent circuit where power dissipation is modeled as
a current source, isothermal surface temperatures are represented
as voltage sources and the thermal resistances are represented as
resistors. Figure 19 shows the “thermal circuit” for the VIA module.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
n Guarantee low source impedance:
To take full advantage of the NBM module’s dynamic
response, the impedance presented to its HI side terminals
must be low from DC to approximately 5MHz. The
connection of the bus converter module to its power
source should be implemented with minimal distribution
inductance. If the interconnect inductance exceeds
100nH, the HI side should be bypassed with a RC damper
to retain low source impedance and stable operation. With
an interconnect inductance of 200nH, the RC damper
may be as high as 1µF in series with 0.3Ω. A single
electrolytic or equivalent low-Q capacitor may be used in
place of the series RC bypass.
+
RJC_TOP
TC_TOP
–
RHOU
s
–
TC_BOT
n Further reduce HI side and/or LO side voltage ripple without
sacrificing dynamic response:
RJC_BOT
+
PDISS
Given the wide bandwidth of the module, the source
response is generally the limiting factor in the overall
system response. Anomalies in the response of the HI side
source will appear at the LO side of the module multiplied by
its K factor.
s
Figure 19 — Double sided cooling VIA thermal model
In this case, the internal power dissipation is PDISS, RJC_TOP and
RJC_BOT are thermal resistance characteristics of the VIA module and
the top and bottom surface temperatures are represented as TC_TOP
and TC_BOT. It is interesting to notice that the package itself provides
a high degree of thermal coupling between the top and bottom
case surfaces (represented in the model by the resistor RHOU). This
feature enables two main options regarding thermal designs:
n Protect the module from overvoltage transients imposed
by the system that would exceed maximum ratings and
induce stresses:
,
The module high/low side voltage ranges shall not be
exceeded. An internal overvoltage lockout function
prevents operation outside of the normal operating HI side
range. Even when disabled, the powertrain is exposed
to the applied voltage and power MOSFETs must
withstand it.
n Single side cooling: the model of Figure 19 can be simplified by
calculating the parallel resistor network and using one simple
thermal resistance number and the internal power dissipation
curves; an example for bottom side cooling only is shown in
Figure 20.
Total load capacitance of the NBM module shall not exceed the
specified maximum. Owing to the wide bandwidth and small LO
side impedance of the module, low-frequency bypass capacitance
and significant energy storage may be more densely and efficiently
provided by adding capacitance at the HI side of the module. At
frequencies <500kHz the module appears as an impedance of RLO
between the source and load.
In this case, RJC can be derived as following:
(RJC_TOP + RHOU) • RJC_BOT
R
=
(14)
JC
RJC_TOP + RHOU + RJC_BOT
Within this frequency range, capacitance at the HI side appears as
effective capacitance on the LO side per the relationship
defined in Eq. (13).
CHI_EXT
(13)
CLO_EXT
=
K2
NBM™ in a VIA Package
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ZHI_EQ1
ZLO_EQ1
NBM™
R0_1
1
VHI
VLO
RJC
+ TC_BOT
s
ZLO_EQ2
ZHI_EQ2
NBM™
R0_2
2
PDISS
+
Load
DC
s
Figure 20 — Single-sided cooling VIA thermal model
ZLO_EQn
NBM™
R0_n
n
ZHI_EQn
n Double side cooling: while this option might bring limited
advantage to the module internal components (given the
surface-to-surface coupling provided), it might be appealing
in cases where the external thermal system requires allocating
power to two different elements, like for example heatsinks with
independent airflows or a combination of chassis/air cooling.
Figure 21 — NBM module array
The fuse shall be selected by closely matching system
requirements with the following characteristics:
Current Sharing
n Current rating
(usually greater than maximum current of NBM module)
The performance of the NBM in a VIA package is based on efficient
transfer of energy through an auto-transformer without the need
of closed loop control. For this reason, the transfer characteristic
can be approximated by an ideal auto-transformer with a positive
temperature coefficient series resistance.
n Maximum voltage rating
(usually greater than the maximum possible input voltage)
n Ambient temperature
n Nominal melting I2t
This type of characteristic is close to the impedance characteristic
of a DC power distribution system both in dynamic (AC) behavior
and for steady state (DC) operation.
n Recommend fuse: ≤60A Littelfuse TLS Series (HI side)
When multiple NBM modules of a given part number are
connected in an array they will inherently share the load current
according to the equivalent impedance divider that the system
implements from the power source to the point of load.
Startup and Reverse Operation
The NBM3814x46C15A6yzz is capable of startup in forward and
reverse direction once the applied voltage is greater than the
undervoltage lockout threshold.
Some general recommendations to achieve matched array
impedances include:
The non-isolated bus converter modules are capable of reverse
power operation. Once the unit is enabled, energy can be
transferred from low voltage side back to the high voltage side
whenever the low side voltage exceeds VHI • K. The module will
continue operation in this fashion for as long as no faults occur.
n Dedicate common copper planes/wires within the PCB/Chassis
to deliver and return the current to the VIA modules.
n Provide as symmetric a PCB/Wiring layout as possible among
VIA™ modules
Startup loading could be set to no greater than 20% of rated max
current respectively in forward or reverse direction. A load must
not be present on the +VHI pin if the powertrain is not actively
switching. Remove +HI load prior to disabling the module using
+LO power or prior to faults. High voltage side MOSEFT body diode
conduction will occur if unit stops switching while a load is present
on the +VHI and +VLO voltage is two diodes drop higher than +VHI.
For further details see AN:016 Using BCM Bus Converters
in High Power Arrays.
Fuse Selection
In order to provide flexibility in configuring power systems, NBM in
a VIA package modules are not internally fused. Input line fusing of
NBM in a VIA package products is recommended at system level to
provide thermal protection in case of catastrophic failure.
NBM™ in a VIA Package
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NBM in VIA Package Chassis (Lug) Mount Package Mechanical Drawing
NBM™ in a VIA Package
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NBM in VIA Package PCB (Board) Mount Package Mechanical Drawing and Recommended Hole Pattern
4
3
21
31
1
10
MCDHOLPTARNE
2
1
3
4
2
3
W
OTPVIEW
TBMOEV
0
1
1
2
NBM™ in a VIA Package
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Revision History
Revision
1.0
Date
Description
Page Number(s)
03/3/16
05/2/16
Initial release
n/a
All
1.1
New Power Pin Nomenclature
NBM™ in a VIA Package
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Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and ac-
cessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power
systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no
representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make
changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and
is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls
are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where mandated by government requirements, testing of
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“Express Limited Warranty”). This warranty is extended only to the original Buyer for the period expiring two (2) years after the date of shipment
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email
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