PI3741-0X_18 [VICOR]
21V to 60VIN, 150W, Cool-Power ZVS Buck-Boost Regulator;型号: | PI3741-0X_18 |
厂家: | VICOR CORPORATION |
描述: | 21V to 60VIN, 150W, Cool-Power ZVS Buck-Boost Regulator |
文件: | 总39页 (文件大小:968K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Cool-Power®
ZVS Switching Regulators
PI3741-0x
21V to 60VIN, 150W, Cool-Power ZVS Buck-Boost Regulator
Product Description
Features & Benefits
The PI3741-0x series is a high efficiency, wide range DC-DC ZVS
Buck-Boost Regulator with two output range configurations that
utilize the same high density System-in-Package (SiP). Integrating
controller, power switches, support components and a high
performance Zero-Voltage Switching (ZVS) topology within the
PI3741-0x increases point of load performance while providing
best in class power efficiency.
• Up to 97% efficiency
• 150W of continuous output power
(for specific conditions)
• Fast transient response
• Parallel capable with single wire current sharing
• External frequency synchronization / interleaving
• High Side Current Sense Amplifier
• General Purpose Amplifier
The PI3741-0x requires an external inductor, resistive divider and
minimal capacitors to form a complete DC-DC switching mode
buck-boost regulator.
Output Voltage
Device
• Input Over/Undervoltage Lockout (OVLO/UVLO)
• Output Overvoltage Protection (OVP)
• Over Temperature Protection (OTP)
• Fast and slow current limits
Set
24V
48V
Range
21 to 36V
36 to 54V
PI3741-00-LGIZ
PI3741-01-LGIZ
The ZVS architecture also enables high frequency operation while
minimizing switching losses and maximizing efficiency. The high
switching frequency operation reduces the size of the external
filtering components, improves power density, and enables fast
dynamic response to line and load transients.
• -40°C to 115°C operating range (TJ)
• Excellent light load efficiency
Applications
• Telecom, Networking, Lighting
• Computing, Communications, Industrial
• Renewable Energy Systems
Package Information
• 10mm x 14mm x 2.56mm LGA SiP
Typical Application
L1
VIN
VIN
VS1
VS2
VOUT
VOUT
CIN
COUT
PGND
ISP
PGND
ISN
IMON
VSN
VDR
10kΩ
PI3741
PGD
EN
R1
R2
VSP
VDIFF
SYNCO
EAIN
EAO
SYNCI
TRK
COMP
SGND
CCOMP
CTRK
4700pF
Cool-Power® ZVS Switching Regulators
Page 1 of 39
Rev 1.8
02/2018
PI3741-0x
Rated Output Current / Power
6.0
5.5
5.0
4.5
4.0
150
140
130
120
110
100
90
3.5
3.0
80
20
25
30
35
40
45
50
55
60
20
25
30
35
40
45
50
55
60
Input Voltage (V)
Input Voltage (V)
32VOUT
36VOUT
32VOUT
36VOUT
21VOUT
24VOUT
28VOUT
21VOUT
24VOUT
28VOUT
Output Current of PI3741-00-LGIZ
Output Power of PI3741-00-LGIZ
160
150
4.5
4.0
3.5
3.0
2.5
2.0
1.5
140
130
120
110
100
90
20
25
30
35
40
45
50
55
60
20
25
30
35
40
45
50
55
60
Input Voltage (V)
Input Voltage (V)
36VOUT
40VOUT
48VOUT
54VOUT
36VOUT / 40VOUT
48VOUT / 54VOUT
Output Current of PI3741-01-LGIZ
Output Power of PI3741-01-LGIZ
Cool-Power® ZVS Switching Regulators
Page 2 of 39
Rev 1.8
02/2018
PI3741-0x
Contents
Order Information
4
4
Application Description
Output Voltage Trim
Soft-Start Adjustment and Tracking
Inductor Pairing
23
23
23
23
24
26
Absolute Maximum Ratings
Pin Description
5
Package Pin-Out
6
Large Pin Blocks
6
Filter Considerations
Thermal Design
Storage and Handling Information
Block Diagram
7
7
PI3741-00-LGIZ Percentage of SiP Loss to Total Loss
PI3741-01-LGIZ Percentage of SiP Loss to Total Loss
Evaluation Board Thermal De-rating
Parallel Operation
30
31
32
34
34
34
35
35
35
35
36
37
38
39
PI3741-00-LGIZ Electrical Characteristics
PI3741-01-LGIZ Electrical Characteristics
PI3741-00-LGIZ Performance Characteristics TA = 25°C
PI3741-01-LGIZ Performance Characteristics TA = 25°C
MTBF
8
11
14
17
20
21
21
21
21
21
21
21
21
21
22
22
22
22
22
Synchronization
Interleaving
Functional Description
VDR Bias Regulator
Enable
System Design Considerations
Inductive Loads
Switching Frequency Synchronization
Soft-Start and Tracking
Low Voltage Operation
Remote Sensing Differential Amplifier
Power Good
Package Drawings
Receiving PCB Pattern Design Recommendations
Revision History
Output Current Limit Protection
Input Undervoltage Lockout
Input Overvoltage Lockout
Output Overvoltage Protection
Overtemperature Protection
Pulse Skip Mode (PSM)
Warranty
Variable Frequency Operation
IMON Amplifier
Cool-Power® ZVS Switching Regulators
Page 3 of 39
Rev 1.8
02/2018
PI3741-0x
Order Information
Part Number
PI3741-00-LGIZ
PI3741-01-LGIZ
Description
Package
Transport Media
TRAY
MFG
Vicor
Vicor
21 – 60VIN to 21 – 36VOUT
21 – 60VIN to 36 – 54VOUT
10mm x 14mm 108-pin LGA
10mm x 14mm 108-pin LGA
TRAY
Absolute Maximum Ratings
Note: Stresses beyond these limits may cause permanent damage to the device. Operation at these conditions or conditions beyond those listed in the
Electrical Specifications table is not guaranteed. All voltage nodes are referenced to PGND unless otherwise noted.
Location
Name
VIN
VMAX
75V
VMIN
-0.7V
-0.7VDC
-0.7VDC
-0.7VDC
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
-1.5V
-1.5V
-0.5V
-0.3V
-0.3V
-0.3V
-2VDC
-2VDC
-0.3V
N/A
ISOURCE
40A [1]
40A [1]
40A [1]
40A [1]
30mA
20mA
5mA
ISINK
40A [1]
18A [1]
18A [1]
40A [1]
200mA
20mA
5mA
1–2, G–K
4–5, G–K
VS1
75V
10–11, G–K
VS2
75V
13–14, G–K
VOUT
VDR
75V
1E
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
75V
1D
PGD
SYNCO
SYNCI
FT1
1C
1B
5mA
5mA
1A
5mA
5mA
2A
FT2
5mA
5mA
3A
FT3
5mA
5mA
4A
FT4
10mA
5mA
10mA
5mA
5A
EN
6A
TRK
50mA
5mA
50mA
5mA
7A
LGH
8A
COMP
VSN
5mA
5mA
9A
5mA
5mA
10A
VSP
5mA
5mA
11A
VDIFF
EAIN
EAO
IMON
ISN [2]
ISP [2]
SGND
PGND
5mA
5mA
12A
5mA
5mA
13A
5mA
5mA
14A
5mA
5mA
14D
5mA
5mA
14E
75V
5mA
5mA
10–14, B + 10–12, C–E
2–9, B–E + 7-8, F–K
[1] Non-Operating Test Mode Limits.
0.3V
N/A
200mA
18A [1]
200mA
18A [1]
[2] The ISP pin to ISN pin has a maximum differential limit of +5.5VDC and -0.5VDC
.
Cool-Power® ZVS Switching Regulators
Page 4 of 39
Rev 1.8
02/2018
PI3741-0x
Pin Description
Pin Number
1–2, G–K
Pin Name
VIN
Description
Input voltage and sense node for UVLO, OVLO and feed forward compensation.
Input side switching node and ZVS sense node for power switches.
Output side switching node and ZVS sense node for power switches.
4–5, G–K
VS1
10–11, G–K
VS2
Output voltage and sense node for power switches, VOUT feed forward compensation, VOUT_OV
and internal signals.
13–14, G–K
VOUT
VDR
Internal 5.1V supply for gate drivers and internal logic. May be used as reference or low power bias supply
for up to 2mA. Must be impedance limited by the user.
1E
1D
1C
Fault & Power Good indicator. PGD pulls low when the regulator is not operating or if EAIN is less
than 1.4V.
PGD
Synchronization output. Outputs a high signal for ½ of the programmed switching period at the beginning
of each switching cycle, for synchronization of other regulators.
SYNCO
Synchronization input. When a falling edge synchronization pulse is detected, the PI3741-0x will delay
the start of the next switching cycle until the next falling edge sync pulse arrives, up to a maximum delay
of two times the programmed switching period. If the next pulse does not arrive within two times the
programmed switching period, the controller will leave sync mode and start a switching cycle automatically.
Connect to SGND when not in use.
1B
SYNCI
1A
2A
3A
4A
FT1
FT2
FT3
FT4
For factory use only. Connect to SGND or leave floating in application.
For factory use only. Connect to SGND or leave floating in application.
For factory use only. Connect to SGND in application.
For factory use only. Connect to SGND in application.
Regulator Enable control. Asserted high or left floating – regulator enabled;
Asserted low, regulator output disabled.
5A
EN
Soft-start and track input. An external capacitor may be connected between TRK pin and SGND to decrease
the rate of output rise during soft-start.
6A
7A
TRK
LGH
For factory use only. Connect to SGND in application.
Error amp compensation dominant pole. Connect a capacitor of 4700pF by default between COMP
and SGND to set the control loop dominant pole. If the application requires output capacitance from
recommended in table 1, please contact Applications Support to compensate the control loop.
8A
COMP
9A
VSN
VSP
General purpose amplifier inverting input.
10A
11A
12A
General purpose amplifier non-inverting input.
VDIFF
EAIN
General Purpose amplifier output. When unused connect VDIFF to VSN and VSP to SGND.
Error amplifier inverting input and sense for PGD. Connect by resistive divider to the output.
Error amp output: External connection for additional compensation and current sharing. Leave floating
to use the internal error amplifier capacitance for default loop compensation. Please contact Applications
Support if additional compensation is needed.
13A
EAO
14A
14D
14E
IMON
ISN
High side current sense amplifier output.
High side current sense amplifier negative input.
High side current sense amplifier positive input.
ISP
Signal ground. Internal logic and analog ground for the regulator. SGND and PGND are star connected
within the regulator package.
10–14, B + 10–12, C–E
2–9, B-E + 7–8, F–K
SGND
PGND
Power ground. VIN, VOUT, VS1 and VS2 power returns. SGND and PGND are star connected within the
regulator package.
Cool-Power® ZVS Switching Regulators
Page 5 of 39
Rev 1.8
02/2018
PI3741-0x
Package Pin-Out
1
2
FT1
FT2
SYNCI
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SGND
SGND
SGND
SGND
SGND
SYNC0
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SGND
SGND
SGND
PGD
VDR
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SGND
SGND
SGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SGND
SGND
SGND
3
FT3
4
FT4
VS1
VS1
VS1
VS1
VS1
VS1
VS1
VS1
EN
5
TRK
6
LGH
COMP
VSN
VSP
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
7
8
9
VS2
VS2
VS2
VS2
VS2
VS2
VS2
VS2
10
11
12
13
14
VDIFF
EAIN
EAO
IMON
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
ISN
ISP
Large Pin Blocks
Pin Block Name
Group of pins
VIN
G1-2, H1-2, J1-2, K1-2
G4-5, H4-5, J4-5, K4-5
VS1
PGND
VS2
B2-9, C2-9, D2-9, E2-9, F7-8, G7-8, H7-8, J7-8, K7-8
G10-11, H10-11, J10-11, K10-11
VOUT
SGND
G13-14, H13-14, J13-14, K13-14
B10-14, C10-12, D10-12, E10-12
Cool-Power® ZVS Switching Regulators
Page 6 of 39
Rev 1.8
02/2018
PI3741-0x
Storage and Handling Information
Maximum Storage Temperature Range
Maximum Operating Junction Temperature Range
Soldering Temperature for 20 seconds
MSL Rating
-65°C to 150°C
-40°C to 115°C
245°C
3
ESD Rating [3]
2.0kV HBM; 1.0kV CDM
[3] JS-200-2014, JESD22-A114F.
Block Diagram
VS1 VS2
VIN
VOUT
Q1
Q3
ISN
ISP
IMON
-
+
VS1
Q2
VS2
Q4
VSN
VSP
-
+
LDO
VDIFF
VDR
EAIN
EAO
ZVS Buck Boost Control
and
Digital Parametric Trim
-
+
SYNCO
SYNCI
PGD
VREF
EN
FT1 - FT5
COMP
TRK
CLAMP
0Ω
PGND
Cool-Power® ZVS Switching Regulators
Page 7 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-00-LGIZ Electrical Characteristics
Specifications apply for the conditions -40°C < TJ < 115°C, VIN = 48V, VOUT = 24V, LEXT = 900nH [4], external CIN = 5 x 2.2µF, external COUT = 8 x 2.2µF,
unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input Specifications
Input Voltage
VIN_DC
21
48
60
V
Input Current During Output Short
(Fault Condition Duty Cycle)
[5]
IIN_SHORT
1.9
mA
Input Quiescent Current
Input Quiescent Current
Input Voltage Slew Rate
Internal Input Capacitance
VIN UVLO Threshold Rising
VIN UVLO Hysteresis
IQ_VIN
IQ_VIN
Enabled (no load)
4
mA
mA
V / µs
µF
Disabled
1.5
[5]
VIN_SR
1
CIN
25°C, VIN = 48V
0.5
19.2
0.7
VIN_UVLO_START
VIN_UVLO_HYS
VIN_OVLO_START
VIN_OVLO_HYS
V
V
VIN OVLO Threshold Rising
VIN OVLO Hysteresis
61
64.5
1.3
68
V
V
Output Specifications
EAIN Voltage Total Regulation
Output Voltage Range
VEAIN_DC
VOUT_DC
IOUT_DCR
1.667
21
1.7
24
1.734
36
V
V
A
[6]
Output Current Range
0
max
VIN = 21 – 48V, VOUT ≤ 24V, TCASE = 25°C [6]
VIN = 48 – 60V, VOUT ≤ 24V, TCASE = 25°C [6]
VIN = 21 – 48V, VOUT = 24 – 36V, TCASE = 25°C [6]
VIN = 48 – 60V, VOUT = 24 – 36V, TCASE = 25°C [6]
4.17
5.42
100
130
Output Current Steady State
Output Power Steady State
IOUT_DC
A
POUT_DC
W
Line Regulation
Load Regulation
∆VOUT(∆VIN) @ 25°C, 21V < VIN < 60V
0.10
0.10
%
%
∆VOUT(∆IOUT
)
@ 25°C, IOUT above 5% of the typical full load
IOUT = 5.42A, VIN = 48V, VOUT = 24V, TCASE = 25°C
COUT_EX = 8 x 2.2µF, 100V, X7R, 20MHz BW
Output Ripple
VOUT_AC
208
mVp-p
Internal Output Capacitance
VOUT Overvoltage Threshold
VOUT Overvoltage Hysteresis
COUT
25°C, VOUT = 24V
0.75
41.9
0.8
µF
V
VOUT_OVT
VOUT_OVH
Rising VOUT threshold to detect open loop
39.8
4.9
44
V
VDR
VDR Supply Voltage
VDR
Generated internally
5.1
5.36
260
V
Current Sense Amplifier (Dedicated to monitor Input or Output Current)
ISP Pin Bias Current (Sink)
ISN Pin Bias Current
Common Mode Input Range
IMON Source Current
IMON Sink Current
IMON Output At No Load
Full Scale Error
VOUT = 10V, Flows to SGND
VOUT = 10V
90
150
0
µA
µA
8
1
60
3
V
1.8
1.6
10
mA
mA
mV
%
1
2.6
20
4
0
40mV input
-4
[5]
Bandwidth
40
20
20
kHz
µs
Settling Time For Full Scale Step
Gain
1%
AV_CS
V / V
Cool-Power® ZVS Switching Regulators
Page 8 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-00-LGIZ Electrical Characteristics (Cont.)
Specifications apply for the conditions -40°C < TJ < 115°C, VIN = 48V, VOUT = 24V, LEXT = 900nH [4], external CIN = 5 x 2.2µF, external COUT = 8 x 2.2µF,
unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
General Purpose Amplifier
[5]
[5]
Open Loop Gain
96
5
120
7
140
dB
MHz
mV
V
Small Signal Gain-Bandwidth
Offset
12
-1
1
Common Mode Input Range
Differential Mode Input Range
Maximum Output Voltage
Minimum Output Voltage
-0.1
2.5
2
VDR – 0.2V
20
V
IDIFF = -1mA
No Load
V
mV
Capacitive Load for Stable
Operation
[5]
0
100
pF
Slew Rate
10
V / µs
mA
Output Current
-1
1
Transconductance Error Amplifier
EAIN = EAO, 25ºC
EAIN = EAO
1.688
1.674
0
1.7
1.7
1.712
1.726
VDR
Reference
VREF
V
Input Range
VEAIN
Note VEAIN_OV below
V
V
Maximum Output Voltage
Minimum Output Voltage
Transconductance
3.35
3.6
0.05
7.6
6
4.0
0.15
V
Factory Set
mS
kΩ
µA
µA
dB
pF
pF
Zero Resistor
Factory Set
EAO Output Current Sourcing
EAO Output Current Sinking
Open Loop Gain
VEAO = 50mV, VEAIN = 0V
VEAO = 2V, VEAIN = 5V
ROUT > 1MΩ [5]
400
400
80
70
Input Capacitance
56
Output Capacitance
56
Control and Protection
Switching Frequency
VEAO Pulse Skip Threshold
Control Node Range
VEAO Overload Threshold
Overload Timeout
FSW
VEAO_PST
VRAMP
VEAO_OL
TOL
1
MHz
V
VEAO to SGND
0.4
0
3.3
V
VEAO to SGND
VEAO > VEAO_OL
3.175
3.3
1
3.425
V
ms
Module shuts down after 1ms of overload and restarts
after 30ms
Overload due to EAO limit
IOUT_EAOLIM
6.8
A
VEAIN Output Overvoltage Threshold
Overtemperature Fault Threshold
Overtemperature Restart Hysteresis
VOUT Negative Fault Threshold
VEAIN_OV
TOTP
VEAIN > VEAIN_OV
1.94
2.04
125
30
2.14
V
°C
°C
V
[5]
[5]
TOPT_HYS
-0.45
-0.25
-0.15
Cool-Power® ZVS Switching Regulators
Page 9 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-00-LGIZ Electrical Characteristics (Cont.)
Specifications apply for the conditions -40°C < TJ < 115°C, VIN = 48V, VOUT = 24V, LEXT = 900nH [4], external CIN = 5 x 2.2µF, external COUT = 8 x 2.2µF,
unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Soft Start and Tracking Function
TRK Active Range
Nominal
0
1.7
70
V
TRK Disable Threshold
TRK Internal Capacitance
Soft Start Charge Current
Soft Start Discharge Current
Soft Start Time
20
45
.047
50
mV
µF
30
70
µA
mA
ms
VTRK = 0.5V
9
tSS
Ext CSS = 0µF
1.6
Enable
Enable High Threshold
Enable Low Threshold
Enable Threshold Hysteresis
Enable Pin Bias Current
Enable Pull-up Voltage
Fault Restart Delay Time
ENIH
ENIL
0.9
0.7
100
1
1.1
0.9
300
V
V
0.8
200
50
ENHYS
mV
µA
V
VEN = 0V or VEN = 2V
Floating
2.0
30
tFR_DLY
ms
Digital Signals
SYNCI High Threshold
SYNCO High
VDR = 5.1V
1/2 VDR
V
V
SYNCOOH
SYNCOOL
PGDILH
VDR - 0.5
VDR
0.5
SYNCO Low
ISYNCO = 1mA
VPGD = VDR
IPGD = 4mA
V
PGD High Leakage
PGD Output Low
10
µA
V
PGDOL
0.4
PGD EAIN Low Rise
PGD EAIN Low Fall
PGD EAIN Threshold Hysteresis
PGD EAIN High
1.41
1.36
1.45
1.41
35
1.48
1.46
V
V
mV
V
1.94
2.04
2.14
[4] See Inductor Pairing section.
[5] Assured to meet performance specification by design, test correlation, characterization, and / or statistical process control.
[6] Output current capability varies with input & output voltage. See rated output current / power curves on page 2.
Cool-Power® ZVS Switching Regulators
Page 10 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-01-LGIZ Electrical Characteristics
Specifications apply for the conditions -40°C < TJ < 115°C, VIN = 48V, VOUT = 48V, LEXT = 900nH [4], external CIN = 5 x 2.2µF, external COUT = 8 x 2.2µF,
unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input Specifications
Input Voltage
VIN_DC
21
48
60
V
Input Current During Output Short
(Fault Condition Duty Cycle)
[5]
IIN_SHORT
1.9
mA
Input Quiescent Current
Input Quiescent Current
Input Voltage Slew Rate
Internal Input Capacitance
VIN UVLO Threshold Rising
VIN UVLO Hysteresis
IQ_VIN
IQ_VIN
Enabled (no load)
5
mA
mA
V / µs
µF
Disabled
1.5
[5]
VIN_SR
1
CIN
25°C, VIN = 48V
0.5
19.2
0.7
VIN_UVLO_START
VIN_UVLO_HYS
VIN_OVLO_START
VIN_OVLO_HYS
V
V
VIN OVLO Threshold Rising
VIN OVLO Hysteresis
61
64.5
1.3
68
V
V
Output Specifications
EAIN Voltage Total Regulation
Output Voltage Range
VEAIN_DC
VOUT_DC
IOUT_DCR
1.667
36
1.7
48
1.734
54
V
V
A
[6]
Output Current Range
0
max
VIN = 21 – 48V, VOUT ≤ 48V, TCASE = 25°C [6]
VIN = 48 – 60V, VOUT ≤ 48V, TCASE = 25°C [6]
VIN = 21 – 48V, VOUT = 48 – 54V, TCASE = 25°C [6]
VIN = 48 – 60V, VOUT = 48 – 54V, TCASE = 25°C [6]
2.09
3.13
100
150
Output Current Steady State
Output Power Steady State
IOUT_DC
A
POUT_DC
W
Line Regulation
Load Regulation
∆VOUT(∆VIN) @ 25°C, 21V < VIN < 60V
0.10
0.10
%
%
∆VOUT(∆IOUT
)
@ 25°C, IOUT above 5% of the typical full load
IOUT = 3.13A, VIN = 48V, VOUT = 48V, TCASE = 25°C
COUT_EX = 8 x 2.2µF, 100V, X7R, 20MHz BW
Output Ripple
VOUT_AC
320
mVp-p
Internal Output Capacitance
VOUT Overvoltage Threshold
VOUT Overvoltage Hysteresis
COUT
25°C, VOUT = 48V
0.5
63.1
1.3
µF
V
VOUT_OVT
VOUT_OVH
Rising VOUT threshold to detect open loop
60
66.3
V
VDR
VDR Supply Voltage
VDR
Generated Internally
4.9
5.1
5.36
260
V
Current Sense Amplifier (Dedicated to monitor Input or Output Current)
ISP Pin Bias Current (Sink)
ISN Pin Bias Current
Common Mode Input Range
IMON Source Current
IMON Sink Current
IMON Output At No Load
Full Scale Error
VOUT = 10V, Flows to SGND
VOUT = 10V
90
150
0
µA
µA
8
1
60
3
V
1.8
1.6
mA
mA
mV
%
1
2.6
10
4
0
40mV input
-4
[5]
Bandwidth
40
20
20
kHz
µs
Settling Time For Full Scale Step
Gain
1%
AV_CS
V / V
Cool-Power® ZVS Switching Regulators
Page 11 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-01-LGIZ Electrical Characteristics (Cont.)
Specifications apply for the conditions -40°C < TJ < 115°C, VIN = 48V, VOUT = 48V, LEXT = 900nH [4], external CIN = 5 x 2.2µF, external COUT = 8 x 2.2µF,
unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
General Purpose Amplifier
[5]
[5]
Open Loop Gain
96
5
120
7
140
dB
MHz
mV
V
Small Signal Gain-Bandwidth
Offset
12
-1
1
Common Mode Input Range
Differential Mode Input Range
Maximum Output Voltage
Minimum Output Voltage
-0.1
2.5
2
VDR – 0.2V
20
V
IDIFF = -1mA
No Load
V
mV
Capacitive Load for Stable
Operation
[5]
0
100
pF
Slew Rate
10
V / µs
mA
Output Current
-1
1
Transconductance Error Amplifier
EAIN = EAO, 25ºC
EAIN = EAO
1.688
1.674
0
1.7
1.7
1.712
1.726
VDR
Reference
VREF
V
Input Range
VEAIN
Note VEAIN_OV below
V
V
Maximum Output Voltage
Minimum Output Voltage
Transconductance
3.35
3.6
0.05
5.1
5
4.0
0.15
V
Factory Set
mS
kΩ
µA
µA
dB
pF
pF
Zero Resistor
Factory Set
EAO Output Current Sourcing
EAO Output Current Sinking
Open Loop Gain
VEAO = 50mV, VEAIN = 0V
VEAO = 2V, VEAIN = 5V
ROUT > 1MΩ [5]
400
400
80
70
Input Capacitance
56
Output Capacitance
56
Control and Protection
Switching Frequency
VEAO Pulse Skip Threshold
Control Node Range
VEAO Overload Threshold
Overload Timeout
FSW
VEAO_PST
VRAMP
VEAO_OL
TOL
1
MHz
V
VEAO to SGND
0.4
0
3.3
V
VEAO to SGND
VEAO > VEAO_OL
3.175
3.3
1
3.425
V
ms
Module shuts down after 1ms of overload and restarts
after 30ms
Overload due to EAO limit
IOUT_EAOLIM
VEAIN_OV
5.0
A
V
VEAIN Output Overvoltage Threshold
VEAIN > VEAIN_OV
1.94
2.04
2.14
[5]
[5]
Overtemperature Fault Threshold
Overtemperature Restart Hysteresis
VOUT Negative Fault Threshold
TOTP
125
30
°C
°C
V
TOPT_HYS
-0.45
-0.25
-0.15
Cool-Power® ZVS Switching Regulators
Page 12 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-01-LGIZ Electrical Characteristics (Cont.)
Specifications apply for the conditions -40°C < TJ < 115°C, VIN = 48V, VOUT = 48V, LEXT = 900nH [4], external CIN = 5 x 2.2µF, external COUT = 8 x 2.2µF,
unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Soft Start and Tracking Function
TRK Active Range
Nominal
0
1.7
70
V
TRK Disable Threshold
TRK Internal Capacitance
Soft Start Charge Current
Soft Start Discharge Current
Soft Start Time
20
45
.047
50
mV
µF
30
70
µA
mA
ms
VTRK = 0.5V
9
tSS
Ext CSS = 0µF
1.6
Enable
Enable High Threshold
Enable Low Threshold
Enable Threshold Hysteresis
Enable Pin Bias Current
Enable Pull-up Voltage
Fault Restart Delay Time
ENIH
ENIL
0.9
0.7
100
1
1.1
0.9
300
V
V
0.8
200
50
ENHYS
mV
µA
V
VEN = 0V or VEN = 2V
Floating
2.0
30
tFR_DLY
ms
Digital Signals
SYNCI High Threshold
SYNCO High
VDR = 5.1V
1/2 VDR
V
V
SYNCOOH
SYNCOOL
PGDILH
VDR - 0.5
VDR
0.5
SYNCO Low
ISYNCO = 1mA
VPGD = VDR
IPGD = 4mA
V
PGD High Leakage
PGD Output Low
10
µA
V
PGDOL
0.4
PGD EAIN Low Rise
PGD EAIN Low Fall
PGD EAIN Threshold Hysteresis
PGD EAIN High
1.41
1.36
1.45
1.41
35
1.48
1.46
V
V
mV
V
1.94
2.04
2.14
[4] See Inductor Pairing section.
[5] Assured to meet performance specification by design, test correlation, characterization, and/or statistical process control.
[6] Output current capability varies with input & output voltage. See rated output current / power curves on page 2.
Cool-Power® ZVS Switching Regulators
Page 13 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-00-LGIZ Performance Characteristics TA = 25°C
98
97
96
95
94
93
92
91
90
0
1
2
3
4
5
6
Output Current (A)
21VIN
48VIN
60VIN
Figure 1 — 24VOUT Efficiency
Figure 4 — 48VIN to 24VOUT, COUT = 8 x 2.2µF Ceramic
5.42A to 2.71A Load Step, 0.1A/µs
98
97
96
95
94
93
92
91
90
0
1
2
3
4
5
6
Output Current (A)
21VIN
48VIN
60VIN
Figure 2 — 21VOUT Efficiency
Figure 5 — 60VIN to 21VOUT, COUT = 8 x 2.2µF Ceramic
5.72A to 2.86A Load Step, 0.1A/µs
98
97
96
95
94
93
92
91
0
1
2
3
4
Output Current (A)
21VIN
48VIN
60VIN
Figure 3 — 36VOUT Efficiency
Figure 6 — 21VIN to 36VOUT, COUT = 8 x 2.2µF Ceramic
3.34A to 1.67A Load Step, 0.1A/µs
Cool-Power® ZVS Switching Regulators
Page 14 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-00-LGIZ Performance Characteristics TA = 25°C (Cont.)
1100
1000
900
800
700
600
500
400
300
200
100
0
0
1
2
3
4
5
6
Output Current (A)
21VIN
48VIN
60VIN
Figure 7 — Switching Frequency vs. Output Current @ 24VOUT
Figure 10 — Start-up with 48VIN to 24VOUT at 5.42A,
Ext CSS = 0µF
1100
1000
900
800
700
600
500
400
300
200
100
0
0
1
2
3
4
5
6
Output Current (A)
21VIN
48VIN
60VIN
Figure 8 — Switching Frequency vs. Output Current @ 21VOUT
Figure 11 — Output voltage ripple at 48VIN to 24VOUT, 5.42A;
COUT = 8 x 2.2µF Ceramic
1100
1000
900
800
700
600
500
400
300
200
100
0
0
0.5
1
1.5
2
2.5
3
3.5
4
Output Current (A)
21VIN
48VIN
60VIN
Figure 9 — Switching Frequency vs. Output Current @ 36VOUT
Cool-Power® ZVS Switching Regulators
Page 15 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-00-LGIZ Efficiency & Power Loss TA = 25°C [7] (Cont.)
4.5
99
98
97
96
95
94
93
92
91
90
4
3.5
3
2.5
2
20
25
30
35
40
45
50
55
60
VIN (V)
Efficiency
Power Dissipation
Figure 12 — 24VOUT Efficiency and Power Dissipation at maximum
current (4.17A) over full input dynamic range
4.5
4
99
98
97
96
95
94
93
92
91
90
3.5
3
2.5
2
20
25
30
35
40
45
50
55
60
VIN (V)
Efficiency
Power Dissipation
Figure 13 — 21VOUT Efficiency and Power Dissipation at maximum
current (4.29A) over full input dynamic range
4.5
4
99
98
97
96
95
94
93
92
91
90
3.5
3
2.5
2
20
25
30
35
40
45
50
55
60
VIN (V)
Efficiency
Power Dissipation
Figure 14 — 36VOUT Efficiency and Power Dissipation at maximum
current (3.34A) over full input dynamic range
[7] Note: Testing was performed using a 3in. x 3in., four 2oz. copper layers, FR4 evaluation board platform.
Cool-Power® ZVS Switching Regulators
Page 16 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-01-LGIZ Performance Characteristics TA = 25°C
98
96
94
92
90
88
86
0
1
2
3
4
Output Current (A)
21VIN
48VIN
60VIN
Figure 15 — 48VOUT Efficiency
Figure 18 — 48VIN to 48VOUT, COUT = 8 x 2.2µF Ceramic
3.13A to 1.57A Load Step, 0.1A/µs
98
97
96
95
94
93
92
91
0
1
2
3
4
5
Output Current (A)
21VIN
48VIN
60VIN
Figure 16 — 36VOUT Efficiency
Figure 19 — 60VIN to 36VOUT, COUT = 8 x 2.2µF Ceramic
4.17A to 2.09A Load Step, 0.1A/µs
98
96
94
92
90
88
86
84
0
1
2
3
Output Current (A)
21VIN
48VIN
60VIN
Figure 17 — 54VOUT Efficiency
Figure 20 — 21VIN to 54VOUT, COUT = 8 x 2.2µF Ceramic
1.86A to 0.93A Load Step, 0.1A/µs
Cool-Power® ZVS Switching Regulators
Page 17 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-01-LGIZ Performance Characteristics TA = 25°C (Cont.)
1100
1000
900
800
700
600
500
400
300
200
100
0
0
0.5
1
1.5
2
2.5
3
3.5
4
Output Current (A)
21VIN
48VIN
60VIN
Figure 21 — Switching Frequency vs. Output Current @ 48VOUT
Figure 24 — Start-up with 48VIN to 48VOUT at 3.13A, Ext CSS = 0µF
1100
1000
900
800
700
600
500
400
300
200
100
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Output Current (A)
21VIN
48VIN
60VIN
Figure 22 — Switching Frequency vs. Output Current @ 36VOUT
Figure 25 — Output voltage ripple at 48VIN to 48VOUT
,
3.13A; COUT = 8 x 2.2µF Ceramic
1100
1000
900
800
700
600
500
400
300
200
100
0
0
1
1.5
2
2.5
3
0.5
Output Current (A)
21VIN
48VIN
60VIN
Figure 23 — Switching Frequency vs. Output Current @ 54VOUT
Cool-Power® ZVS Switching Regulators
Page 18 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-01-LGIZ Efficiency & Power Loss TA = 25°C [7] (Cont.)
99
98
97
96
95
94
93
92
91
90
5
4.5
4
3.5
3
2.5
2
20
25
30
35
40
45
50
55
60
VIN (V)
Efficiency
Power Dissipation
Figure 26 — 48VOUT Efficiency and Power Dissipation at maximum
current (2.09A) over full input dynamic range
99
98
4
3.8
3.6
3.4
3.2
3
97
96
95
94
93
92
2.8
2.6
2.4
2.2
2
91
90
20
25
30
35
40
45
50
55
60
VIN (V)
Efficiency
Power Dissipation
Figure 27 — 36VOUT Efficiency and Power Dissipation at maximum
current (2.78A) over full input dynamic range
99
98
97
96
95
94
93
92
91
90
5.5
5
4.5
4
3.5
3
2.5
20
25
30
35
40
45
50
55
60
VIN (V)
Efficiency
Power Dissipation
Figure 28 — 54VOUT Efficiency and Power Dissipation at maximum
current (1.86A) over full input dynamic range
[7] Note: Testing was performed using a 3in. x 3in., four 2oz. copper layers, FR4 evaluation board platform.
Cool-Power® ZVS Switching Regulators
Page 19 of 39
Rev 1.8
02/2018
PI3741-0x
MTBF
1000
100
10
1
-60
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
MTBF Calculations Over Temperature Using Telcordia SR-332
Figure 29 — PI3741-0x calculated MTBF Telcordia SR-332 GB
Cool-Power® ZVS Switching Regulators
Page 20 of 39
Rev 1.8
02/2018
PI3741-0x
47nF soft-start capacitor to set the start-up ramp period greater
than tSS. The PI3741-0x internal reference and regulated output
Functional Description
The PI3741-0x is a family of highly integrated ZVS Buck-Boost
regulators. The PI3741-0x has an adjustable output voltage that
is set with a resistive divider. Performance and maximum output
current are characterized with a specific external power inductor
as defined in the electrical specifications, and in the inductor
pairing section.
will proportionally follow the TRK ramp when it is below 1.7VDC
When the ramp is greater than 1.7VDC, the internal reference will
remain at 1.7VDC while the TRK ramp rises and clamps at 2.5VDC
If the TRK pin goes below the disable threshold, the regulator will
finish the current switching cycle and then stop switching.
.
.
Remote Sensing Differential Amplifier
A general purpose operational amplifier is provided to assist with
differential remote sensing and/or level shifting of the output
voltage. The VDIFF pin can be connected to the transconductance
error amplifier input EAIN pin, or with proper configuration can
also be connected to the EAO pin to drive the modulator directly.
If unused, connect in unity gain with VSP connected to SGND.
L1
VIN
VIN
VS1
VS2
VOUT
VOUT
CIN
COUT
PGND
ISP
PGND
ISN
VDR
IMON
10kΩ
Power Good
PI3741
VSN
VSP
PGD
EN
R1
R2
The PI3741-0x PGD pin functions as a power good indicator and
pulls low when the regulator is not operating or if EAIN is less
than 1.4V.
SYNCO
VDIFF
EAIN
SYNCI
TRK
EAO
COMP
SGND
Output Current Limit Protection
CCOMP
4700pF
PI3741-0x has three methods implemented to protect from output
short circuit or over current condition.
Figure 30 — ZVS Buck-Boost with required components
Slow Current Limit protection: prevents the regulator load
from sourcing current higher than the maximum rated regulator
current. If the output current exceeds the VOUT Slow Current Limit
(VOUT_SCL) a slow current limit fault is initiated and the regulator
is shutdown, which eliminates output current flow. After the
Fault Restart Delay (tFR_DLY), a soft-start cycle is initiated. This
restart cycle will be repeated indefinitely until the excessive
load is removed.
For basic operation, Figure 30 shows the minimum connections
and components required.
Enable
The EN pin of the regulator is referenced to SGND and permits the
user to turn the regulator on or off. The EN polarity is a positive
logic assertion. If the EN pin is left floating or asserted high, the
regulator output is enabled. Pulling the EN pin below 0.8VDC with
respect to SGND will discharge the SS/TRK pin until the output
reaches zero or the EN pin is released. When the converter is
disabled via the EN pin or due to a fault mode, the internal gate
driver high side charge pumps are enabled as long as there is
enough input voltage for the internal VDR supply voltage to be
available. The return path for this charge pump supply is through
the output. If the output load is disconnected or high impedance,
the output capacitors will float up to about 3.4V maximum,
sourced by 960µA of leakage current. This pre-biased condition
poses no issue for the converter. The 960µA leakage current
may be safely bypassed to SGND. A simple application circuit is
available to bypass this current in a non-dissipative manner. Please
contact Applications Engineering for details.
Fast Current Limit protection: monitors the external inductor
current pulse-by-pulse to prevent the output from supplying
saturation current. If the regulator senses a high inductor
current pulse, it will initiate a fault and stop switching. After
the Fault Restart Delay (tFR_DLY), a soft-start cycle is initiated.
This restart cycle will be repeated indefinitely until the excessive
load is removed.
Overload Timeout protection: If the regulator is providing
greater than the maximum output power for longer than the
Overload Timeout delay (TOL), it will initiate a fault and stop
switching. After Fault Restart Delay (tFR_DLY), a soft-start cycle is
initiated. This restart cycle will be repeated indefinitely until the
overload load is removed.
Input Undervoltage Lockout
If VIN falls below the input Undervoltage Lockout (UVLO)
threshold, the PI3741-0x will complete the current cycle and
stop switching. The system will restart once the input voltage is
reestablished and after the Fault Restart Delay.
Switching Frequency Synchronization
The SYNCI input allows the user to synchronize the controller
switching frequency to the falling edge of an external clock
referenced to SGND. The external clock can synchronize the unit
between 50% and 110% of the preset switching frequency (FSW).
The SYNCI pin should be connected to SGND when not in use,
and should never be left floating.
Input Overvoltage Lockout
If VIN rises above the input Overvoltage Lockout (OVLO) threshold,
the PI3741-0x will complete the current cycle and stop switching.
The system will restart once the input voltage is reestablished and
after the Fault Restart Delay.
Soft-Start and Tracking
The PI3741-0x provides a soft start and tracking feature using
the TRK pin. Programmable Soft Start requires an external
capacitor from the TRK pin to SGND in addition to the internal
Cool-Power® ZVS Switching Regulators
Page 21 of 39
Rev 1.8
02/2018
PI3741-0x
Output Overvoltage Protection
The PI3741-0x family is equipped with two methods of detecting
an output over voltage condition. To prevent damage to input
voltage sensitive devices, if the output voltage exceeds 20% of its
set regulated value as measured by the EAIN pin (VEAIN_OV), the
regulator will complete the current cycle, stop switching and issue
an OVP fault. Also if the output voltage of the regulator exceeds
the VOUT Overvoltage Threshold (VOUT_OVT) then the regulator will
complete the current cycle, stop switching and issue an OVP fault.
The system will resume operation once the output voltage falls
below the OVP threshold and after Fault Restart Delay.
Overtemperature Protection
The internal package temperature is monitored to prevent
internal components from reaching their thermal maximum. If
the Overtemperature Protection threshold is exceeded (TOTP), the
regulator will complete the current switching cycle, enter a low
power mode, set a fault flag, and will soft-start when the internal
temperature decreases by more than the Overtemperature Restart
Hysteresis (TOTP_HYS).
Pulse Skip Mode (PSM)
PI3741-0x features a hysteretic Pulse Skip Mode to achieve high
efficiency at light loads. The regulator is setup to skip pulses if
VEAO falls below the Pulse Skip Threshold (VEAO_PST). Depending
on conditions and component values, this may result in single
pulses or several consecutive pulses followed by skipped pulses.
Skipping cycles significantly reduces gate drive power and
improves light load efficiency. The regulator will leave Pulse Skip
Mode once the control node rises above the Pulse Skip Mode
threshold (VEAO_PST).
Variable Frequency Operation
The PI3741-0x is preprogrammed to a fixed, maximum, base
operating frequency. The frequency is selected with respect to
the required power stage inductor to operate at peak efficiency
across line and load variations. The switching frequency period
will stretch as needed during each cycle to accommodate low
line and or high load conditions. By stretching the switching
frequency period, thus decreasing the switching frequency, the
ZVS operation is preserved throughout the input line voltage
range maintaining optimum efficiency.
IMON Amplifier
The PI3741-0x provides a differential amplifier with a level
shifted, SGND referenced output, the IMON Pin, which is useful
for sensing input or output current on high voltage rails. A fixed
gain of 20:1 is provided over a large common mode range.
When using the amplifier, the ISN pin must be referenced to the
common mode voltage of the ISP pin for proper operation. See
Absolute Maximum Ratings for more information. If not in use,
the ISN and ISP pins should be connected to SGND and the IMON
pin left floating.
Cool-Power® ZVS Switching Regulators
Page 22 of 39
Rev 1.8
02/2018
PI3741-0x
For Direct Tracking, choose the regulator with the highest output
voltage as the master and connect the master to the TRK pin of
the other regulators through a divider (Figure 32) with the same
ratio as the slave’s feedback divider (see Output Voltage Trim).
The TRK pin should not be driven without 1k minimum
series resistance.
Application Description
Output Voltage Trim
The output voltage can be adjusted by feeding back a portion
of the desired output through a voltage divider to the error
amplifier’s input (see Figure 30). Equation 1 can be used to
determine resistor values needed for the voltage divider.
Master VOUT
VOUT
(1)
R1 = R2 •
-1
1.7
R1
PI3741
The R2 value is selected by the user; a 1.07kΩ resistor value
is recommended.
TRK
Slave
R2
If, for example, a 24V output is needed, the user can select a
1.07kΩ (1%) resistor for R2 and use Equation (1) to calculate R1.
Once R1 value is calculated, the user should select the nearest
resistor value available. In this example, R1 is 14.03kΩ so a
14.0kΩ should be selected.
SGND
Figure 32 — Voltage divider connections for direct tracking
Soft-Start Adjustment and Tracking
The TRK pin offers a means to increase the regulator’s soft-start
time or to track with additional regulators. The soft-start slope
is controlled by an internal 47nF and a fixed charge current to
provide a minimum startup time of 1.6ms (typical). By adding
an external capacitor to the TRK pin, the soft-start time can be
increased further. The following equation can be used to calculate
the proper capacitor for a desired soft-start times:
All connected regulators’ soft-start slopes will track with this
method. Direct tracking timing is demonstrated in Figure 31
(b). All tracking regulators should have their Enable (EN) pins
connected together for proper operation.
Inductor Pairing
Operations and characterization of the PI3741-0x was performed
using a 900nH inductor, Part # HCV1206-R90-R, manufactured
by Eaton. This Inductor has a form factor of 12.5mm x 10mm
x 5mm. No other inductor is recommended for use with the
PI3741-0x. For additional inductor information and sourcing,
please contact Eaton directly.
(tTRK • ISS )
-9
(2)
CTRK
=
– 47 • 10
1.7
Where, tTRK is the desired soft-start time and ISS is the TRK pin
source current (see Electrical Characteristics for limits).
The PI3741-0x allows the tracking of multiple like regulators.
Two methods of tracking can be chosen: proportional or direct
tracking. Proportional tracking will force all connected regulators
to startup and reach regulation at the same time (see Figure
31 (a)). To implement proportional tracking, simply connect all
devices TRK pins together.
VOUT
1
Proporꢀonal
Tracking
V
OUT 2
(a)
Master VOUT
Direct
Tracking
VOUT
2
(b)
t
Figure 31 — PI3741-0x tracking methods
Cool-Power® ZVS Switching Regulators
Page 23 of 39
Rev 1.8
02/2018
PI3741-0x
Input Filter case 2; Inductive source and local, external input
Filter Considerations
decoupling capacitance with significant RCIN_EXT ESR
(i.e.: electrolytic type)
The PI3741-0x requires low impedance ceramic input capacitors
(X7R/X5R or equivalent) to ensure proper start up and high
frequency decoupling for the power stage. The PI3741-0x
will draw nearly all of the high frequency current from the
low impedance ceramic capacitors when the main high side
MOSFET(s) are conducting. During the time the MOSFET(s) are
off, the input capacitors are replenished from the source. Table 1
shows the recommended input and output capacitors to be used
for the PI3741-0x. Divide the total RMS current by the number
of ceramic capacitors used to calculate the individual capacitor’s
RMS current. Table 2 includes the recommended input and output
ceramic capacitor. It is very important to verify that the voltage
supply source as well as the interconnecting line are stable and
do not oscillate.
In order to simplify the analysis in this case, the voltage source
impedance can be modeled as a simple inductor Lline. Notice
that the high performance ceramic capacitors CIN_INT within
the PI3741-0x should be included in the external electrolytic
capacitance value for this purpose. The stability criteria will be:
(5)
rEQ_IN > RC
IN_EXT
Lline
CIN_INT • RC
(6)
< rEQ_IN
IN_EXT
Input Filter case 1; Inductive source and local, external, input
decoupling capacitance with negligible ESR (i.e.: ceramic type)
Equation (6) shows that if the aggregate ESR is too small – for
example by using very high quality input capacitors (CIN_EXT) – the
system will be under-damped and may even become destabilized.
Again, an octave of design margin in satisfying Equation (5)
should be considered the minimum.
The voltage source impedance can be modeled as a series Rline
Lline circuit. The high performance ceramic decoupling capacitors
will not significantly damp the network because of their low ESR;
therefore in order to guarantee stability the following conditions
must be verified:
Note: When applying an electrolytic capacitor for input filter
damping the ESR value must be chosen to avoid loss of
converter efficiency and excessive power dissipation in the
Lline
(3)
Rline
>
CIN_INT + CIN_EXT • rEQ_IN
electrolytic capacitor.
(4)
Rline << rEQ_IN
Where rEQ_IN can be calculated by dividing the lowest line voltage
by the full load input current. It is critical that the line source
impedance be at least an octave lower than the converter’s
dynamic input resistance, Equation (4). However, Rline cannot
be made arbitrarily low otherwise Equation (3) is violated
and the system will show instability, due to under-damped
RLC input network.
CINPUT
COUTPUT
(see Table 2)
(see Table 2)
5 X 2.2µF
8 X 2.2µF
Table 1 — Recommended input and output capacitance
Part Number
Description
2.2µF Capacitor, X7R 20% 100V, 1210
MFG Description
GRM32ER72A225KA35
Murata
Table 2 — Capacitor manufacturer part numbers
Cool-Power® ZVS Switching Regulators
Page 24 of 39
Rev 1.8
02/2018
PI3741-0x
CINPUT Ripple
COUTPUT Ripple
Output Ripple
(mVpp)
Input Ripple
(mVpp)
Part Number
VOUT (V)
VIN (V)
IOUT(A)
Current (IRMS
3.80
3.91
3.67
4.31
3.86
3.68
3.83
3.76
3.60
4.36
3.56
3.50
5.22
3.46
3.43
3.76
4.46
4.32
4.05
4.35
4.25
4.28
4.18
4.12
4.50
4.03
4.00
)
Current (IRMS
3.60
4.41
4.65
4.19
4.26
4.55
3.95
4.06
4.39
4.39
3.87
4.28
4.82
3.76
4.15
3.86
4.90
5.24
3.98
4.76
5.10
3.94
4.43
4.75
3.92
4.15
4.50
)
21
21
21
24
24
24
28
28
28
32
32
32
36
36
36
36
36
36
40
40
40
48
48
48
54
54
54
21
48
60
21
48
60
21
48
60
21
48
60
21
48
60
21
48
60
21
48
60
21
48
60
21
48
60
4.29
5.72
5.72
4.17
5.42
5.42
3.58
5.00
5.00
3.29
4.38
4.38
3.34
3.89
3.89
2.78
4.17
4.17
2.5
212
202
184
238
190
193
279
210
240
308
255
264
345
280
279
197
293
294
215
308
302
294
319
320
289
340
336
298
562
558
315
512
583
340
501
621
378
509
590
423
507
588
263
532
602
344
534
591
334
520
576
331
528
578
PI3741-00-LGIZ
3.75
3.75
2.09
3.13
3.13
1.86
2.78
2.78
PI3741-01-LGIZ
Table 3 — Typical input and output ripple current/voltage with the recommended input and output capacitor
recommended in Tables 1 and 2.
Cool-Power® ZVS Switching Regulators
Page 25 of 39
Rev 1.8
02/2018
PI3741-0x
Thermal Design
Figure 33 (a) shows a thermal impedance model that can predict the maximum temperature of the highest temperature component for
a given operating condition. This model assumes that all customer PCB connections are at one temperature, which is PCB equivalent
Temperature TPCB °C. The model can be simplified as shown in Figure 33 (b).
Maximum Internal Temperature
T
INT ( oC )
Thermal Resistance
Thermal Resistance
PCB Pads
θINT-VIN
oC / W
θINT-VS1
oC / W
θINT-PGND
oC / W
θINT-VS2
oC / W
θINT-VOUT
oC / W
θINT-SGND
oC / W
Top Case
θINT-TOP oC / W
SiP Power Dissipaꢀon
PD ( W )
Top Case
Temperature
TTOP oC
TVS1
oC
TVS2
oC
TSGND
oC
TVIN
oC
TPGND
oC
TVOUT
oC
PCB Pads
Temperature
TTOP oC
(a)
Maximum Internal Temperature
TINT ( oC )
Thermal Resistance
PCB_equivalent
θINT-PCB oC / W
Thermal Resistance
Top Case
θINT-TOP oC / W
SiP Power Dissipaꢀon
PD ( W )
Top Case
Temperature
TTOP oC
PCB equivalent
Temperature
TPCB oC
(b)
Figure 33 — PI3741-0x SiP Thermal Model (a) and its simplified version (b).
Cool-Power® ZVS Switching Regulators
Page 26 of 39
Rev 1.8
02/2018
PI3741-0x
Where the symbol in Figure 33 is defined as the following:
is defined as the thermal impedance from the hottest component junction inside the SiP to the top side
of the package.
θINT-TOP
θINT-PCB
θINT-VIN
is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is
mounted on, assuming all customer PCB connections at one temperature.
is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is
mounted on at the VIN pad.
is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is
mounted on at the VS1 pad.
θINT-VS1
is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is
mounted on at the PGND pad.
θINT-PGND
θINT-VS2
θINT-VOUT
θINT-SGND
is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is
mounted on at the VS2 pad.
is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is
mounted on at the VOUT pad.
is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is
mounted on at the SGND pad.
The following equation can predict the junction temperature based on the heat load applied to the SiP and the known ambient conditions
with the simplified thermal circuit model:
TTOP
TPCB
θINT-PCB
1
PD +
+
θINT-TOP
(7)
TINT
=
1
+
θINT-TOP
θINT-PCB
Thermal Impedance with
the simplified version
Thermal Impedance
Device
θINT-TOP
θINT-VIN
θINT-VS1
θINT-PGND
θINT-VS2
θINT-VOUT
θINT-SGND
θINT-TOP
θINT-PCB
(°C / W)
(°C / W)
(°C / W)
(°C / W)
(°C / W)
(°C / W)
(°C / W)
175.77
188.69
(°C / W)
(°C / W)
PI3741-00-LGIZ
PI3741-01-LGIZ
62.46
65.54
4.95
5.12
12.07
19.71
23.94
24.58
27.45
11.23
6.57
8.76
62.46
65.54
1.92
2.02
Table 4 — PI3741-0x SiP Thermal Impedance
Cool-Power® ZVS Switching Regulators
Page 27 of 39
Rev 1.8
02/2018
PI3741-0x
Figure 34 (a) shows a thermal impedance model that can predict the maximum hot spot temperature of the inductor for a given operating
condition. This model assumes that all customer PCB connections are at one temperature, which is PCB equivalent Temperature TPCB ºC.
If the inductor top and bottom are not mounted to a heat sink, the simplified model is parallel combination of all resistances that connect to
the PCB. The model can be simplified as shown in Figure 34 (b).
Maximum Internal Temperature
T
INT ( oC )
Thermal Resistance
Thermal Resistances
Inductor PCB Pads
Thermal Resistance
Inductor Case Top
θINT-TOP oC / W
θINT-LEAD2
oC / W
θINT-TAB
oC / W
θINT-LEAD1
oC / W
Inductor Case
Boꢀom
θINT-BOT oC / W
Inductor Case
Boꢀom
Inductor Case Top
Temperature
TTOP oC
Inductor PCB Pad
Temperatures
Temperature
TPCB-LEAD2 oC
TPCB-LEAD1 oC
TPCB-TAB oC
TBOT oC
(a)
Maximum Internal Temperature
INT ( oC )
T
Thermal Resistance
Thermal Resistance
Inductor Case Top
θINT-TOP oC / W
Thermal Resistance
PCB_equivalent
θINT-PCB oC / W
Inductor Case
Boꢀom
θINT-BOT oC / W
Inductor Case
Boꢀom
Inductor Case Top
Temperature
TTOP oC
PCB equivalent
Temperature
TPCB oC
Temperature
TBOT oC
(b)
Figure 34 — PI3741-0x Inductor Thermal Impedance Model
Where the symbol in Figure 34 is defined as the following:
θINT-TOP is defined as the thermal impedance from the hot spot to the top surface of the core.
is defined as the thermal impedance from the hot spot to the circuit board it is mounted on,
assuming all customer PCB connections are at one temperature.
θINT-PCB
θINT-BOT
is defined as the thermal impedance from the hot spot to the bottom surface of the core.
θINT-TAB
is defined as the thermal impedance from the hot spot to the metal mounting tab on the core body.
is defined as the thermal impedance from the hot spot to one of the mounting leads.
Since the leads are the same thermal impedance, there is no need to specify by explicit pin number
θINT-LEAD1
θINT-LEAD2
is defined as the thermal impedance from the hot spot to the other mounting lead
Cool-Power® ZVS Switching Regulators
Page 28 of 39
Rev 1.8
02/2018
PI3741-0x
The following equation can predict the junction temperature based on the heat load applied to the inductor and the known ambient
conditions with the simplified thermal circuit model:
TTOP
TPCB
θINT-PCB
1
PD +
+
θINT-TOP
(8)
THOT SPOT
=
1
+
θINT-TOP
θINT-PCB
Thermal Impedance with the
simplified version
Thermal Impedance
Device
θINT-TOP
(°C / W)
θINT-BOT
θINT-TAB
θINT-LEAD1
θINT-LEAD2
(°C / W)
θINT-TOP
(°C / W)
θINT-BOT
(°C / W)
θINT-PCB
(°C / W)
(°C / W)
(°C / W)
(°C / W)
Inductor used with PI3741-00-LGIZ
Inductor used with PI3741-01-LGIZ
16.48
16.09
21.03
21.18
248.8
245.4
42.92
42.92
43.16
16.48
16.09
21.03
21.18
19.75
43.16
19.84
Table 5 — PI3741-0x Inductor Thermal Impedance
An estimation of SiP power loss to total loss percentage is shown in the following charts.
Cool-Power® ZVS Switching Regulators
Page 29 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-00-LGIZ Percentage of SiP Loss to Total Loss
100
95
90
85
80
75
100
95
90
85
80
75
70
65
60
70
65
20
30
40
50
60
20
30
40
50
60
VIN (V)
VIN (V)
IOUT = 5% – 30% of FL
IOUT = 5% – 30% of FL
IOUT < 5% of FL
IOUT < 5% of FL
IOUT > 30% of FL
IOUT > 30% of FL
Figure 35 — VOUT = 21V
Figure 38 — VOUT = 32V
100
95
90
85
80
75
100
95
90
85
80
75
70
65
70
65
20
60
20
30
40
50
60
30
40
50
60
VIN (V)
VIN (V)
IOUT = 5% – 30% of FL
IOUT > 30% of FL
IOUT = 5% – 30% of FL
OUT > 30% of FL
IOUT < 5% of FL
IOUT < 5% of FL
I
Figure 36 — VOUT = 24V
Figure 39 — VOUT = 36V
100
95
90
85
80
75
70
65
20
30
40
50
60
VIN (V)
IOUT = 5% – 30% of FL
IOUT > 30% of FL
IOUT < 5% of FL
Figure 37 — VOUT = 28V
Cool-Power® ZVS Switching Regulators
Page 30 of 39
Rev 1.8
02/2018
PI3741-0x
PI3741-01-LGIZ Percentage of SiP Loss to Total Loss
100
95
100
95
90
85
80
75
70
65
60
90
85
80
75
70
65
60
20
30
40
50
60
20
30
40
50
60
VIN (V)
VIN (V)
IOUT = 5% – 30% of FL
IOUT < 5% of FL
IOUT = 5% – 30% of FL
IOUT < 5% of FL
IOUT > 30% of FL
IOUT > 30% of FL
Figure 40 — VOUT = 36V
Figure 43 — VOUT = 48V
100
95
90
85
80
75
70
65
60
100
95
90
85
80
75
70
65
60
20
30
40
50
60
20
30
40
50
60
VIN (V)
VIN (V)
IOUT = 5% – 30% of FL
IOUT > 30% of FL
IOUT = 5% – 30% of FL
IOUT < 5% of FL
IOUT < 5% of FL
I
OUT > 30% of FL
Figure 41 — VOUT = 40V
Figure 44 — VOUT = 50V
100
95
90
85
80
75
70
65
60
100
95
90
85
80
75
70
65
60
20
30
40
50
60
20
30
40
50
60
VIN (V)
VIN (V)
IOUT = 5% – 30% of FL
IOUT = 5% – 30% of FL
IOUT < 5% of FL
IOUT < 5% of FL
IOUT > 30% of FL
IOUT > 30% of FL
Figure 42 — VOUT = 44V
Figure 45 — VOUT = 54V
Cool-Power® ZVS Switching Regulators
Page 31 of 39
Rev 1.8
02/2018
PI3741-0x
Evaluation Board Thermal De-rating
Thermal de-rating curves are provided that are based on
component temperature changes versus load current, input
voltage and no air flow. It is recommended to use these curves as
a guideline for proper thermal de-rating. These curves represent
the entire system and are inclusive to both the Vicor SiP and
the external inductor. Maximum thermal operation is limited
by either the MOSFETs or inductor depending upon line and
load conditions.
4
3
2
1
0
All thermal testing was performed using a 3in. x 3in., four
2oz. copper layers, FR4 evaluation board platform. Thermal
measurements were made on the four internal MOSFETS and the
external inductor.
25
35
45
55
65
75
85
95
105 115
Ambient Temperature (°C)
21VIN
48VIN / 60VIN
6
5
4
3
2
1
0
Figure 48 — Thermal de-rating for PI3741-00 evaluation board
at VOUT = 36V, 0LFM
25
35
45
55
65
75
85
95
105 115
Ambient Temperature (°C)
21VIN
48VIN
60VIN
Figure 46 — Thermal de-rating for PI3741-00 evaluation board
at VOUT = 21V, 0LFM
6
5
4
3
2
1
0
25
35
45
55
65
75
85
95
105 115
Ambient Temperature (°C)
21VIN
48VIN
60VIN
Figure 47 — Thermal de-rating PI3741-00 evaluation board
at VOUT = 24V, 0LFM
Cool-Power® ZVS Switching Regulators
Page 32 of 39
Rev 1.8
02/2018
PI3741-0x
Evaluation Board Thermal De-rating (Cont.)
5
4
3
2
1
0
3
2
1
0
25
35
45
55
65
75
85
95
105 115
25
35
45
55
65
75
85
95
105 115
Ambient Temperature (°C)
Ambient Temperature (°C)
21VIN
48VIN
60VIN
21VIN
48VIN
60VIN
Figure 49 — Thermal de-rating for PI3741-01 evaluation board
Figure 51 — Thermal de-rating for PI3741-01 evaluation board
at VOUT = 36V, 0LFM
at VOUT = 54V, 0LFM
4
3
2
1
0
25
35
45
55
65
75
85
95
105 115
Ambient Temperature (°C)
21VIN
48VIN
60VIN
Figure 50 — Thermal de-rating PI3741-01 evaluation board
at VOUT = 48V, 0LFM
Cool-Power® ZVS Switching Regulators
Page 33 of 39
Rev 1.8
02/2018
PI3741-0x
Parallel Operation
Synchronization
PI3741-0x can be connected in parallel to increase the output
capability of a single output rail. When connecting modules
in parallel, each EAO, TRK and EN pin should be connected
together. Current sharing will occur automatically in this manner
so long as each inductor is the same value. EAIN pins should
remain separated, each with an REA1 and REA2, to reject
noise differences between different modules’ SGND pins. Up
to three modules may be connected in parallel. The modules
current sharing accuracy is determined by the inductor tolerance
( 10%) and to a lesser extent, timing variation ( 1.5%). Current
sharing may be considered independent of synchronization
and/or interleaving. Modules do not have to be interleaved
or synchronized to share current. The following equation
determines the output capability of N modules (up to three)
to be determined:
PI3741-0x units may be synchronized to an external clock by
driving the SYNCI pin. The synchronization frequency must not
be higher than the programmed maximum value FSW. This is the
switching frequency during DCM of operation. The minimum
synchronization frequency is FSW /2. In order to ensure proper
power delivery during synchronization, the user should refer
to the switching frequency vs. output current curves for the
load current, output voltage and input voltage operating point.
The synchronization frequency should not be lower than that
determined by the curve or reduced output power will result.
The power reduction is approximately the ratio between required
frequency and synchronizing frequency. If the required frequency
is 1MHz and the sync frequency is 600kHz, the user should
expect a 40% reduction in output capability.
Interleaving
Iarray = Imod + I • (N – 1) • 0.77
(9)
(
)
mod
Interleaving is primarily done to reduce output ripple and the
required number of output capacitors by introducing phase
current cancellation. The PI3741-0x has a fixed delay that is
proportional to the maximum value of FSW shown in the data
sheet. When connecting two units as showin in Figure 52, they
will operate at 180 degrees out of phase when the converters
switching frequency is equal to FSW. If the converter enters CrCM
and the switching frequency is lower than FSW, the phase delay
will no longer be 180 degrees and ripple cancellation will begin
to decay. Interleaving when the switching frequency is reduced
to lower than 80% of the programmed maximum value is
not recommended.
Where:
Iarray is the maximum output current of the array
Imod is the maximum output per module
N
is the number of modules
L1
VOUT
PGND
VS1
VS2
VIN
CIN_1
COUT_1
REA1_1
REA2_1
PGND
ISP
ISN
VDR
IMON
VSN
PI3741-0x
VSP
PGD
EN
VDIFF
LGH
EN
SYNCO
SYNCI
TRK
EAIN
EAO
COMP
CHF_1
2.5kΩ
TRK
SGND
CCOMP_1
CTRK_1
L2
VOUT
PGND
VS1
VS2
VIN
CIN_2
COUT_2
REA1_2
REA2_2
PGND
ISP
ISN
VDR
IMON
VSN
PI3741-0x
VSP
PGD
EN
VDIFF
LGH
EN
SYNCO
SYNCI
TRK
EAIN
EAO
COMP
CHF_2
SGND
TRK
CCOMP_2
CTRK_2
Figure 52 — PI3741-0x parallel operation
Cool-Power® ZVS Switching Regulators
Page 34 of 39
Rev 1.8
02/2018
PI3741-0x
VDR Bias Regulator
System Design Considerations
The VDR internal bias regulator is a ZVS switching regulator that
resides internal to the PI3741-0x. It is intended strictly for use
to power the internal controller and driver circuitry. The power
capability of this regulator is sized only for the PI3741-0x, with
adequate reserve for the application it was intended for. It may be
used for as a pull-up source for open collector applications and
for other very low power use with the following restrictions:
Inductive Loads
As with all power electronic applications, consideration must be
given to driving inductive loads that may be exposed to a fault
in the system which could result in consequences beyond the
scope of the power supply primary protection mechanisms. An
inductive load could be a filter, fan motor or even excessively
long cables. Consider an instantaneous short circuit through an
un-damped inductance that occurs when the output capacitors
are already at an initial condition of fully charged. The only thing
that limits the current is the inductance of the short circuit and
any series resistance. Even if the power supply is off at the time
of the short circuit, the current could ramp up in the external
inductor and store considerable energy. The release of this
energy will result in considerable ringing, with the possibility of
ringing nodes connected to the output voltage below ground.
The system designer should plan for this by considering the use
of other external circuit protection such as load switches, fuses,
and transient voltage protectors. The inductive filters should
be critically damped to avoid excessive ringing or damaging
voltages. Adding a high current Schottky diode from the output
voltage to PGND close to the PI741-0x is recommended for
these applications.
ꢀnNo direct connection is allowed. Any noise source that can
disturb the VDR voltage can also affect the internal controller
operation.
ꢀnAll loads must be locally de-coupled using a 0.1µF ceramic
capacitor. This capacitor must be connected to the VDR output
through a series resistor no smaller than 1kΩ which forms a
loss pass filter and limits the total current to 5mA.
Low Voltage Operation
There is no isolation from an SELV (Safety-Extra-Low-Voltage)
power system. Powering low voltage loads from input voltages
as high as 60V may require additional consideration to protect
low voltage circuits from excessive voltage in the event of a
short circuit from input to output. A fast TVS (transient voltage
suppressor) gating an external load switch is an example of
such protection.
Cool-Power® ZVS Switching Regulators
Page 35 of 39
Rev 1.8
02/2018
PI3741-0x
Package Drawings
DETAIL A
(SECTION VIEW)
E
PIN 1 INDEX
M
M
ddd
eee
C
C
A B
D
b
SEE NOTE 2
L
PAD OPENING (b)
b
SEE NOTE 2
aaa
C
(4)PL
TOP VIEW
M
M
ddd
eee
C
C
A B
DETAIL B
BB 10x14mm SiP
DIMENSIONAL REFERENCES
REF.
A
A1
A2
b
MIN.
2.49
--
--
0.50
NOM.
2.56
--
--
0.55
MAX.
2.63
0.04
2.59
0.60
DETAIL A
E1
e SEE NOTE 1
D
E
D1
E1
e
14.00 BSC
10.00 BSC
13.00 BSC
9.00 BSC
1.00 BSC
0.225
e
SEE NOTE 1
14
13
12
11
10
9
L
.175
.275
BB 10x14mm SiP
DIMENSIONAL REFERENCES
TOLERANCE OF FORM AND
POSITION
REF.
aaa
bbb
ccc
ddd
eee
0.10
0.10
0.08
0.10
0.08
8
D1
7
6
5
NOTES:
1. 'e' REPRESENTS THE BASIC TERMINAL PITCH.
SPECIFIES THE TRUE GEOMETRIC POSITION OF THE TERMINAL AXIS.
4
2. DIMENSION 'b' APPLIES TO METALLIZED TERMINAL AND IS MEASURED
BETWEEN 0.00mm AND 0.25mm FROM TERMINAL TIP.
3
2
3. DIMENSION 'A' INCLUDES PACKAGE WARPAGE
1
4. EXPOSED METALLIZED PADS ARE Cu PADS WITH SURFACE FINISH
PROTECTION.
DETAIL B
A
B
C
D
E
F
G
H
J
K
PIN 1 INDEX
5. RoHS COMPLIANT PER CST-0001 LATEST REVISION.
6. ALL DIMENSIONS ARE IN MM UNLESS OTHERWISE SPECIFIED.
BOTTOM VIEW
bbb
C
A2
A
SEE NOTE 3
ccc
C
SEATING PLANE
A1
b
C
Cool-Power® ZVS Switching Regulators
Page 36 of 39
Rev 1.8
02/2018
PI3741-0x
Receiving PCB Pattern Design Recommendations
E1
PIN 1
e
e
D1
b
b
PCB LAND PATTERN
BB 10x14mm SiP
DIMENSIONAL REFERENCES
REF.
b
MIN.
0.50
NOM.
0.55
MAX.
0.60
D1
E1
e
13.00 BSC
9.00 BSC
1.00 BSC
Recommended receiving footprint for PI3741-0x 10mm x 14mm package. All pads should have a final copper size of 0.55mm x 0.55mm,
whether they are solder-mask defined or copper defined, on a 1mm x 1mm grid. All stencil openings are 0.45mm when using either a 5mil
or 6mil stencil.
Cool-Power® ZVS Switching Regulators
Page 37 of 39
Rev 1.8
02/2018
PI3741-0x
Revision History
Revision
Date
Description
Page Number(s)
1.0
1.1
08/29/16
08/31/16
Initial Release
n/a
Update package drawings
6, 35, 36
Corrections to Typical Application, Figure 30
Update package outline drawings
1, 21
6, 35, 36
1.2
1.3
1.4
1.5
1.6
1.7
1.8
02/08/17
03/10/17
03/31/17
05/31/17
06/14/17
08/24/17
02/22/18
Miscellaneous typo corrections
2, 8, 11
Correct LGH pin name
Include additional PCB Pattern information
6
36
Update Absolute Maximum Ratings
Update IMON Output voltage specification
4
8
Parallel Operation update
33
Updated tables 4 and 5, inductor thermal impedance model
27-28
Updated output specifications
Updated figure descriptions
8, 11
16, 19
Please note: Page added in Rev 1.7.
Cool-Power® ZVS Switching Regulators
Page 38 of 39
Rev 1.8
02/2018
PI3741-0x
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Cool-Power® ZVS Switching Regulators
Page 39 of 39
Rev 1.8
02/2018
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