V048F096M025 [VICOR]
VI Chip - VTM Voltage Transformation Module; VI芯片 - VTM电压转换模块
| 型号： | V048F096M025 |
| 厂家： | 
VICOR CORPORATION |
| 描述： | VI Chip - VTM Voltage Transformation Module |
| 文件： | 总15页 (文件大小：485K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY
VTM
V048K096T025
TM
V•I Chip – VTM
K indicates BGA configuration. For other
mounting options see Part Numbering below.
Voltage Transformation Module
• 48 V to 9.6 V V•I Chip Converter
• 25.0 A (37.5 A for 1 ms)
• High density – 974 W/in3
• Small footprint – 220 W/in2
• Low weight – 0.5 oz (14 g)
• Pick & Place / SMD
• 125°C operation
• 1 µs transient response
• 3.5 million hours MTBF
• Typical efficiency 96%
• No output filtering required
©
Vf = 26 - 55 V
VOUT = 5.20 - 11.0 V
IOUT = 25.0 A
K = 1/5
ROUT = 10.0 mΩ max
• Surface mount BGA or J-Lead
packages
Actual size
Product Description
Absolute Maximum Ratings
Parameter
Values
-1.0 to 60.0
100
Unit
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
A
Notes
The V048K096T025 V•I Chip Voltage Transformation
Module (VTM) excels at speed, density and efficiency to
meet the demands of advanced DSP, FPGA, and ASIC at
the point of load (POL) while providing isolation from
input to output. It achieves a response time of less than
1 µs and delivers up to 25.0 A in a volume of less than
0.25 in3 with unprecedented efficiency. It may be
paralleled to deliver hundreds of amps at an output
voltage settable from 5.20 to 11.0 Vdc.
+In to -In
+In to -In
For 100 ms
PC to -In
-0.3 to 7.0
-0.3 to 19.0
-0.1 to 16.0
2,250
VC to -In
+Out to -Out
Isolation voltage
Output current
Peak output current
Output power
Peak output power
Case temperature
Input to Output
Continuous
For 1 ms
25.0
37.5
A
The VTM V048K096T025’s nominal output voltage is
9.6 Vdc from a 48 Vdc input Factorized Bus, Vf, and is
controllable from 5.20 to 11.0 Vdc at no load, and from
4.95 to 10.8 Vdc at full load, over a Vf input range of
26 to 55 Vdc. It can be operated either open- or closed-
loop depending on the output regulation needs of the
application. Operating open-loop, the output voltage
tracks its Vf input voltage with a transformation ratio,
K = 1/5 , for applications requiring a programmable
output voltage at high current and high efficiency.
Closing the loop back to an input Pre-Regulation Module
(PRM) or DC-DC converter enables tight load regulation.
270
W
Continuous
For 1 ms
405
W
208
°C
During reflow
-40 to 125
-55 to 125
°C
°C
T - Grade
M - Grade
Operating junction temperature(1)
-40 to 150
-65 to 150
°C
°C
T - Grade
M - Grade
Storage temperature
Note:
(1) The referenced junction is defined as the semiconductor having the highest temperature.
This temperature is monitored by a shutdown comparator.
The 9.6 V VTM achieves a power density of 974 W/in3 in
a V•I Chip package compatible with standard pick-and-
place and surface mount assembly processes. The
V•I Chip BGA package supports in-board mounting with
a low profile of 0.16" (4 mm) over the board. A J-lead
package option supports on-board surface mounting
with a profile of only 0.25" (6 mm) over the board. The
VTM’s fast dynamic response and low noise eliminate the
need for bulk capacitance at the load, substantially
increasing the POL density while improving reliability and
decreasing cost.
Part Numbering
V
048
K
096 T
025
Voltage
Transformation
Module
Output Voltage
Designator
(=VOUT x10)
Output Current
Designator
(=IOUT)
Input Voltage
Designator
Configuration Options
Product Grade Temperatures (°C)
Grade
T
M
Storage Operating
-40 to150 -40 to125
-65 to150 -55 to125
F
= On-board (Figure 15)
K = In-board (Figure 14)
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 1 of 15
PRELIMINARY
Electrical Specifications
V•I Chip Voltage Transformation Module
Input Specs (Conditions are at 48 Vin, full load, and 25°C ambient unless otherwise specified)
Parameter
Min
Typ
Max
55
Unit
Vdc
V/µs
Vdc
Vdc
Adc
mA p-p
W
Note
Input voltage range
Input dV/dt
26
48
Operable down to zero V with VC voltage applied
1
Input overvoltage turn-on
Input overvoltage turn-off
Input current
55.0
59.5
5.4
Input reflected ripple current
No load power dissipation
Internal input capacitance
Internal input inductance
140
3.1
4.0
20
Using test circuit in Figure 16; See Figure 1
4.1
µF
nH
Output Specs (Conditions are at 48 Vin, full load, and 25°C ambient unless otherwise specified)
Parameter
Min
5.20
4.95
0
Typ
Max
11.0
10.8
25.0
Unit
Vdc
Vdc
Adc
Note
No load
Output voltage
Full load
Rated DC current
26 - 55 VIN
Max pulse width 1ms, max duty cycle 10%,
baseline power 50%
Module will shut down
See Parallel Operation on Page 10
Peak repetitive current
37.5
A
Short circuit protection set point
Current share accuracy
Efficiency
25.5
30.5
5
35.0
10
Adc
%
Half load
95.5
95.5
96.2
96.2
1.6
%
%
See Figure 3
See Figure 3
Full load
Internal output inductance
Internal output capacitance
Output overvoltage setpoint
Output ripple voltage
No external bypass
10 µF bypass capacitor
Effective switching frequency
Line regulation
nH
µF
55.0
Effective value
11.0
Vdc
Module will shut down
176
17.4
3.1
200
3.4
mV
mV
See Figures 2 and 5
See Figure 6
3.0
MHz
Fixed, 1.6 MHz per phase
K
0.1980
1/5
8.9
0.2020
10.0
VOUT = K•VIN at no load
See Figure 19
Load regulation
ROUT
mΩ
Transient response
Voltage overshoot
Response time
90
200
1
mV
ns
25.0 A load step with 100 µF CIN; See Figures 7 and 8
See Figures 7 and 8
Recovery time
µs
See Figures 7 and 8
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 2 of 15
PRELIMINARY
Electrical Specifications (continued)
Waveforms
Ripple vs. Output Current
180
160
140
120
100
80
60
40
20
0
0
2.5
5
7.5 10 12.5 15 17.5 20 22.5 25
Output Current (A)
Figure 1— Input reflected ripple current at full load and 48 Vf.
Figure 2— Output voltage ripple vs. output current at 9.6 Vout with no
POL bypass capacitance.
Power Dissipation
Efficiency vs. Output Current
97
96
95
94
93
92
91
90
89
88
87
10
9
8
7
6
5
4
3
2
1
0
0
2.5
5
7.5
10
12.5
15
17.5
20
22.5
25
0
2.5
5
7.5
10 12.5 15 17.5 20 22.5 25
Output Current (A)
Output Current (A)
Figure 3— Efficiency vs. output current at 48 Vf.
Figure 4—Power dissipation as a function of output current at 48 Vf.
Figure 5— Output voltage ripple at full load and 9.6 Vout; without any
external bypass capacitor.
Figure 6—Output voltage ripple at full load and 9.6 Vout with 10 µF
ceramic external bypass capacitance and 20 nH distribution inductance.
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 3 of 15
PRELIMINARY
V•I Chip Voltage Transformation Module
Electrical Specifications (continued)
Figure 7— 0-25.0 A step load change with 47 µF input capacitance and no
Figure 8— 25.0-0 A step load change with 47 µF input capacitance and no
output capacitance.
output capacitance.
General
Parameter
Min
Typ
Max
Unit
Note
MTBF
MIL-HDBK-217F
3.5
Mhrs
25°C, GB
Isolation specifications
Voltage
2,250
10
Vdc
pF
Input to Output
Capacitance
Resistance
3,000
Input to Output
MΩ
Input to Output
cTÜVus
UL/CSA 60950, EN 60950
Low voltage directive
See Mechanical Drawing, Figures 10 and 12
Agency approvals (pending)
CE Mark
Mechanical parameters
Weight
0.5 / 14.0
oz / g
Dimensions(BGA version)
Length
Width
Height
1.26 / 32
0.85 / 21.5
0.23 / 5.9
in / mm
in / mm
in / mm
Auxiliary Pins (Conditions are at 48 Vin, full load, and 25°C ambient unless otherwise specified)
Parameter
Min
Typ
Max
Unit
Note
Primary Control (PC)
DC voltage
4.8
2.4
5.0
2.5
2.5
2.5
10
5.2
Vdc
Vdc
Vdc
mA
µs
Module disable voltage
Module enable voltage
Current limit
2.6
2.9
VC voltage must be applied when module is enabled using PC
2.4
Source only
Disable delay time
PC low to Vout low
VTM Control (VC)
External boost voltage
External boost duration
12.0
14.0
10
19.0
Vdc
ms
Required for VTM start up without PRM
Vin > 26 Vdc. VC must be applied continuously
if Vin < 26 Vdc.
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 4 of 15
PRELIMINARY
Electrical Specifications (continued)
Thermal
Symbol
Parameter
Min
Typ
130
0.61
1.1
Max
Unit
°C
Note
Over temperature shutdown
Thermal capacity
125
135
Junction temperature
Ws/°C
°C/W
°C/W
°C/W
°C/W
RθJC
RθJB
RθJA
RθJA
Junction-to-case thermal impedance
Junction-to-BGA thermal impedance
Junction-to-ambient(1)
2.1
6.5
Junction-to-ambient(2)
5.0
Notes:
(1) V048K096T025 surface mounted in-board to a 2" x 2" FR4 board, 4 layers 2 oz Cu, 300 LFM.
(2) V048K096T025 with optional 0.25"H Pin Fins surface mounted on FR4 board, 300 LFM.
V•I Chip Stress Driven Product Qualification Process
Test
Standard
Environment
High Temperature Operational Life (HTOL)
Temperature cycling
JESD22-A-108-B
JESD22-A-104B
JESD22-A-103A
JESD22-A113-B
EIA/JESD22-A-101-B
JESD22-A-102-C
JESD22-A-110B
JESD22-B-107-A
JESD22-B-103-A
JESD22-B-104-A
EIA/JESD22-A114-A
EIA/JESD22-A115-A
125°C, Vmax, 1,008 hrs
-55°C to 125°C, 1,000 cycles
High temperature storage
150°C, 1,000 hrs
Moisture resistance
Moisture sensitivity Level 5
Temperature Humidity Bias Testing (THB)
Pressure cooker testing (Autoclave)
Highly Accelerated Stress Testing (HAST)
Solvent resistance/marking permanency
Mechanical vibration
85°C, 85% RH, Vmax, 1,008 hrs
121°C, 100% RH, 15 PSIG, 96 hrs
130°C, 85% RH, Vmax, 96 hrs
Solvents A, B & C as defined
20g peak, 20-2,000 Hz, test in X, Y & Z directions
1,500g peak 0.5 ms pulse duration, 5 pulses in 6 directions
Meets or exceeds 2,000 Volts
Mechanical shock
Electro static discharge testing – human body model
Electro static discharge testing – machine model
Meets or exceeds 200 Volts
Per Vicor Internal
Test Specification(1)
Highly Accelerated Life Testing (HALT)
Operation limits verified, destruct margin determined
Per Vicor internal
test specification(1)
Dynamic cycling
Constant line, 0-100% load, -20°C to 125°C
Note:
(1) For details of the test protocols see Vicor’s website.
V•I Chip Ball Grid Array Interconnect Qualification
Test
Standard
IPC-9701
Environment
Cycle condition: TC3 (-40 to +125°C)
Test duration: NTC-B (500 failure free cycles)
BGA solder fatigue evaluation
IPC-SM-785
Solder ball shear test
IPC-9701
Failure through bulk solder or copper pad lift-off
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 5 of 15
PRELIMINARY
V•I Chip Voltage Transformation Module
Pin/Control Functions
+IN/-IN DC Voltage Ports
The VTM input should not exceed the maximum specified. Be aware of
this limit in applications where the VTM is being driven above its
nominal output voltage. If less than 26 Vdc is present at the +In and -In
ports, a continuous VC voltage must be applied for the VTM to process
power. Otherwise VC voltage need only be applied for 10 ms after the
voltage at the +In and -In ports has reached or exceeded 26 Vdc. If the
input voltage exceeds the overvoltage turn-off, the VTM will shutdown.
The VTM does not have internal input reverse polarity protection.
Adding a properly sized diode in series with the positive input or a
fused reverse-shunt diode will provide reverse polarity protection.
4
3
2 1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
+Out
-Out
+In
TM
VC
PC
V
W
Y
V
W
Y
+Out
-Out
AA
AB
AC
AD
AE
AF
AG
AH
AJ
AK
AL
AA
AB
AC
AD
AE
AF
AG
AH
AJ
AK
AL
-In
TM – For Factory Use Only
VC – VTM Control
Bottom View
The VC port is multiplexed. It receives the initial VCC voltage from an
upstream PRM, synchronizing the output rise of the VTM with the
output rise of the PRM. Additionally, the VC port provides feedback to
the PRM to compensate for the VTM output resistance. In typical
applications using VTMs powered from PRMs, the PRM’s VC port
should be connected to the VTM VC port.
Signal Name
BGA Designation
A1-L1, A2-L2
AA1-AL1, AA2-AL2
P1, P2
T1, T2
V1, V2
A3-G3, A4-G4,
U3-AC3, U4-AC4
J3-R3, J4-R4,
AE3-AL3, AE4-AL4
+In
–In
TM
VC
PC
In applications where a VTM is being used without a PRM, 14 V must
be supplied to the VC port for as long as the input voltage is below 26 V
and for 10 ms after the input voltage has reached or exceeded 26 V. The
VTM is not designed for extended operation below 26 V. The VC port
should only be used to provide VCC voltage to the VTM during startup.
+Out
–Out
PC – Primary Control
Figure 9—VTM BGA configuration
The Primary Control (PC) port is a multifunction port for controlling the
VTM as follows:
Disable – If PC is left floating, the VTM output is enabled. To
disable the output, the PC port must be pulled lower than 2.4 V,
referenced to -In. Optocouplers, open collector transistors or relays
can be used to control the PC port. Once disabled, 14 V must be
re-applied to the VC port to restart the VTM.
Primary Auxiliary Supply – The PC port can source up to 2.4 mA
at 5 Vdc.
+OUT/-OUT DC Voltage Output Ports
The output and output return are through two sets of contact
locations. The respective +Out and –Out groups must be connected in
parallel with as low an interconnect resistance as possible. Within the
specified input voltage range, the Level 1 DC behavioral model shown
in Figure 19 defines the output voltage of the VTM. The current source
capability of the VTM is shown in the specification table.
To take full advantage of the VTM, the user should note the low output
impedance of the device. The low output impedance provides fast
transient response without the need for bulk POL capacitance. Limited-
life electrolytic capacitors required with conventional converters can be
reduced or even eliminated, saving cost and valuable board real estate.
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 6 of 15
PRELIMINARY
Mechanical Drawings
1,00
0.039
1,00
0.039
18,00
0.709
5,9
0.23
21,5
0.85
9,00
0.354
SOLDER BALL
#A1 INDICATOR
0.020
SOLDER BALL
SOLDER BALL #A1
(106) X
Ø
0.51
1,00
0.039
TYP
30,00
1.181
32,0
1.26
28,8
1.13
C
L
15,00
0.591
16,0
0.63
C
L
1,6
0.06
1,00
0.039
TOP VIEW (COMPONENT SIDE)
BOTTOM VIEW
3,9
0.15
NOTES:
1- DIMENSIONS ARE
mm
inch
.
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]
3- PRODUCT MARKING ON TOP SURFACE
15,6
0.62
SEATING PLANE
Figure 10—VTM BGA mechanical outline; Inboard mounting
IN-BOARD MOUNTING
BGA surface mounting requires a
cutout in the PCB in which to recess the V•I Chip
1,50
0.059
1,00
0,53
(
)
ø
PLATED VIA
0.039
0.021
CONNECT TO
INNER LAYERS
0,50
0.020
0,51
( ø
)
0.020
SOLDER MASK
DEFINED PADS
0,50
0.020
1,00
(
)
0.039
1,00
0.039
18,00
0.709
1,00
0.039
1,00
0.039
9,00
0.354
SOLDER PAD #A1
1
6,00
0.236
(4) X
10,00
0.394
(2) X
RECOMMENDED LAND AND VIA PATTERN
(COMPONENT SIDE SHOWN)
PCB CUTOUT
29,26
1.152
24,00
0.945
20,00
0.787
17,00
0.669
16,00
0.630
NOTES:
1- DIMENSIONS ARE
mm
inch
15,00
0.591
13,00
0.512
.
8,00
0.315
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]
31
0,37
0.015
0,51
0.020
SOLDER MASK
DEFINED PAD
8,08
0.318
(106) X
ø
1,6
0.06
16,16
0.636
(4) X R
Figure 11— VTM BGA PCB land/VIA layout information; Inboard mounting
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 7 of 15
PRELIMINARY
V•I Chip Voltage Transformation Module
Mechanical Drawings (continued)
6,1
0.24
15,99
0.630
22,0
0.87
3,01
0.118
3,01
0.118
7,10
0.280
(4) PL.
11,10
0.437
(2) PL.
24,00
0.945
32,0
1.26
C
20,00
0.787
L
16,94
0.667
16,00
0.630
14,94
0.588
15,55
0.612
12,94
0.509
8,00
0.315
C
L
0,45
0.018
BOTTOM VIEW
TOP VIEW (COMPONENT SIDE)
NOTES:
1- DIMENSIONS ARE mm/[INCH].
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]
3- PRODUCT MARKING ON TOP SURFACE
Figure 12—VTM J-Lead mechanical outline; Onboard mounting
3,26
0.128
3,26
0.128
15,74
0.620
0,51
0.020
1,38
0.054
TYP
TYP
7,48
0.295
(8) X
11,48
0.452
(4) X
(2) X
1,60
(6) X
0.063
20,00
0.787
24,00
0.945
16,94
0.667
(2) X
(2) X
(2) X
16,00
0.630
14,94
0.588
(2) X
12,94
0.509
8,00
0.315
(2) X
(2) X
NOTES:
1- DIMENSIONS ARE mm/[INCH].
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]
RECOMMENDED LAND PATTERN
(COMPONENT SIDE SHOWN)
Figure 13— VTM J-Lead PCB land layout information; Onboard mounting
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 8 of 15
PRELIMINARY
Configuration Options
Configuration
Inboard(1)
(Figure 14)
Onboard(1)
(Figure 15)
Inboard with 0.25"
Pin Fins(2)
Onboard with 0.25"
Pin Fins(2)
Effective power density
1400 W/in3
2.1 °C/W
1.1 °C/W
880 W/in3
2.4 °C/W
1.1 °C/W
550 W/in3
2.1 °C/W
N/A
440 W/in3
2.4 °C/W
N/A
Junction-Board
thermal resistance
Junction-Case
thermal resistance
Junction-Ambient
thermal resistance 300LFM
6.5 °C/W
6.8 °C/W
5.0 °C/W
5.0 °C/W
Notes:
(1) Surface mounted to a 2" x 2" FR4 board, 4 layers 2 oz Cu
(2) Pin Fin heat sink available as a separate item
21.5
0.85
22.0
0.87
32.0
1.26
32.0
1.26
4.0
0.16
6.3
0.25
mm
in
ONBOARD MOUNT
INBOARD MOUNT
(V•I Chip recessed into PCB)
mm
in
Figure 14—Inboard mounting – package K
Figure 15—Onboard mounting – package F
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 9 of 15
PRELIMINARY
V•I Chip Voltage Transformation Module
CONFIGURATION OPTIONS (continued)
Input reflected ripple
measurement point
F1
+Out
-Out
7A
Fuse
+In
+
R3
10 mΩ
TM
VC
PC
VTM
Load
C1
C2
C3
10 µF
47 µF
Al electrolytic
0.47 µF
+Out
-Out
+
ceramic
14 V
–
K
Ro
Notes:
C3 should be placed close
to the load
-In
–
R3 may be ESR of C3 or a
seperate damping resistor.
Figure 16—VTM test circuit
Application Note
Parallel Operation
In applications requiring higher current or redundancy, VTMs can be
operated in parallel without adding control circuitry or signal lines. To
maximize current sharing accuracy, it is imperative that the source and
load impedance on each VTM in a parallel array be equal. If VTMs are
being fed by an upstream PRM, the VC nodes of all VTMs must be
connected to the PRM VC.
At 9.6 Vout and full rated current (25.0A), the VTM dissipates
approximately 9 W per Figure 4. This results in a temperature rise of
approximately 43 ºC, allowing operation in an air temperature of
82 ºC without exceeding the 125 ºC max junction temperature.
CASE 2 Conduction via the PC board to air
The low Junction to BGA thermal resistance allows the use
of the PC board as a means of removing heat from the VTM.
Convection from the PC board to ambient, or conduction to a cold
plate, enable flexible thermal management options.
To achieve matched impedances, dedicated power planes within the PC
board should be used for the output and output return paths to the
array of paralleled VTMs. This technique is preferable to using traces of
varying size and length.
With a VTM mounted on a 2.0 in2 area of a multi-layer PC board with
appropriate power planes resulting in 8 oz of effective copper weight,
the Junction-to-BGA thermal resistance, RθJA, is 6.5 ºC/W in 300 LFM
of air. With a maximum junction temperature of 125 ºC and 9 W of
dissipation at full current of 25.0 A, the resulting temperature rise of
59 ºC allows the VTM to operate at full rated current up to a 66 ºC
ambient temperature. See thermal resistances on Page 9 for additional
details on this thermal management option.
The VTM power train and control architecture allow bi-directional
power transfer when the VTM is operating within its specified ranges.
Bi-directional power processing improves transient response in the
event of an output load dump. The VTM may operate in reverse,
returning output power back to the input source. It does so efficiently.
Thermal Management
The high efficiency of the VTM results in low power dissipation
minimizing temperature rise, even at full output current. The heat
generated within the internal semiconductor junctions is coupled
through very low thermal resistances, RθJC and RθJB (see Figure 17),
to the PC board allowing flexible thermal management.
Adding low-profile heat sinks to the PC board can lower the thermal
resistance of the PC board surrounding the VTM. Additional cooling
may be added by coupling a cold plate to the PC board with low
thermal resistance stand offs.
CASE 3 Combined direct convection to the air and conduction to the
PC board.
CASE 1 Convection via optional Pin Fins to air (Pin Fins available as a
separate item.)
A combination of cooling techniques that utilize the power planes and
dissipation to the air will also reduce the total thermal impedance. This
is the most effective cooling method. To estimate the total effect of the
combination, treat each cooling branch as one leg of a parallel resistor
network.
In an environment with forced convection over the surface of a PCB
with 0.4" of headroom, a VTM with Pin Fins offers a simple thermal
management option. The total Junction to Ambient thermal resistance
of a surface mounted V048K096T025 with pin fins attached is 4.8 ºC/W
in 300 LFM airflow, (see Figure 18).
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 10 of 15
PRELIMINARY
Application Note (continued)
VTM with optional 0.25'' Pin Fins
10
9
8
7
6
5
4
3
0
100
200
300
400
500
600
Airflow (LFM)
Figure 18—Junction-to-ambient thermal resistance of VTM with 0.25"
Pin Fins. (Pin Fins are available as a separate item.)
Figure 17—Thermal resistance
V•I Chip VTM Level 1 DC Behavioral Model for 48 V to 9.6 V, 25.0 A
ROUT
IOUT
+
+
8.9 mΩ
•
V I
1/5 • Iout
1/5 • Vin
+
–
+
–
VOUT
VIN
Q
I
64 mA
K
–
–
©
Figure 19—This model characterizes the DC operation of the V•I Chip VTM, including the converter transfer function and its losses. The model enables estimates
or simulations of output voltage as a function of input voltage and output load, as well as total converter power dissipation or heat generation.
V•I Chip VTM Level 2 Transient Behavioral Model for 48 V to 9.6 V, 25.0 A
5.5 nH
LOUT = 1.6 nH
LIN = 20 nH
ROUT
IOUT
+
+
8.9 mΩ
R
R
CIN
COUT
25 mΩ
1/5 • Vin
1.3 mΩ
•
V I
0.2 mΩ
1/5 • Iout
+
–
4.0 µF
IQ
64 mA
+
–
55.0 µF
CIN
COUT
VOUT
VIN
K
–
–
©
Figure 20—This model characterizes the AC operation of the V•I Chip VTM including response to output load or input voltage transients or steady state
modulations. The model enables estimates or simulations of input and output voltages under transient conditions, including response to a stepped load
with or without external filtering elements.
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 11 of 15
PRELIMINARY
V•I Chip Voltage Transformation Module
Application Note (continued)
In Figures 21 – 23;
K = VTM Transformation Ratio
RO = VTM Output Resistance
Vf = PRM Output (Factorized Bus Voltage)
VO = VTM Output
VL = Desired Load Voltage
FPA Adaptive Loop
±
Vo = VL 1.0%
VH
SC
SG
OS
NC
VC
PC
TM
IL
+Out
+In
Factorized
ROS
RCD
L
O
A
D
NC
-Out
PR PRM-AL CD
Bus (Vf)
TM
VTM
VC
+In
+Out
PC
+Out
(
)
VL
K
Io•Ro
K
Vin
Vf =
+
K
Ro
-In
–In
–Out
-Out
Figure 21 — The PRM controls the factorized bus voltage, Vf, in proportion to output current to compensate for the output resistance, Ro, of the VTM. The VTM
output voltage is typically within 1% of the desired load voltage (VL) over all line and load conditions.
FPA Non-isolated Remote Loop
Remote
Loop
Control
±
Vo = VL 0.4%
VH
SC
SG
OS
NC
VC
PC
TM
IL
+Out
-Out
+In
Factorized
Power Bus
+S
L
O
A
D
NC
PR PRM-AL CD
TM
VC
PC
VTM
+In
+Out
+Out
-Out
Vin
Vf = f (Vs)
–S
K
Ro
-In
–In
–Out
Figure 22 — An external error amplifier or Point-of-Load IC (POLIC) senses the load voltage and controls the PRM output – the Factorized Bus – as a function of
output current, compensating for the output resistance of the VTM and for distribution resistance.
FPA Isolated Remote Loop
Remote
Loop
Control
±
Vo = VL 0.4%
VS
FB
FG
NC
NC
NC
VC
PC
TM
IL
NC
PR
+Out
-Out
+In
Factorized
Power Bus
+S
L
O
A
D
TM
VC
PC
PRM-IF
VTM
+In
+Out
+Out
-Out
Vin
Vf = f (Vs)
–S
K
Ro
-In
–In
–Out
Figure 23—An external error amplifier or Point-of-Load IC (POLIC) senses the load voltage and controls the PRM output – the factorized bus – as a function of
output current, compensating for the output resistance of the VTM and for distribution resistance. The Factorized Bus voltage (Vf) increases in proportion to load
current. The remote feedback loop is isolated within the PRM to support galvanic isolation and hipot compliance at the system level.
vicorpower.com
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V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 12 of 15
PRELIMINARY
Application Note (continued)
V•I Chip soldering recommendations
Removal and rework
V•I Chip modules are intended for reflow soldering processes. The
following information defines the processing conditions required for
successful attachment of a V•I Chip to a PCB. Failure to follow the
recommendations provided can result in aesthetic or functional failure
of the module.
V•I Chip modules can be removed from PCBs using special tools such
as those made by Air-Vac. These tools heat a very localized region of
the board with a hot gas while applying a tensile force to the
component (using vacuum). Prior to component heating and removal,
the entire board should be heated to 80-100ºC to decrease the
component heating time as well as local PCB warping. If there are
adjacent moisture-sensitive components, a 125ºC bake should be used
prior to component removal to prevent popcorning. V•I Chip modules
should not be expected to survive a removal operation.
Storage
V•I Chip modules are currently rated at MSL 5. Exposure to ambient
conditions for more than 72 hours requires a 24 hour bake at 125ºC to
remove moisture from the package.
239
Solder paste stencil design
Joint Temperature, 220ºC
Case Temperature, 208ºC
Solder paste is recommended for a number of reasons, including
overcoming minor solder sphere co-planarity issues as well as simpler
integration into overall SMD process.
183
165
63/37 SnPb, either no-clean or water-washable, solder paste should be
used. Pb-free development is underway.
degC
The recommended stencil thickness is 6 mils. The apertures should be
20 mils in diameter for the Inboard (BGA) application and 0.9-0.9:1 for
the Onboard (J-Leaded).
91
Pick and place
16
Inboard (BGA) modules should be placed as accurately as possible
to minimize any skewing of the solder joint; a maximum offset of
10 mils is allowable. Onboard (J-Leaded) modules should be placed
within 5 mils.
Soldering Time
Figure 24—Thermal profile diagram
To maintain placement position, the modules should not be subjected
to acceleration greater than 500 in/sec2 prior to reflow.
Reflow
There are two temperatures critical to the reflow process; the solder
joint temperature and the module’s case temperature. The solder joint’s
temperature should reach at least 220ºC, with a time above liquidus
(183ºC) of ~30 seconds.
The module’s case temperature must not exceed 208 ºC at anytime
during reflow.
Because of the ∆T needed between the pin and the case, a forced-air
convection oven is preferred for reflow soldering. This reflow method
generally transfers heat from the PCB to the solder joint. The module’s
large mass also reduces its temperature rise. Care should be taken to
prevent smaller devices from excessive temperatures. Reflow of
modules onto a PCB using Air-Vac-type equipment is not recommended
due to the high temperature the module will experience.
Figure 25— Properly reflowed V•I Chip J-Lead
Inspection
For the BGA-version, a visual examination of the post-reflow solder
joints should show relatively columnar solder joints with no bridges. An
inspection using x-ray equipment can be done, but the module’s
materials may make imaging difficult.
The J-Lead versions solder joints should conform to IPC 12.2
• Properly wetted fillet must be evident.
• Heel fillet height must exceed lead thickness plus solder thickness.
vicorpower.com
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V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 13 of 15
PRELIMINARY
V•I Chip Voltage Transformation Module
Application Note (continued)
Input Impedance Recommendations
Input Fuse Recommendations
To take full advantage of the VTM’s capabilities, the impedance of the
source (input source plus the PC board impedance) must be low over a
range from DC to 5 MHz. The input of the VTM (factorized bus) should be
locally bypassed with a 8 µF low Q aluminum electrolytic capacitor.
Additional input capacitance may be added to improve transient
performance or compensate for high source impedance. The VTM has
extremely wide bandwidth so the source response to transients is usually
the limiting factor in overall output response of the VTM.
V•I Chips are not internally fused in order to provide flexibility in
configuring power systems. However, input line fusing of V•I Chips must
always be incorporated within the power system. A fast acting fuse is
required to meet safety agency Conditions of Acceptability. The input line
fuse should be placed in series with the +In port.
Anomalies in the response of the source will appear at the output of the
VTM, multiplied by its K factor of 1/5 . The DC resistance of the source
should be kept as low as possible to minimize voltage deviations on the
input to the VTM. If the VTM is going to be operating close to the high
limit of its input range, make sure input voltage deviations will not trigger
the input overvoltage turn-off threshold.
Warranty
Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. This
warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. Vicor shall not be liable for collateral or
consequential damage. This warranty is extended to the original purchaser only.
EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
Vicor will repair or replace defective products in accordance with its own best judgement. For service under this warranty, the buyer must contact Vicor
to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the
buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective
within the terms of this warranty.
Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. Vicor
reserves the right to make changes to any products without further notice to improve reliability, function, or design. Vicor does not assume any liability
arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor
general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or
injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes all risks of such use and indemnifies
Vicor against all damages.
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
Page 14 of 15
Vicor’s comprehensive line of power solutions includes high density AC-DC
and DC-DC modules and accessory components, fully configurable AC-DC
and DC-DC power supplies, and complete custom power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for
its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or
malfunction could result in injury or death. All sales are subject to Vicor’s Terms and Conditions of Sale, which are
available upon request.
Specifications are subject to change without notice.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent
applications) relating to the products described in this data sheet. Interested parties should contact Vicor's
Intellectual Property Department.
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
email
Vicor Express: vicorexp@vicr.com
Technical Support: apps@vicr.com
vicorpower.com
800-735-6200
V•I Chip Voltage Transformation Module
V048K096T025
Rev. 1.0
3/05
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