V048F480T006 [VICOR]

VI Chip - PRM-AL Pre-Regulator Module; VI晶片 - PRM -AL预稳压模块
V048F480T006
型号: V048F480T006
厂家: VICOR CORPORATION    VICOR CORPORATION
描述:

VI Chip - PRM-AL Pre-Regulator Module
VI晶片 - PRM -AL预稳压模块

电源电路
文件: 总14页 (文件大小:408K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PRELIMINARY  
PRM  
P048F048T24AL  
TM  
V•I Chip – PRM-AL  
Pre-Regulator Module  
• 48 V input V•I Chip PRM  
• Adaptive Loop feedback  
• Vin range 36 – 75 Vdc  
• ZVS buck-boost regulator  
©
• High density – 875 W/in3  
• Small footprint – 220 W/in2  
• Low weight – 0.5 oz (14 g)  
• 1.5 MHz switching frequency  
• 96% Efficiency  
Actual size  
Vin = 36 – 75 V  
Vf = 26 – 55 V  
Pf = 240 W  
If = 5 A  
• 125˚C operation  
Product Description  
Absolute Maximum Ratings  
The V•I Chip Pre-Regulator Module (PRM) is a very  
efficient non-isolated regulator capable of both  
boosting and bucking a wide range input voltage. It is  
specifically designed to provide a controlled Factorized  
Bus distribution voltage for powering downstream  
V•I Chip Voltage Transformation Modules (VTMs) —  
fast, efficient, isolated, low noise Point-of-Load (POL)  
converters. In combination, PRMs and VTMs form a  
complete DC-DC converter subsystem offering all of  
the unique benefits of Vicors Factorized Power  
Architecture (FPA): high density and efficiency; low  
noise operation; architectural flexibility; extremely fast  
transient response; and elimination of bulk capacitance  
at the Point-of-Load (POL).  
Parameter  
+In to -In  
Values  
-1.0 to 85.0  
-0.3 to 6.0  
-0.3 to 9.0  
-0.3 to 6.0  
-0.3 to 18.0  
-0.3 to 59  
-0.3 to 3.0  
-0.3 to 9.5  
-0.3 to 9.0  
-0.3 to 9.0  
100  
Unit  
Vdc  
Vdc  
Vdc  
Vdc  
Vdc  
Vdc  
Vdc  
Vdc  
Vdc  
Vdc  
mA  
Adc  
W
PC to -In  
PR to -In  
IL to -In  
VC to -In  
+Out to -Out  
SC to -Out  
VH to -Out  
OS to -Out  
CD to -Out  
SG to -Out  
Continuous output current  
Continuous output power  
5
In FPA systems, the POL voltage is the product of the  
Factorized Bus voltage delivered by the PRM and the  
"K-factor" (the fixed voltage transformation ratio) of a  
downstream VTM. The PRM controls the Factorized Bus  
voltage to provide regulation at the POL. Because VTMs  
perform true voltage division and current multiplication,  
the Factorized Bus voltage may be set to a value that is  
substantially higher than the bus voltages typically  
found in "intermediate bus" systems, reducing  
240  
Operating junction temperature  
(M-Grade)  
(T-Grade)  
-55 to 125  
-40 to 125  
°C  
°C  
Storage temperature  
(M-Grade)  
(T-Grade)  
-65 to 150  
-40 to 150  
°C  
°C  
Case temperature during reflow:  
208  
°C  
distribution losses and enabling use of narrower  
distribution bus traces. A PRM-VTM chip set can  
provide up to 100 A or 230 W at a FPA system density  
of 200 A/in3 or 460 W/in3 — and because the PRM can  
be located, or "factorized," remotely from the POL,  
these power densities can be effectively doubled.  
DC-DC Converter  
VH  
SC  
SG  
OS  
NC  
VC  
PC  
TM  
IL  
+Out  
-Out  
+In  
Factorized  
Bus (Vf)  
NC  
The PRM described in this data sheet features a unique  
"Adaptive Loop" compensation feedback: a single wire  
alternative to traditional remote sensing and feedback  
loops that enables precise control of an isolated POL  
voltage without the need for either a direct connection  
to the load or for noise sensitive, bandwidth limiting,  
isolation devices in the feedback path.  
PR PRM-AL CD  
TM  
VC  
PC  
VTM  
Vout  
+In  
+Out  
+Out  
-Out  
Vin  
K
Ro  
-In  
–In  
–Out  
The P048F048T24AL is used with any 048 input series VTM to provide a regulated and  
isolated output.  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 1 of 14  
PRELIMINARY  
V•I Chip Pre-Regulator Module  
General Specifications  
Part Numbering  
P
048  
F
048  
T
24  
AL  
Configuration  
(Fig.21)  
Product Grade Temperatures (°C)  
AL = Adaptive Loop  
Pre-Regulator  
Module  
Input Voltage  
Designator  
Nominal  
Factorized Bus  
Voltage  
Output Power  
Designator  
(=Pf /10)  
Grade  
Storage Operating  
-40 to150 -40 to125  
-65 to150 -55 to125  
T
M
Overview of Adaptive Loop Compensation  
Adaptive Loop compensation, illustrated in Figure 1, contributes to  
the bandwidth and speed advantage of Factorized Power. The PRM  
monitors its output current and automatically adjusts its output  
voltage to compensate for the voltage drop in the output  
resistance of the VTM. ROS sets the desired value of the VTM  
output voltage, Vout; RCD is set to a value that compensates for  
the output resistance of the VTM (which, ideally, is located at the  
point of load). For selection of ROS and RCD, refer to Table 1 below  
or Page 9.  
The V•I Chips bi-directional VC port :  
1. Provides a wake up signal from the PRM to the VTM that  
synchronizes the rise of the VTM output voltage to that of the PRM.  
2. Provides feedback from the VTM to the PRM to enable the PRM  
to compensate for the voltage drop in VTM output resistance, RO.  
VH  
SC  
SG  
OS  
NC  
VC  
PC  
TM  
IL  
+Out  
+In  
Factorized  
Bus (Vf)  
ROS  
RCD  
L
O
A
D
NC  
-Out  
PR PRM-AL CD  
TM  
VC  
PC  
VTM  
+In  
+Out  
+Out  
-Out  
Vin  
K
Ro  
-In  
–In  
–Out  
Figure 1 — With Adaptive Loop control, the output of the VTM is regulated over the load current range with only a single interconnect between the PRM and  
VTM and without the need for isolation in the feedback path.  
Desired Load Voltage (Vdc)  
VTM P/N(1)  
Max VTM Output Current (A)(2)  
ROS (kΩ)(3)  
3.57  
2.94  
2.37  
2.61  
2.37  
2.89  
2.87  
2.86  
2.37  
2.49  
2.37  
2.74  
3.16  
2.37  
RCD (Ω)(3)  
26.1  
32.4  
39.2  
35.7  
39.2  
32.6  
33.2  
32.9  
39.2  
37.4  
39.2  
35.7  
30.1  
39.2  
1.0  
V048F015T100  
V048F015T100  
V048F015T100  
V048F020T080  
V048F020T080  
V040F033T060  
V048F060T040  
V048F120T025  
V048F120T025  
V048F160T019  
V048F240T012  
V048F320T009  
V048F480T006  
V048F480T006  
100  
100  
100  
80  
1.2  
1.5  
1.8  
2.0  
80  
3.3  
60  
5.0  
40  
10  
25  
12  
25  
15  
18.8  
12.5  
9.4  
6.3  
6.3  
24  
28  
36  
48  
Note:  
(1) See Table 2 on page 9 for nominal Vout range and K factors.  
(2) See “PRM output power vs. VTM output power” on Page 10  
(3) 1% precision resistors recommended  
Table 1 — Configure your Chip Set using the PRM-AL  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 2 of 14  
PRELIMINARY  
V•I Chip Pre-Regulator Module  
Electrical Specifications  
Input Specs (Conditions are at 48 Vin, 48 Vf, full load, and 25°C ambient unless otherwise specified)  
Parameter  
Min  
Typ  
Max  
75  
Unit  
Vdc  
V/µs  
Vdc  
Vdc  
Vdc  
Vdc  
mA  
Note  
Input voltage range  
36  
48  
Input dV/dt  
1
Input undervoltage turn-on  
Input undervoltage turn-off  
Input overvoltage turn-on  
Input overvoltage turn-off  
Input quiescent current  
Input current  
33.8  
31.8  
77.3  
78.8  
0.5  
35.3  
30.5  
75.8  
81.0  
1
PC low  
5.2  
Adc  
mA p-p  
W
Input reflected ripple current  
No load power dissipation  
Internal input capacitance  
Recommended external input capacitance  
580  
3.0  
See Figures 4 & 5  
Ceramic  
5
µF  
100  
µF  
See Figure 5 for input filter circuit.  
Source impedance dependent  
Input Waveforms  
Figure 2 — Vf and PC response from power up  
Figure 3 — Vf turn-on waveform with inrush current – PC enabled at  
full load, 48 Vin  
VH  
SC  
SG  
OS  
NC  
VC  
PC  
TM  
IL  
Reflected  
Ripple  
Measurement  
NC  
2.37 kΩ  
PR PRM-AL CD  
10 A  
+ OUT  
+IN  
–IN  
+In  
+Out  
100 μF  
Al-Electrolytic  
–In  
–Out  
– OUT  
Figure 4 — Input reflected ripple current at full load and 48 Vin  
Figure 5 — Input filter capacitor recommendation  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 3 of 14  
PRELIMINARY  
(continued)  
V•I Chip Pre-Regulator Module  
Electrical Specifications  
Output Specs (Conditions are at 48 Vin, 48 Vf, full load, and 25°C ambient unless otherwise specified)  
Parameter  
Min  
26  
0
Typ  
Max  
55  
Unit  
Vdc  
W
Note  
Output voltage range  
Output power  
48  
Factorized Bus voltage (Vf) set by ROS  
240  
5
Output current  
0
Adc  
Adc  
A
DC current limit  
5.25  
6.0  
6.6  
0.5  
IL pin floating  
Auto recovery  
Average short circuit current  
Set point accuracy  
Line regulation  
1.5  
0.1  
0.1  
1.0  
5
%
0.2  
0.2  
2.0  
10  
%
Low line to high line  
No CD resistor  
Load regulation  
%
Load regulation (at VTM output)  
Current share accuracy  
Efficiency  
%
Adaptive Loop  
%
Full load  
96  
%
See Figure 6,7 & 8  
Output overvoltage set point  
Output ripple voltage  
No external bypass  
With 10 µF capacitor  
Switching frequency  
Output turn-on delay  
From application of power  
From PC pin high  
56  
59.4  
Vdc  
2.3  
1.0  
2.5  
1.1  
%
%
Factorized Bus, see figure 13  
Factorized Bus, see figure 14  
Fixed frequency  
1.35  
1.45  
1.55  
MHz  
200  
100  
5
300  
47  
ms  
µs  
See Figure 2  
See Figure 3  
Ceramic  
Internal output capacitance  
Factorized Bus capacitance  
µF  
µF  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 4 of 14  
PRELIMINARY  
(continued)  
V•I Chip Pre-Regulator Module  
Electrical Specifications  
Efficiency Graphs  
Efficiency vs. Output Current  
Efficiency vs. Output Current  
98  
96  
94  
92  
90  
88  
86  
84  
82  
80  
78  
98  
96  
94  
Vin  
92  
Vin  
36V  
48V  
75V  
90  
88  
86  
36V  
48V  
75V  
84  
82  
80  
78  
0.5  
1.1  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
4.6  
5.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
Output Current (A)  
Output Current (A)  
Figure 6 — Efficiency vs. output current at 48 Vf  
Figure 7 — Efficiency vs. output current at 36 Vf  
Efficiency vs. Output Current  
98  
96  
94  
92  
90  
88  
86  
84  
82  
80  
78  
Vin  
36V  
48V  
75V  
0.5  
1.0  
1.6  
2.0  
2.5  
3.0  
3.5  
4.0  
4.6  
5.0  
Output Current (A)  
Figure 8 — Efficiency vs. output current at 26 Vf  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 5 of 14  
PRELIMINARY  
Output Waveforms  
Figure 10 Transient response; PRM alone, 48 Vin, 05.0 – 0 A  
Figure 9 — VTM output regulation and Vf bus during load step using  
no load capacitance. Local Loop  
VTM with K = 1/24  
Figure 11 Transient response; load change from 40 – 80 – 40 A,  
at the output of a K=1/24 VTM with no Vf bus capacitance and 100 µF  
load capacitance.  
Figure 12 — PC during fault – frequency will vary as a function of line  
voltage.  
Figure 14 — Output ripple full load 10µF bypass capacitance  
Figure 13 — Output ripple full load no bypass capacitance  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 6 of 14  
PRELIMINARY  
(continued)  
V•I Chip Pre-Regulator Module  
Electrical Specifications  
Auxiliary Pins (Conditions are at 48 Vin, 48 Vf, full load, and 25°C ambient unless otherwise specified)  
Parameter  
Min  
Typ  
Max  
Unit  
Note  
VC (VTM Control)  
Peak voltage  
14  
V
Referenced to –OUT  
PC (Primary Control)  
DC voltage  
4.8  
2.3  
5.0  
2.4  
2.5  
100  
5.2  
2.6  
Vdc  
Vdc  
Vdc  
mV  
Referenced to –IN  
Referenced to –IN  
Module disable voltage  
Module enable voltage  
Disable hysteresis  
Source only after start up; not to be used for  
aux. supply; 100 kΩ minimum load  
impedance to assure start up.  
Current limit  
1.75  
1.90  
mA  
Enable delay time  
Disable delay time  
IL (Current Limit Adjust)  
Voltage  
100  
1
µs  
µs  
1
V
Accuracy  
15  
%
Based on DC current limit set point  
Referenced to SG  
PR (Parallel Port)  
Voltage  
0.6  
1
7.5  
100  
9.3  
V
Source current  
mA  
pF  
External capacitance  
VH (Auxiliary Voltage)  
Range  
8.7  
9.0  
Vdc  
Maximum source = 5 mA, referenced to SG  
Referenced to SG  
Regulation  
0.04  
%/mA  
SC (Secondary Control)  
Voltage  
1.23  
1.24  
0.1  
1.25  
0.7  
Vdc  
µF  
Internal capacitance  
External capacitance  
OS (Output Set)  
Set point accuracy  
Reference offset  
CD (Compensation Device)  
External resistance  
µF  
1.5  
4
%
Includes 1% external resistor  
mV  
20  
Ω
Omit resistor for regulation at output of PRM  
General Specs  
Parameter  
MTBF  
Min  
Typ  
Max  
Unit  
Note  
MIL-HDBK-217F  
2.2  
Mhrs  
25°C, GB  
cTÜVus  
CE Mark  
UL/CSA 60950, EN60950  
Low voltage directive  
See mechanical drawing, Figure19  
Agency approvals (pending)  
Mechanical parameters  
Weight  
0.5 / 14  
oz / g  
Dimensions  
Length  
1.26 / 32  
0.87 / 22  
0.25 / 6,2  
in / mm  
in / mm  
in / mm  
Width  
Height  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 7 of 14  
PRELIMINARY  
V•I Chip Pre-Regulator Module  
Pin / Control Functions  
+IN / -IN DC Voltage Ports  
The V•I Chip maximum input voltage should not be exceeded. PRMs  
have internal over / undervoltage lockout functions that prevent  
operation outside of the specified input range. PRMs will turn on  
when the input voltage rises above its undervoltage lockout. If the  
input voltage exceeds the overvoltage lockout, PRMs will shut down  
until the overvoltage fault clears. PC will toggle indicating an out of  
bounds condition.  
AL Version  
4
3
2
1
A
B
C
D
E
F
VC  
PC  
TM  
IL  
A
B
C
D
E
F
VH  
SC  
SG  
OS  
NC  
NC  
PR  
CD  
G
H
J
G
H
J
+IN  
–IN  
+OUT  
K
K
+OUT / -OUT Factorized Voltage Output Ports  
L
M
N
P
L
M
N
P
These ports provide the Factorized Bus voltage output. The –OUT port  
is connected internally to the –IN port through a current sense resistor.  
The PRM has a maximum power and a maximum current rating and is  
protected if either rating is exceeded. Do not short –OUT to –IN.  
–OUT  
Bottom View  
Signal Name  
Designation  
G1-K1,G2-K2  
L1-P1, L2-P2  
A1,A2  
+IN  
–IN  
VC  
VC – VTM Control  
The VTM Control (VC) port supplies an initial VCC voltage to  
PC  
B1, B2  
downstream VTMs, enabling the VTMs and synchronizing the rise of  
the VTM output voltage to that of the PRM. The VC port also provides  
feedback to the PRM to compensate for voltage drop due to the VTM  
output resistance. The PRMs VC port should be connected to the VTM  
VC port. A PRM VC port can drive a maximum of two (2) VTM VC ports.  
TM  
IL  
C1, C2  
D1, D2  
PR  
F1, F2  
VH  
A3, A4  
SC  
B3, B4  
SG  
C3, C4  
OS  
D3, D4  
CD  
+OUT  
–OUT  
F3, F4  
PC – Primary Control  
G3-K3, G4-K4  
L3-P3, L4-P4  
The PRM voltage output is enabled when the PC pin is open circuit  
(floating). To disable the PRM output voltage, the PC pin is pulled low.  
Open collector optocouplers, transistors, or relays can be used to  
control the PC pin. When using multiple PRMs in a high power array,  
the PC ports must be tied together to synchronize their turn on.  
During an abnormal condition the PC pin will pulse (Fig.12) as the  
PRM initiates a restart cycle. This will continue until the abnormal  
condition is rectified. The PC should not be used as an auxiliary voltage  
supply, nor should it be switched at a rate greater than 1 Hz.  
Figure 15 — PRM pin configuration  
SC – Secondary Control  
The load voltage may be controlled by connecting a resistor or voltage  
source to the SC port referenced to SG. The slew rate of the output  
voltage may be controlled by controlling the rate-of-rise of the voltage  
at the SC port (e.g., to limit inrush current into a capacitive load).  
TM – Factory Use Only  
IL – Current Limit Adjust  
SG – Signal Ground  
This port provides a low inductance Kelvin connection to –IN and  
should be used as reference for the OS, CD, SC,VH and IL ports.  
The PRM has a preset, maximum, current limit set point. The IL port  
may be used to reduce the current limit set point to a lower value. See  
“adjusting current limits” on page 10.  
OS – Output Set  
The application-specific value of the Factorized Bus voltage (Vf) is set  
by connecting a resistor between OS and SG. Resistor value selection is  
shown in Table 1 on Page 2, and described on Page 9. If no resistor is  
connected, the PRM output will be approximately one volt. If set  
resistor is not collocated with the PRM, a local bypass capacitor of  
~200 pF may be required.  
PR – Parallel Port  
The PR port signal, which is proportional to the PRM output power,  
supports current sharing among PRMs. To enable current sharing, PR  
ports should be interconnected. Bypass capacitance should be used  
when interconnecting PR ports and steps should be taken to minimize  
coupling noise into the interconnecting bus. Please consult Vicor  
Applications Engineering regarding additional considerations.  
CD – Compensation Device  
Adaptive Loop control is configured by connecting an external resistor  
between the CD port and SG. Selection of an appropriate resistor  
value (see Equation 2 on Page 9 and Table 1 on Page 2) configures the  
PRM to compensate for voltage drops in the equivalent output  
resistance of the VTM and the PRM-VTM distribution bus. If no resistor  
is connected to CD, the PRM will be in Local Loop mode and will  
regulate the +OUT / –OUT voltage to a fixed value.  
VH – Auxiliary Voltage  
VH is a gated, non-isolated, nominally 9 Volt, regulated DC voltage  
(see “Auxiliary Pins” specifications, on Page 7) that is referenced to  
SG. VH may be used to power external circuitry having a total current  
consumption of no more than 5 mA.  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 8 of 14  
PRELIMINARY  
V•I Chip Pre-Regulator Module  
Application Information  
VH  
SC  
SG  
OS  
NC  
VC  
PC  
TM  
IL  
+Out  
+In  
Factorized  
Bus (Vf)  
ROS  
RCD  
L
O
A
D
NC  
-Out  
PR PRM-AL CD  
TM  
VC  
PC  
0.4 μH  
VTM  
+In  
+Out  
+Out  
-Out  
(
)
VL  
K
IL•Ro  
K
Vin  
Vf =  
+
K
Ro  
-In  
–In  
–Out  
Figure 16 — Adaptive Loop compensation with soft start using the SC port.  
Output Voltage Setting with Adaptive Loop  
The equations for calculating ROS and RCD to set a VTM output  
voltage are:  
Where Vfd is the desired factorized bus and Vfs is the set factorized bus.  
A low voltage source can be applied to the SC port to margin the load  
voltage in proportion to the SC reference voltage.  
93100  
An external capacitor can be added to the SC port as shown in Figure 16  
to control the output voltage slew rate for soft start.  
ROS =  
VL • 0.8395  
K
(1)  
(2)  
(
) –  
1
Nominal Vout  
Range (Vdc)  
VTM  
K Factor  
91238  
RCD =  
+ 1  
ROS  
0.8  
1.1  
1.6  
2.2  
1/32  
1/24  
1/16  
1/12  
1/8  
VL = Desired load voltage  
VOUT = VTM output voltage  
K = VTM transformation ratio  
1.6  
3.3  
2.2  
4.4  
3.3  
6.6  
(available from appropriate VTM data sheet)  
4.3  
8.8  
1/6  
6.5  
13.4  
17.9  
26.9  
36.0  
54.0  
1/4  
Vf = PRM output voltage, the Factorized Bus (see Figure 16)  
8.7  
1/3  
RO = VTM output resistance  
13.0  
17.4  
26.0  
1/2  
(available from appropriate VTM data sheet)  
2/3  
IL = Load Current  
1
(actual current delivered to the load)  
Table 2 — 048 input series VTM K factor selection guide  
Output Voltage Trimming (optional)  
After setting the output voltage from the procedure above the output  
may be margined down (26Vf min) by a resistor from SC-SG using this  
formula:  
10000 Vfd  
RdΩ =  
Vfs - Vfd  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 9 of 14  
PRELIMINARY  
(continued)  
V•I Chip Pre-Regulator Module  
Application Information  
OVP – Overvoltage Protection  
Adjusting current limit  
The output Overvoltage Protection set point of the P048K048T24AL is  
factory preset for 56 V. If this threshold is exceeded the output shuts  
down and a restart sequence is initiated, also indicated by PC pulsing.  
If the condition that causes OVP is still present, the unit will again shut  
down. This cycle will be repeated until the fault condition is removed.  
The OVP set point may be set at the factory to meet unique high  
voltage requirements.  
The current limit can be lowered by placing an external resistor  
between the IL and SG ports (see figure 18 for resistor values). With  
the IL port open-circuit, the current limit is preset to be within the  
range specified in the output specifications table on Page 4.  
PRM output power versus VTM output power  
100.00  
10.00  
1.00  
As shown in Figure 17, the P048F048T24AL is rated to deliver 5 A  
maximum, when it is delivering an output voltage in the range from  
26 V to 48 V, and 240 W, maximum, when delivering an output  
voltage in the range from 48 V to 55 V. When configuring a PRM for  
use with a specific VTM, refer to the appropriate VTM data sheet. The  
VTM input power can be calculated by dividing the VTM output power  
by the VTM efficiency (available from the VTM data sheet). The input  
power required by the VTM should not exceed the output power  
rating of the PRM.  
1
2
3
4
5
Desired PRM Output Current Limit (A)  
5.1  
5.0  
4.9  
4.8  
4.7  
Figure 18 — Calculated external resistor value for adjusting current limit,  
actual value may vary.  
Safe Operating Area  
4.6  
Input fuse recommendations  
4.5  
4.4  
4.3  
A fuse should be incorporated at the input to the PRM, in series with  
the +IN port. A fast acting fuse, NANO2 FUSE 451/453 Series 10 A  
125 V, or equivalent, may be required to meet certain safety agency  
Conditions of Acceptability. Always ascertain and observe the safety,  
regulatory, or other agency specifications that apply to your specific  
application.  
~
~
20  
0
22 24 26  
28  
30  
32  
34  
36  
38  
40  
42  
44  
46  
48  
50  
52 54 56 58 60  
Factorized Bus Voltage (Vf)  
Product safety considerations  
Figure 17 — P048K048T24AL rating based on Factorized Bus voltage  
If the input of the PRM is connected to SELV or ELV circuits, the output  
of the PRM can be considered SELV or ELV respectively.  
If the input of the PRM is connected to a centralized DC power system  
where the working or float voltage is above SELV, but less than or  
equal to 75 V, the input and output voltage of the PRM should be  
classified as a TNV-2 circuit and spaced 1.3 mm from SELV circuitry or  
accessible conductive parts according to the requirements of UL60950,  
CSA 22.2 60950, EN60950, and IEC60950.  
The Factorized Bus voltage should not exceed an absolute limit of  
55 V, including steady state, ripple and transient conditions. Exceeding  
this limit may cause the internal OVP set point to be exceeded.  
Parallel considerations  
The PR port is used to connect two or more PRMs in parallel to form a  
higher power array. When configuring arrays, PR port interconnection  
bypass capacitance must be used at ~1nF per PRM. Additionally one  
PRM should be designated as the master while all other PRMs are set  
as slaves by shorting their SC pin to SG. The PC pins must be directly  
connected (no diodes) to assure a uniform start up sequence. The  
factorized bus should be connected in parallel as well.  
Applications assistance  
Please contact Vicor Applications Engineering for assistance,  
1-800-927-9474, or email at apps@vicr.com.  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 10 of 14  
PRELIMINARY  
(continued)  
V•I Chip Pre-Regulator Module  
Mechanical Specifications  
6,2  
0.25  
3,01  
0.118  
15,99  
0.630  
3,01  
0.118  
22,0  
0.87  
1,10  
(12) X  
0.043  
30,00  
1.181  
(2) X  
28,00  
(2) X  
1.102  
26,00  
1.024  
24,00  
(2) X  
32,0  
1.26  
(2) X  
0.945  
C
L
22,00  
0.866  
(2) X  
20,00  
0.787  
(2) X  
15,55  
0.612  
10,00  
0.394  
8,10  
0.319  
(2) X  
(4) X  
0,45  
0.020  
C
L
TOP VIEW (COMPONENT SIDE)  
BOTTOM VIEW  
NOTES:  
1- DIMENSIONS ARE  
mm  
inch  
.
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:  
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]  
3- PRODUCT MARKING ON TOP SURFACE  
DXF and PDF files are available on vicorpower.com  
Figure 19PRM J-Lead mechanical outline  
3,26  
0.128  
15,74  
0.620  
3,26  
0.128  
1,38  
0.054  
0,51  
0.020  
TYP  
TYP  
1,48  
0.058  
(24) X  
30,00  
1.181  
(4) X  
26,00  
28,00  
1.102  
(4) X  
(4) X  
1.024  
24,00  
(4) X  
22,00  
0.866  
0.945  
(4) X  
20,00  
0.787  
(4) X  
15,96  
0.628  
10,00  
0.394  
8,48  
(4) X  
(8) X  
0.334  
NOTES:  
1- DIMENSIONS ARE  
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:  
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]  
mm  
inch  
RECOMMENDED LAND PATTERN  
(COMPONENT SIDE SHOW)  
.
DXF and PDF files are available on vicorpower.com  
Figure 20— PRM J-Lead PCB land layout information  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 11 of 14  
PRELIMINARY  
V•I Chip Pre-Regulator Module  
Configuration Options  
Standard(1)  
(Figure 21)  
Standard with 0.25"  
Heat Sink(2)  
Configuration  
Effective power density  
875 W/in3  
437 W/in3  
Effective Junction-Board  
thermal resistanc  
2.4 °C/W  
2.4 °C/W  
Effective Junction-Case  
thermal resistance  
1.1 °C/W  
6.8 °C/W  
N/A  
Effective Junction-Ambient  
thermal resistance 300LFM  
5.0 °C/W  
Note:  
(1) Surface mounted to a 2" x 2" FR4 board, 4 layers 2 oz Cu  
(2) Heat sink available as a separate item  
22.0  
0.87  
32.0  
1.26  
6.3  
0.25  
STANDARD MOUNT  
Figure 21—Standard mounting – package F  
Thermal  
mm  
in  
Figure 22—Hole location for push pin heatsink relative to VIC  
Symbol  
Parameter  
Min  
Typ  
130  
0.61  
1.1  
Max  
Unit  
°C  
Note  
Over temperature shutdown  
Thermal capacity  
125  
135  
Junction temperature  
Ws/°C  
°C/W  
°C/W  
°C/W  
°C/W  
RθJC  
RθJB  
RθJA  
RθJA  
Junction-to-case thermal impedance  
Junction-to-board thermal impedance  
Junction-to-ambient(1)  
2.1  
6.5  
Junction-to-ambient(2)  
5.0  
Notes:  
(1) P048F048T24AL surface mounted to a 2" x 2" FR4 board, 4 layers 2 oz Cu, 300 LFM.  
(2) P048F048T24AL with a 0.25"H heatsink surface mounted on FR4 board, 300 LFM.  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 12 of 14  
PRELIMINARY  
V•I Chip Pre-Regulator Module  
Application Information  
V•I Chip soldering recommendations  
Removal and rework  
V•I Chip modules are intended for reflow soldering processes. The  
following information defines the processing conditions required for  
successful attachment of a V•I Chip to a PCB. Failure to follow the  
recommendations provided can result in aesthetic or functional failure  
of the module.  
V•I Chip modules can be removed from PCBs using special tools such  
as those made by Air-Vac. These tools heat a very localized region of  
the board with a hot gas while applying a tensile force to the  
component (using vacuum). Prior to component heating and removal,  
the entire board should be heated to 80-100ºC to decrease the  
component heating time as well as local PCB warping. If there are  
adjacent moisture-sensitive components, a 125ºC bake should be used  
prior to component removal to prevent popcorning. V•I Chip modules  
should not be expected to survive a removal operation.  
Storage  
V•I Chip modules are currently rated at MSL 5. Exposure to ambient  
conditions for more than 48 hours requires a 24 hour bake at 125ºC  
to remove moisture from the package.  
239  
Solder paste stencil design  
Joint Temperature, 220ºC  
Case Temperature, 208ºC  
Solder paste is recommended for a number of reasons, including  
overcoming minor solder sphere co-planarity issues as well as simpler  
integration into overall SMD process.  
183  
165  
63/37 SnPb, either no-clean or water-washable, solder paste should be  
used. Pb-free development is underway.  
degC  
The recommended stencil thickness is 6 mils. The apertures should be  
20 mils in diameter for the Inboard (BGA) application and 0.9-0.9:1 for  
the Onboard (J-Leaded).  
91  
Pick and place  
16  
Modules should be placed within 5 mils.to maintain placement  
position, the modules should not be subjected to acceleration greater  
than 500 in/sec2 prior to reflow.  
Soldering Time  
Figure 22—Thermal profile diagram  
Reflow  
There are two temperatures critical to the reflow process; the solder  
joint temperature and the modules case temperature. The solder joints  
temperature should reach at least 220ºC, with a time above liquidus  
(183ºC) of ~30 seconds.  
The modules case temperature must not exceed 208 ºC at anytime  
during reflow.  
Because of the ΔT needed between the pin and the case, a forced-air  
convection oven is preferred for reflow soldering. This reflow method  
generally transfers heat from the PCB to the solder joint. The modules  
large mass also reduces its temperature rise. Care should be taken to  
prevent smaller devices from excessive temperatures. Reflow of  
modules onto a PCB using Air-Vac-type equipment is not recommended  
due to the high temperature the module will experience.  
Inspection  
The solder joints should conform to IPC 12.2  
• Properly wetted fillet must be evident.  
• Heel fillet height must exceed lead thickness plus solder thickness.  
Figure 23— Properly reflowed V•I Chip J-Lead  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
Page 13 of 14  
Warranty  
Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in  
normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper application  
or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended to the original  
purchaser only.  
EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING, BUT  
NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.  
Vicor will repair or replace defective products in accordance with its own best judgement. For service under this warranty,  
the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions.  
Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in  
returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms  
of this warranty.  
Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is  
assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve  
reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or  
circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not  
recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten  
life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes  
all risks of such use and indemnifies Vicor against all damages.  
Vicor’s comprehensive line of power solutions includes high density AC-DC  
and DC-DC modules and accessory components, fully configurable AC-DC  
and DC-DC power supplies, and complete custom power systems.  
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor  
for its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a  
failure or malfunction could result in injury or death. All sales are subject to Vicors Terms and Conditions of Sale,  
which are available upon request.  
Specifications are subject to change without notice.  
Intellectual Property Notice  
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending  
patent applications) relating to the products described in this data sheet. Interested parties should contact  
Vicor's Intellectual Property Department.  
Vicor Corporation  
25 Frontage Road  
Andover, MA, USA 01810  
Tel: 800-735-6200  
Fax: 978-475-6715  
email  
Vicor Express: vicorexp@vicr.com  
Technical Support: apps@vicr.com  
vicorpower.com  
800-735-6200  
V•I Chip Pre-Regulator Module  
P048F048T24AL  
Rev. 1.7  
11/05  

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