DG200A [VISHAY]
Monolithic Dual SPST CMOS Analog Switch; 单片双通道SPST CMOS模拟开关
| 型号： | DG200A |
| 厂家： | 
VISHAY |
| 描述： | Monolithic Dual SPST CMOS Analog Switch |
| 文件： | 总5页 (文件大小：44K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DG200A_MIL
Vishay Siliconix
Monolithic Dual SPST CMOS Analog Switch
FEATURES
BENEFITS
APPLICATIONS
D "15 V Input Signal Range
D 44-V Maximum Supply Ranges
D On-Resistance: 45 W
D Wide Dynamic Range
D Simple Interfacing
D Servo Control Switching
D Programmable Gain Amplifiers
D Audio Switching
D Reduced External Component
Count
D TTL and CMOS Compatibility
D Programmable Filters
DESCRIPTION
The DG200A_MIL is a dual, single-pole, single-throw analog
switch designed to provide general purpose switching of
analog signals. This device is ideally suited for designs
requiring a wide analog voltage range coupled with low
on-resistance.
Each switch conducts equally well in both directions when on,
and blocks up to 30 V peak-to-peak when off. In the on
condition, this bi-directional switch introduces no offset
voltage of its own.
The DG200A_MIL is designed on Vishay Siliconix’ improved
PLUS-40 CMOS process. An epitaxial layer prevents latchup.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
Dual-In-Line
Metal Can
V+ (Substrate and Case)
IN
IN
1
2
1
2
3
4
5
6
7
14
13
12
11
10
9
NC
GND
NC
NC
IN
S
1
1
10
V+ Substrate
NC
1
4
9
6
IN
D
2
1
2
3
8
S
2
D
2
S
1
7
NC
GND
D
1
V–
NC
5
8
S
V–
2
D
2
Top View
Top View
TRUTH TABLE
Logic
Switch
0
ON
1
OFF
Logic “0” v 0.8 V
Logic “1” w 2.4 V
Document Number: 70035
S-02314—Rev. E, 05-Oct-00
www.vishay.com
4-1
DG200A_MIL
Vishay Siliconix
ORDERING INFORMATION
Temp Range
Package
Part Number
DG200AAK
14-Pin CerDIP
DG200AAK/883, JM38510/12301BCA,
5962-9562901QCA
–55 to 125_C
DG200AAA
10-Pin Metal Can
14-Pin Sidebraze
DG200AAA/883, JM38510/12301BIC
JM38510/12301BCC
ABSOLUTE MAXIMUM RATINGS
b
V+ to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V
Power Dissipation (Package)
c
10-Pin Metal Can . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
14-Pin CerDIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 825 mW
GND to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
d
a
Digital Inputs , V , V . . . . . . . . . . . . . . . . . . . . . . . . (V–) –2 V to (V+) +2 V or
S
D
30 mA, whichever occurs first
Notes:
Current (Any Terminal) Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
a. Signals on S , D , or IN exceeding V+ or V– will be clamped by internal
X
X
X
diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mW/_C above 75_C
Current S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 150_C
d. Derate 11 mW/_C above 75_C
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
S
V–
–
+
V+
GND
IN
X
D
V–
FIGURE 1.
Document Number: 70035
S-02314—Rev. E, 05-Oct-00
www.vishay.com
4-2
DG200A_MIL
Vishay Siliconix
a
SPECIFICATIONS
Limits
Test Conditions
–55 to 125_C
Unless Otherwise Specified
V+ = 15 V, V– = –15 V
f
Parameter
Symbol
Tempb
Minc
Typd
Maxc
Unit
V
= 2.4 V, 0.8 V
IN
Analog Switch
e
Analog Signal Range
V
Full
–15
15
V
ANALOG
Drain-Source
On-Resistance
Room
Full
45
70
100
r
V
= "10 V, I = –1 mA
W
DS(on)
D
S
Source Off
Leakage Current
Room
Full
–2
–100
2
100
I
V
= "14 V, V = #14 V
"0.01
"0.01
"0.1
S(off)
S
D
D
Drain Off
Leakage Current
Room
Full
–2
–100
2
100
I
V
= "14 V, V = #14 V
nA
D(off)
S
Channel On
Leakage Current
Room
Full
–2
–200
2
200
I
V = V = "14 V
S D
D(on)
f
Digital Control
Room
Full
–0.5
–1
0.0009
0.005
V
= 2.4 V
= 15 V
IN
Input Current with
Input Voltage High
I
INH
Room
Full
0.5
1
V
mA
IN
Input Current with
Input Voltage Low
Room
Full
–0.5
–1
–0.0015
I
V
= 0 V
IN
INL
Dynamic Characteristics
Turn-On Time
Turn-Off Time
t
Room
Room
440
340
1000
425
ON
See Switching Time Test Circuit
= 1000 pF, V = 0 V
ns
t
OFF
Q
C
L
g
Charge Injection
Room
–10
pC
R
g
= 0 W
Source-Off Capacitance
Drain-Off Capacitance
C
C
V
V
= 0 V
= 0 V
Room
Room
9
9
S(off)
S
f = 140 kHz
= 5 V
V
IN
D(off)
D
pF
dB
C
D(on)
+
Channel-On Capacitance
Off Isolation
V
= V = 0 V, V = 0 V
Room
Room
Room
25
75
90
D
S
IN
C
S(On)
OIRR
V
= 5 V, R = 75 W
= 2 V, f = 1 MHz
IN
L
Crosstalk
(Channel-to-Channel)
V
S
X
TALK
Power Supplies
Positive Supply Current
Negative Supply Current
I+
Room
Room
0.8
2
Both Channels On or Off
= 0 V and 2.4 V
mA
V
IN
I–
–1
–0.23
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is aminimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f.
V
= input voltage to perform proper function.
IN
Document Number: 70035
S-02314—Rev. E, 05-Oct-00
www.vishay.com
4-3
DG200A_MIL
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
r
vs. V and Power Supply Voltage
Leakage Currents vs. Analog Voltage
DS(on)
D
+6
0
A: "5 V
B: "10 V
C: "12 V
D: "15 V
E: "20 V
T
A
= 25_C
120
100
80
I
or I
S(off)
D(off)
A
I
–6
D(on)
B
–12
–18
–24
60
C
D
E
40
20
–15 –12 –9 –6 –3
0
3
6
9
12 15
–15 –12 –9 –6 –3
0
3
6
9
12 15
V
– Drain Voltage (V)
V
ANALOG
– Analog Voltage (V)
D
Input Switching Threshold vs. V+ and V– Supply Voltages
Supply Currents vs. Toggle Frequency
2.5
V+ = 15 V
V– = –15 V
Both logic inputs
toggled simutaneously
6
5
4
3
2
1
0
2.0
1.5
1.0
0.5
0
I+
I–
"5
"10
"15
"20
0
1 k
10 k
100 k
1 M
V+, V– Positive and Negative Supplies (V)
Toggle Frequency (Hz)
Document Number: 70035
S-02314—Rev. E, 05-Oct-00
www.vishay.com
4-4
DG200A_MIL
Vishay Siliconix
TEST CIRCUITS
V
O
is the steady state output with switch on. Feedthrough via gate capacitance may result in spikes at leading and trailing edge of output waveform.
+15 V
3 V
0 V
V+
Logic
Input
t <20 ns
t <20 ns
f
50%
r
S
D
V
= +5 V
3 V
S
V
O
t
IN
OFF
Switch
Input
V
S
C
L
35 pF
R
1 kW
L
V–
GND
90%
Switch
Output
V
O
t
ON
–15 V
= V
R
L
V
O
S
R
L
+ r
DS(on)
FIGURE 2. Switching Time
+15 V
DV
O
V
O
V+
R
g
S
D
V
O
C
IN
L
V
g
ON
OFF
ON
IN
X
1000 pF
3 V
V–
GND
DV = measured voltage error due to charge injection
O
The charge injection in coulombs is DQ = C x DV
L
O
–15 V
FIGURE 3. Charge Injection
+15 V
C
+15 V
V+
V+
C
S
D
D
V
S
1
1
R
g
= 50 W
50 W
V
IN
O
1
S
D
V
S
0V
R
g
= 50 W
V
O
R
L
S
2
2
R
L
NC
IN
5 V
IN
2
0V
GND
V–
C
GND
V–
C
–15 V
–15 V
V
V
S
Off Isolation = 20 log
V
S
X
= 20 log
O
TALK
V
O
C = RF bypass
FIGURE 4. Off Isolation
FIGURE 5. Channel-to-Channel Crosstalk
Document Number: 70035
S-02314—Rev. E, 05-Oct-00
www.vishay.com
4-5
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