DG9431E [VISHAY]
The DG9431E is a monolithic CMOS switch designed for precision signal switching;
| 型号： | DG9431E |
| 厂家： | 
VISHAY |
| 描述： | The DG9431E is a monolithic CMOS switch designed for precision signal switching |
| 文件： | 总14页 (文件大小：316K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DG9431E
Vishay Siliconix
www.vishay.com
1 pC Charge Injection, 100 pA Maximum Leakage, +5 V / +3 V,
SPDT Analog Switch
DESCRIPTION
FEATURES
The DG9431E is a monolithic CMOS switch designed for
precision signal switching. The 17 low voltage part
exhibits low charge injection over the full signal range, low
leakage, low parasitic capacitance, and fast switching.
• 1 pC charge injection
• Guaranteed 100 pA max. switch on leakage at
25 °C
Available
Available
• 3.8 pF switch off and 7.8 pF switch on
capacitances
The DG9431E can switch both analog and digital signals.
Each switch conducts equally well in both directions when
on, and blocks up to the power supply level when off.
Break-before-make switching is guaranteed.
• +2.7 V to +5 V single supply operation
• Low on-resistance - RDS(on): 17 (typ.) at 5 V
• tON: 32 ns, tOFF: 10 ns switching time
• Typical power consumption: 1 nW
• Over voltage tolerance on logic control IN pin
• TTL / CMOS compatible
The DG9431E offers 1 nW typical power consumption and
8 kV ESD (HBM), 1 kV ESD (CDM) tolerance. It is ideal for
use in low voltage instruments and healthcare devices,
fitting the circuits of low voltage ADC and DAC, sample and
hold, analog front end gain control, and signal path
switching. The DG9431E is available in 6-lead TSOP and
8-lead SOIC packages.
• ESD (HBM): > 8000 V, ESD (CDM): >1000 V
• Latch-up current: > 300 mA (JESD78)
• Available in TSOP-6 and SOIC-8
Note
APPLICATIONS
• Automatic test equipment
• Process control and automation
• Data acquisition systems
• Meters and instruments
• Medical and healthcare systems
• Communication systems
• Sample-and-hold systems
• Relay replacements
*
This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non-RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details.
BENEFITS
• Low charge injection and leakage
• Low parasitic capacitance
• Fast switching speed
• High ESD tolerance
• Battery powered systems
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
SOIC-8
TSOP-6
NO
COM
NC
V+
IN
*
1
2
3
4
8
7
6
5
TRUTH TABLE
IN
V+
NO
1
2
3
6
5
4
LOGIC
NC
ON
NO
OFF
ON
COM
NC
0
1
GND
GND
*
OFF
Top View
Note
Top View
•
Logic “0” 0.8 V
Logic “1” 2.4 V
*Not Connected
ORDERING INFORMATION
TEMP. RANGE
CONFIGURATION PART NUMBER
PACKAGE
MINIUM ORDER / PACKAGING QUANTITY
Tape and reel 3000 units
6-pin TSOP
DG9431EDV-T1-GE3
DG9431EDY-T1-GE3
DG9431EDY-GE3
-40 °C to +85 °C
DG9431E
Tape and reel 2500 units
8-pin SOIC
Tube 500 units
S16-2242–Rev. A, 31-Oct-16
Document Number: 76459
1
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG9431E
Vishay Siliconix
www.vishay.com
ABSOLUTE MAXIMUM RATINGS
PARAMETER
LIMIT
UNIT
Reference V+ to GND
IN, COM, NC, NO a
-0.3 to +6
V
-0.3 to (V+ + 0.3)
Continuous current (any terminal)
Peak current (pulsed at 1 ms, 10 % duty cycle)
ESD (HBM) (MIL-STD-883, method 3015)
ESD (CDM) (ANSI / ESDA / JEDEC® JS-002)
Latch up current, per JESD78
Storage temperature (D suffix)
20
40
mA
V
> 8000
> 1000
300
mA
°C
-65 to +125
400
8-pin narrow body SOIC c
6-pin TSOP d
Power dissipation (packages) b
mW
570
Notes
a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 6.5 mW/°C above 75 °C.
d. Derate 7 mW/°C above 70 °C.
SPECIFICATIONS (V+ = 3 V)
D SUFFIX
TEST CONDITIONS
PARAMETER
SYMBOL
UNLESS OTHERWISE SPECIFIED
TEMP. a
UNIT
V
-40 °C TO +85 °C
V+ = 3 V, 10 %, VIN = 0.8 V or 2.4 V e
MIN. c TYP. b MAX. c
Analog Switch
Analog signal range d
VANALOG
RDS(on)
Full
Room
Full
0
-
-
35
-
3
50
65
2
VNO or VNC = 1.5 V, V+ = 2.7 V
Drain-source on–resistance
I
COM = 5 mA
-
DS(on) match d
DS(on) flatness f
RDS(on)
VNO or VNC = 1.5 V
Room
-
0.4
R
RDS(on)
flatness
R
VNO or VNC = 1 V and 2 V
Room
-
4
8
Room
Full
-100
-5000
-100
5
-
100
5000
100
NO or NC off leakage current g INO/NC(off)
VNO or VNC = 1 V / 2 V, VCOM = 2 V / 1 V
VCOM = 1 V / 2 V, VNO or VNC = 2 V / 1 V
VCOM = VNO or VNC = 1 V / 2 V
Room
Full
5
-
COM off leakage current g
ICOM(off)
ICOM(on)
pA
-5000
-200
5000
200
Room
Full
5
-
Channel-on leakage current g
-10 000
10 000
Digital Control
Input current
I
INL or IINH
Full
-
0.001
-
μA
ns
Dynamic Characteristics
Room
Full
-
-
43
-
120
Turn-on time
Turn-Off Time
tON
200
VNO or VNC = 1.5 V
Room
Full
16
-
50
tOFF
-
3
-
-
-
-
-
120
Break-before-make time
Charge injection
td
Room
Room
Room
Room
Room
Room
26
-0.28
-80
-108
4
-
-
-
-
-
-
QINJ
CL = 1 nF, Vgen = 0 V, Rgen = 0
RL = 50 , CL = 5 pF, f = 1 MHz
pC
dB
Off-isolation
OIRR
XTALK
CS(off)
CD(on)
Crosstalk
Source off capacitance
Channel-on capacitance
Power Supply
f = 1 MHz
pF
8
Power supply range
Power supply current
V+
I+
2.7
-
-
5.5
1
V
V+ = 3.3 V, VIN = 0 V or 3.3 V
0.0003
μA
S16-2242–Rev. A, 31-Oct-16
Document Number: 76459
2
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG9431E
Vishay Siliconix
www.vishay.com
SPECIFICATIONS (V+ = 5 V)
D SUFFIX
TEST CONDITIONS
PARAMETER
SYMBOL
UNLESS OTHERWISE SPECIFIED
TEMP. a
UNIT
V
-40 °C to +85 °C
V+ = 5 V, 10 %, VIN = 0.8 V or 2.4 V e
MIN. c TYP. b MAX. c
Analog Switch
Analog signal range d
VANALOG
RDS(on)
Full
Room
Full
0
-
-
17
-
5
25
35
2
VNO or VNC = 3.5 V, V+ = 4.5 V
Drain-source on–resistance
ICOM = 5 mA
-
DS(on) match d
DS(on) flatness f
RDS(on)
VNO or VNC = 1.5 V
Room
-
0.4
R
RDS(on)
flatness
R
VNO or VNC = 1 V, 2 V, and 3 V
Room
-
3.5
6
Room
Full
-100
-5000
-100
10
-
100
5000
100
NO or NC off leakage current
COM off leakage current
INO/NC(off)
ICOM(off)
ICOM(on)
VNO or VNC = 1 V / 4 V, VCOM = 4 V / 1 V
VCOM = 1 V / 4 V, VNO or VNC = 4 V / 1 V
VCOM = VNO or VNC = 1 V / 4 V
Room
Full
10
-
pA
-5000
-200
5000
200
Room
Full
-
Channel-on leakage current
-10 000
-
10 000
Digital Control
Input current
I
INL or IINH
Full
-
0.001
-
μA
ns
Dynamic Characteristics
Room
Full
-
-
-
-
3
-
-
-
-
-
32
-
75
Turn-on time
Turn-off time
tON
150
VNO or VNC = 3 V
Room
Full
10
50
tOFF
-
100
Break-before-make time
Charge injection
td
Room
Room
Room
Room
Room
Room
22
-
-
-
-
-
-
QINJ
CL = 1 nF, Vgen = 0 V, Rgen = 0
RL = 50 , CL = 5 pF, f = 1 MHz
-0.78
-80
-108
3.8
7.8
pC
dB
Off-isolation
OIRR
XTALK
C(off)
CD(on)
Crosstalk
NC and NO capacitance
Channel-on capacitance
Power Supply
f = 1 MHz
pF
Power supply range
Power supply current
V+
I+
2.7
-
-
5.5
1
V
V+ = 5.5 V, VIN = 0 V or 5.5 V
0.0004
μA
Notes
a. Room = 25 °C, Full = as determined by the operating suffix.
b. Typical values are for design aid only, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
d. Guarantee by design, nor subjected to production test.
e. VIN = input voltage to perform proper function.
f. Difference of min and max values.
g. Guaranteed by 5 V leakage testing, not production tested.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S16-2242–Rev. A, 31-Oct-16
Document Number: 76459
3
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG9431E
Vishay Siliconix
www.vishay.com
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
Axis Title
Axis Title
+85 °C
35
30
25
20
15
10
5
10000
1000
100
40
35
30
25
20
15
10
10000
V+ = 3 V
TA = 25 °C
NO/NC = 5 mA
INO/NC = 5 mA
I
1000
100
10
V+ = 3 V
+25 °C
-40 °C
2
V+ = 5 V
0
10
0
1
2
3
4
5
0
0.5
1
1.5
2.5
3
VCOM - Analog Voltage (V)
2nd line
VCOM - Analog Voltage (V)
2nd line
On-Resistance vs. Analog Voltage
On-Resistance vs. Analog Voltage
Axis Title
V+ = 5 V
Axis Title
30
25
20
15
10
5
10000
1000
100
100
50
10000
1000
100
ICOM(ON)
INO/NC(OFF)
INO/NC = 5 mA
+85 °C
0
-50
ICOM(OFF)
-100
-150
-200
-250
+25 °C
-40 °C
3
V+ = 5 V
4
0
10
10
0
1
2
4
5
0
1
2
3
5
VCOM - Analog Voltage (V)
2nd line
VCOM - Analog Voltage (V)
2nd line
On-Resistance vs. Analog Voltage
Leakage Current vs. Analog Voltage
Axis Title
40
35
30
25
20
15
150
100
50
10000
1000
100
ICOM(ON), VCOM = 4 V
V+ = 5 V
ICOM(OFF), VCOM = 4 V, VNO/NC = 1 V
INO/NC(OFF), VCOM = 1 V, VNO/NC = 4 V
0
-50
V+ = 5 V
10
5
-100
-150
-200
-250
ICOM(ON), VCOM = 1 V
0
ICOM(OFF), VCOM = 1 V, VNO/NC = 4 V
INO/NC(OFF), VCOM = 4 V, VNO/NC = 1 V
-5
V+ = 3 V
3
-10
10
0
1
2
4
5
-40
-20
0
20
40
60
80
100
VIN - Input Voltage (V)
Temperature (°C)
2nd line
2nd line
Leakage Current vs. Temperature
Supply Current vs. Input Voltage
S16-2242–Rev. A, 31-Oct-16
Document Number: 76459
4
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG9431E
Vishay Siliconix
www.vishay.com
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
Axis Title
Axis Title
60
50
40
30
20
10
0
10000
1000
100
80
70
60
50
40
30
20
10
0
10000
1000
V+ = 3 V, tON
V+ = 5 V, tON
tON
V+ = 3 V, tOFF
100
tOFF
V+ = 5 V, tOFF
40 60
10
10
-40
-20
0
20
80
100
2
2.5
3
3.5
4
4.5
5
Temperature (°C)
2nd line
V+ - Supply Voltage (V)
2nd line
Switching Time vs. Temperature
Switching Time vs. Supply Voltage
Axis Title
Axis Title
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
10000
1000
100
0
10000
1000
100
-10
-20
VIH = -40 °C
VIH = 25 °C
V+ = 5 V
-30
-40
-50
-60
VIL = 25 °C
VIL = 85 °C
-70
-80
-90
-100
10
-110
10
2
2.5
3
3.5
4
4.5
5
100K
1M
10M
100M
1G
V+ - Supply Voltage (V)
2nd line
Frequency (Hz)
2nd line
Switching Threshold vs. Supply Voltage
OIRR, Off Isolation vs. Frequency
Axis Title
Axis Title
10
10000
1000
100
0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
-0.9
-1.0
-1.1
-1.2
10000
1000
100
V+ = 5 V
9
8
7
6
5
4
3
2
1
0
CCOM(ON)
V+ = 3 V
CCOM(OFF)
CNO/NC(OFF)
V+ = 5 V
10
10
0
1
2
3
4
5
0
1
2
3
4
5
VNO/NC - Analog Voltage (V)
2nd line
VANALOG (V)
2nd line
Charge Injection vs. Analog Voltage
Capacitance
S16-2242–Rev. A, 31-Oct-16
Document Number: 76459
5
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG9431E
Vishay Siliconix
www.vishay.com
TEST CIRCUITS
V+
V+
3 V
0 V
t < 20 ns
r
t < 20 ns
f
Logic
Input
50 %
Switch Output
NO or NC
COM
Switch
Input
V
OUT
0.9 x V
OUT
IN
GND
Switch
Output
R
300
C
L
35 pF
L
0 V
Logic
Input
t
ON
t
OFF
0 V
Logic "1" = switch on
Logic input waveforms inverted for switches that have
the opposite logic sense.
C
L
(includes fixture and stray capacitance)
R
L
+ R
V
= V
COM
OUT
R
L
ON
Figure 1. Switching Time
V+
V+
Logic
Input
3 V
0 V
t < 5 ns
r
t < 5 ns
f
COM
NO
NC
V
O
V
NO
V
NC
R
300 Ω
C
L
35 pF
L
V
NC
= V
NO
IN
V
90 %
O
GND
Switch
Output
0 V
t
D
t
D
C
L
(includes fixture and stray capacitance)
Figure 2. Break-Before-Make Interval
V+
V+
V
OUT
R
gen
V
OUT
NC or NO
IN
COM
V
OUT
+
IN
V
gen
C
L
On
On
Off
Q = V
3 V
GND
x C
OUT
L
IN depends on switch configuration: input polarity
determined by sense of switch.
Figure 3. Charge Injection
S16-2242–Rev. A, 31-Oct-16
Document Number: 76459
6
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG9431E
Vishay Siliconix
www.vishay.com
TEST CIRCUITS
V+
V+
10 nF
COM
0 V, 2.4 V
IN
COM
NC or NO
V
NC/ NO
Off Isolation = 20 log
R
L
V
COM
GND
Analyzer
Figure 4. Off-Isolation
V+
10 nF
V+
COM
Meter
IN
HP4192A
Impedance
Analyzer
0 V, 2.4 V
or Equivalent
NC or NO
GND
f = 1 MHz
Figure 5. Channel Off/On Capacitance
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?76459.
S16-2242–Rev. A, 31-Oct-16
Document Number: 76459
7
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
SOIC (NARROW): 8-LEAD
JEDEC Part Number: MS-012
8
6
7
2
5
4
E
H
1
3
S
h x 45
D
C
0.25 mm (Gage Plane)
A
All Leads
0.101 mm
q
e
B
A
1
L
0.004"
MILLIMETERS
Max
INCHES
DIM
A
Min
Min
Max
1.35
0.10
0.35
0.19
4.80
3.80
1.75
0.20
0.51
0.25
5.00
4.00
0.053
0.004
0.014
0.0075
0.189
0.150
0.069
0.008
0.020
0.010
0.196
0.157
A1
B
C
D
E
e
1.27 BSC
0.050 BSC
H
h
5.80
0.25
0.50
0°
6.20
0.50
0.93
8°
0.228
0.010
0.020
0°
0.244
0.020
0.037
8°
L
q
S
0.44
0.64
0.018
0.026
ECN: C-06527-Rev. I, 11-Sep-06
DWG: 5498
Document Number: 71192
11-Sep-06
www.vishay.com
1
Package Information
Vishay Siliconix
TSOP: 5/6−LEAD
JEDEC Part Number: MO-193C
e1
e1
5
5
4
3
6
1
4
E
1
E
E
1
E
1
2
2
3
-B-
-B-
e
e
b
b
M
M
C
0.15
C
B
A
0.15
B A
5-LEAD TSOP
6-LEAD TSOP
4x
1
-A-
D
0.17 Ref
c
R
R
A
2
A
L
2
Gauge Plane
Seating Plane
Seating Plane
L
0.08
C
A
1
-C-
(L )
1
4x
1
MILLIMETERS
INCHES
Dim
A
A1
A2
b
c
D
E
E1
e
Min
Nom
-
Max
Min
0.036
0.0004
0.035
0.012
0.004
0.116
0.106
0.061
Nom
-
Max
0.91
0.01
0.90
0.30
0.10
2.95
2.70
1.55
1.10
0.10
1.00
0.45
0.20
3.10
2.98
1.70
0.043
0.004
0.039
0.018
0.008
0.122
0.117
0.067
-
-
-
0.32
0.15
3.05
2.85
1.65
0.95 BSC
1.90
-
0.038
0.013
0.006
0.120
0.112
0.065
0.0374 BSC
0.075
-
1.80
2.00
0.50
0.071
0.012
0.079
0.020
e1
L
0.32
0.60 Ref
0.25 BSC
-
0.024 Ref
0.010 BSC
-
L1
L2
R
0.10
0
-
0.004
0
-
4
8
4
8
7
Nom
7 Nom
1
ECN: C-06593-Rev. I, 18-Dec-06
DWG: 5540
Document Number: 71200
18-Dec-06
www.vishay.com
1
AN823
Vishay Siliconix
Mounting LITTLE FOOTR TSOP-6 Power MOSFETs
Surface mounted power MOSFET packaging has been based on
integrated circuit and small signal packages. Those packages
have been modified to provide the improvements in heat transfer
required by power MOSFETs. Leadframe materials and design,
molding compounds, and die attach materials have been
changed. What has remained the same is the footprint of the
packages.
Since surface mounted packages are small, and reflow soldering
is the most common form of soldering for surface mount
components, “thermal” connections from the planar copper to the
pads have not been used. Even if additional planar copper area is
used, there should be no problems in the soldering process. The
actual solder connections are defined by the solder mask
openings. By combining the basic footprint with the copper plane
on the drain pins, the solder mask generation occurs automatically.
The basis of the pad design for surface mounted power MOSFET
is the basic footprint for the package. For the TSOP-6 package
outline drawing see http://www.vishay.com/doc?71200 and see
http://www.vishay.com/doc?72610 for the minimum pad footprint.
In converting the footprint to the pad set for a power MOSFET, you
must remember that not only do you want to make electrical
connection to the package, but you must made thermal connection
and provide a means to draw heat from the package, and move it
away from the package.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low impedance
path for heat to move away from the device.
REFLOW SOLDERING
In the case of the TSOP-6 package, the electrical connections are
very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and
are connected together. For a small signal device or integrated
circuit, typical connections would be made with traces that are
0.020 inches wide. Since the drain pins serve the additional
function of providing the thermal connection to the package, this
level of connection is inadequate. The total cross section of the
copper may be adequate to carry the current required for the
application, but it presents a large thermal impedance. Also, heat
spreads in a circular fashion from the heat source. In this case the
drain pins are the heat sources when looking at heat spread on the
PC board.
Vishay Siliconix surface-mount packages meet solder reflow
reliability requirements. Devices are subjected to solder reflow as a
test preconditioning and are then reliability-tested using
temperature cycle, bias humidity, HAST, or pressure pot. The
solder reflow temperature profile used, and the temperatures and
time duration, are shown in Figures 2 and 3.
Figure 1 shows the copper spreading recommended footprint for
the TSOP-6 package. This pattern shows the starting point for
utilizing the board area available for the heat spreading copper. To
create this pattern, a plane of copper overlays the basic pattern on
pins 1,2,5, and 6. The copper plane connects the drain pins
electrically, but more importantly provides planar copper to draw
heat from the drain leads and start the process of spreading the
heat so it can be dissipated into the ambient air. Notice that the
planar copper is shaped like a “T” to move heat away from the
drain leads in all directions. This pattern uses all the available area
underneath the body for this purpose.
0.167
4.25
Ramp-Up Rate
+6_C/Second Maximum
120 Seconds Maximum
70 − 180 Seconds
240 +5/−0_C
0.074
1.875
Temperature @ 155 " 15_C
Temperature Above 180_C
Maximum Temperature
Time at Maximum Temperature
Ramp-Down Rate
0.014
0.35
0.122
3.1
0.026
0.65
20 − 40 Seconds
+6_C/Second Maximum
0.049
1.25
0.049
1.25
0.010
0.25
FIGURE 2. Solder Reflow Temperature Profile
FIGURE 1. Recommended Copper Spreading Footprint
Document Number: 71743
27-Feb-04
www.vishay.com
1
AN823
Vishay Siliconix
10 s (max)
255 − 260_C
1X4_C/s (max)
3-6_C/s (max)
217_C
140 − 170_C
60 s (max)
3_C/s (max)
60-120 s (min)
Reflow Zone
Pre-Heating Zone
Maximum peak temperature at 240_C is allowed.
FIGURE 3. Solder Reflow Temperature and Time Durations
THERMAL PERFORMANCE
On-Resistance vs. Junction Temperature
A basic measure of a device’s thermal performance is the
junction-to-case thermal resistance, Rqjc, or the
junction-to-foot thermal resistance, Rqjf. This parameter is
measured for the device mounted to an infinite heat sink and
is therefore a characterization of the device only, in other
words, independent of the properties of the object to which the
device is mounted. Table 1 shows the thermal performance
of the TSOP-6.
1.6
1.4
1.2
1.0
0.8
0.6
V
= 4.5 V
GS
I
D
= 6.1 A
TABLE 1.
Equivalent Steady State Performance—TSOP-6
Thermal Resistance Rq
30_C/W
jf
−50 −25
0
25
50
75
100 125 150
SYSTEM AND ELECTRICAL IMPACT OF
TSOP-6
T
− Junction Temperature (_C)
J
FIGURE 4. Si3434DV
In any design, one must take into account the change in
MOSFET rDS(on) with temperature (Figure 4).
Document Number: 71743
27-Feb-04
www.vishay.com
2
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR SO-8
0.172
(4.369)
0.028
(0.711)
0.022
0.050
(0.559)
(1.270)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
www.vishay.com
22
Document Number: 72606
Revision: 21-Jan-08
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR TSOP-6
0.099
(2.510)
0.039
0.020
0.019
(1.001)
(0.508)
(0.493)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
www.vishay.com
26
Document Number: 72610
Revision: 21-Jan-08
Legal Disclaimer Notice
www.vishay.com
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
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purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of
typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding
statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s
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including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
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Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
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© 2017 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 08-Feb-17
Document Number: 91000
1
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