IRFBC30AS_V01 [VISHAY]

Power MOSFET;
IRFBC30AS_V01
型号: IRFBC30AS_V01
厂家: VISHAY    VISHAY
描述:

Power MOSFET

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中文:  中文翻译
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IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL  
Vishay Siliconix  
Power MOSFET  
FEATURES  
Halogen-free According to IEC 61249-2-21  
Definition  
• Low Gate Charge Qg Results in Simple Drive  
Requirement  
• Improved Gate, Avalanche and Dynamic dV/dt  
Ruggedness  
PRODUCT SUMMARY  
VDS (V)  
DS(on) ()  
Qg (Max.) (nC)  
600  
R
VGS = 10 V  
2.2  
23  
5.4  
Q
Q
gs (nC)  
gd (nC)  
11  
• Fully Characterized Capacitance and Avalanche Voltage  
and Current  
• Effective Coss Specified  
Configuration  
Single  
D
I2PAK (TO-262)  
D2PAK (TO-263)  
• Compliant to RoHS Directive 2002/95/EC  
APPLICATIONS  
• Switch Mode Power Supply (SMPS)  
• Uninterruptible Power Supply  
• High Speed Power Switching  
G
G
D
S
S
N-Channel MOSFET  
TYPICAL SMPS TOPOLOGIES  
• Single Transistor Flyback  
ORDERING INFORMATION  
Package  
D2PAK (TO-263)  
D2PAK (TO-263)  
D2PAK (TO-263)  
I2PAK (TO-262)  
SiHFBC30AL-GE3  
IRFBC30ALPbF  
SiHFBC30AL-E3  
Lead (Pb)-free and Halogen-free  
SiHFBC30AS-GE3  
IRFBC30ASPbF  
SiHFBC30AS-E3  
SiHFBC30ASTRL-GE3a  
IRFBC30ASTRLPbFa  
SiHFBC30ASTL-E3a  
SiHFBC30ASTRR-GE3a  
IRFBC30ASTRRPbFa  
SiHFBC30ASTR-E3a  
Lead (Pb)-free  
Note  
a. See device orientation.  
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
LIMIT  
UNIT  
Drain-Source Voltage  
Gate-Source Voltage  
VDS  
600  
V
VGS  
30  
T
C = 25 °C  
3.6  
2.3  
Continuous Drain Current  
VGS at 10 V  
ID  
TC = 100 °C  
A
Pulsed Drain Currenta, e  
IDM  
14  
Linear Derating Factor  
0.69  
290  
W/°C  
mJ  
A
Single Pulse Avalanche Energyb  
Avalanche Currenta  
EAS  
IAR  
3.6  
Repetiitive Avalanche Energya  
EAR  
7.4  
mJ  
W
Maximum Power Dissipation  
TC = 25 °C  
PD  
74  
Peak Diode Recovery dV/dtc, e  
Operating Junction and Storage Temperature Range  
Soldering Recommendations (Peak Temperature)  
dV/dt  
TJ, Tstg  
7.0  
V/ns  
- 55 to + 150  
300d  
°C  
for 10 s  
Notes  
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).  
b. Starting TJ = 25 °C, L = 46 mH, Rg = 25 , IAS = 3.6 A (see fig. 12).  
c. ISD 3.6 A, dI/dt 170 A/μs, VDD VDS, TJ 150 °C.  
d. 1.6 mm from case.  
e. Uses IRFBC30A/SiHFBC30A data and test conditions.  
* Pb containing terminations are not RoHS compliant, exemptions may apply  
Document Number: 91109  
S11-1052-Rev. C, 30-May-11  
www.vishay.com  
1
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL  
Vishay Siliconix  
THERMAL RESISTANCE RATINGS  
PARAMETER  
SYMBOL  
TYP.  
MAX.  
40  
UNIT  
Maximum Junction-to-Ambient (PCB  
Mounted, steady-state)a  
RthJA  
-
-
°C/W  
Maximum Junction-to-Case (Drain)  
RthJC  
1.7  
Note  
a. When mounted on 1" square PCB (FR-4 or G-10 material).  
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN.  
TYP.  
MAX. UNIT  
Static  
Drain-Source Breakdown Voltage  
VDS  
VDS/TJ  
VGS(th)  
IGSS  
VGS = 0, ID = 250 μA  
Reference to 25 °C, ID = 1 mAd  
VDS = VGS, ID = 250 μA  
600  
-
-
-
V
V/°C  
V
VDS Temperature Coefficient  
-
2.0  
-
0.67  
Gate-Source Threshold Voltage  
Gate-Source Leakage  
-
-
-
-
-
-
4.5  
100  
25  
250  
2.2  
-
VGS  
VDS = 600 V, VGS = 0 V  
DS = 480 V, VGS = 0 V, TJ = 125 °C  
VGS = 10 V  
ID = 2.2 Ab  
VDS = 50 V, ID = 2.2 A  
=
30 V  
nA  
-
Zero Gate Voltage Drain Current  
IDSS  
μA  
V
-
Drain-Source On-State Resistance  
Forward Transconductance  
Dynamic  
RDS(on)  
gfs  
-
2.1  
S
Input Capacitance  
Ciss  
Coss  
Crss  
-
-
-
-
-
-
-
-
-
-
-
-
-
510  
70  
3.5  
730  
19  
31  
-
-
-
VGS = 0 V,  
DS = 25 V,  
f = 1.0 MHz, see fig. 5  
Output Capacitance  
V
Reverse Transfer Capacitance  
-
pF  
V
DS = 1.0 V, f = 1.0 MHz  
-
Output Capacitance  
Coss  
V
GS = 0 V  
VDS = 480 V, f = 1.0 MHz  
VDS = 0 V to 480 Vc  
-
Effective Output Capacitance  
Total Gate Charge  
C
oss eff.  
Qg  
-
23  
5.4  
11  
-
ID = 3.6 A, VDS = 480 V,  
see fig. 6 and 13b  
Gate-Source Charge  
Gate-Drain Charge  
Qgs  
Qgd  
td(on)  
tr  
V
GS = 10 V  
-
nC  
ns  
-
Turn-On Delay Time  
Rise Time  
9.8  
13  
19  
12  
-
V
DD = 300 V, ID = 3.6 A,  
Rg = 12 , RD = 82 , see fig. 10b, d  
Turn-Off Delay Time  
Fall Time  
td(off)  
tf  
-
-
Drain-Source Body Diode Characteristics  
D
MOSFET symbol  
showing the  
integral reverse  
p - n junction diode  
Continuous Source-Drain Diode Current  
Pulsed Diode Forward Currenta  
IS  
-
-
-
-
3.6  
14  
A
G
ISM  
S
Body Diode Voltage  
VSD  
trr  
TJ = 25 °C, IS = 3.6 A, VGS = 0 Vb  
TJ = 25 °C, IF = 3.6 A, dI/dt = 100 A/μsb,  
-
-
-
-
1.6  
600  
1.7  
V
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
Forward Turn-On Time  
400  
1.1  
ns  
μC  
Qrr  
ton  
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)  
Notes  
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).  
b. Pulse width 300 μs; duty cycle 2 %.  
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS  
d. Uses IRFBC30A/SiHFBC30A data and test conditions.  
.
www.vishay.com  
2
Document Number: 91109  
S11-1052-Rev. C, 30-May-11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL  
Vishay Siliconix  
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)  
100  
100  
10  
VGS  
15V  
TOP  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
10  
BOTTOM 4.5V  
°
T = 150 C  
J
1
1
°
T = 25 C  
J
0.1  
0.1  
4.5V  
20µs PULSE WIDTH  
V
= 50V  
DS  
20µs PULSE WIDTH  
°
T = 25 C  
J
0.01  
0.01  
0.1  
1
10  
100  
4.0  
5.0  
6.0  
7.0 8.0  
9.0  
V
, Gate-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
GS  
Fig. 3 - Typical Transfer Characteristics  
Fig. 1 - Typical Output Characteristics  
10  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
VGS  
3.6A  
=
I
D
TOP  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
BOTTOM 4.5V  
1
4.5V  
20µs PULSE WIDTH  
°
T = 150 C  
J
V
=10V  
GS  
0.1  
0.1  
-60 -40 -20  
0
20 40 60 80 100 120 140 160  
°
1
10  
100  
T , Junction Temperature ( C)  
V
, Drain-to-Source Voltage (V)  
J
DS  
Fig. 2 - Typical Output Characteristics  
Fig. 4 - Normalized On-Resistance vs. Temperature  
Document Number: 91109  
S11-1052-Rev. C, 30-May-11  
www.vishay.com  
3
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL  
Vishay Siliconix  
100  
10000  
V
C
= 0V,  
f = 1 MHZ  
GS  
= C + C  
,
C
SHORTED  
iss  
gs  
gd  
ds  
C
= C  
rss  
gd  
C
= C + C  
oss  
ds  
gd  
1000  
100  
10  
10  
Ciss  
°
T = 150 C  
J
Coss  
Crss  
°
T = 25 C  
J
1
V
= 0 V  
GS  
1
0.1  
0.4  
0.6  
0.8  
1.0  
1.2  
1
10  
100  
1000  
V
,Source-to-Drain Voltage (V)  
SD  
V
, Drain-to-Source Voltage (V)  
DS  
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage  
Fig. 7 - Typical Source-Drain Diode Forward Voltage  
20  
100  
I
D
= 3.6A  
OPERATION IN THIS AREA LIMITED  
BY R  
DS(on)  
V
V
V
= 480V  
= 300V  
= 120V  
DS  
DS  
DS  
16  
12  
8
10us  
10  
100us  
1
1ms  
4
10ms  
°
T = 25 C  
C
°
T = 150 C  
Single Pulse  
J
FOR TEST CIRCUIT  
SEE FIGURE 13  
0.1  
0
10  
100  
1000  
10000  
0
4
8
12  
16 20  
24  
V
, Drain-to-Source Voltage (V)  
Q , Total Gate Charge (nC)  
DS  
G
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage  
Fig. 8 - Maximum Safe Operating Area  
www.vishay.com  
4
Document Number: 91109  
S11-1052-Rev. C, 30-May-11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL  
Vishay Siliconix  
RD  
VDS  
4.0  
3.0  
2.0  
1.0  
0.0  
VGS  
D.U.T.  
Rg  
+
V
-
DD  
10 V  
Pulse width 1 µs  
Duty factor 0.1 %  
Fig. 10a - Switching Time Test Circuit  
VDS  
90 %  
10 %  
VGS  
25  
50  
75  
100  
125  
°
150  
T , Case Temperature ( C)  
C
td(on) tr  
td(off) tf  
Fig. 9 - Maximum Drain Current vs. Case Temperature  
Fig. 10b - Switching Time Waveforms  
10  
1
D = 0.50  
0.20  
0.10  
0.05  
P
2
DM  
0.1  
t
1
0.02  
0.01  
t
SINGLE PULSE  
(THERMAL RESPONSE)  
2
Notes:  
1. Duty factor D =  
t / t  
1
2. Peak T =P  
x Z  
+ T  
C
J
DM  
thJC  
0.01  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
t , Rectangular Pulse Duration (sec)  
1
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case  
VDS  
15 V  
tp  
Driver  
L
VDS  
Rg  
D.U.T.  
IAS  
+
-
V
A
DD  
IAS  
20 V  
0.01 Ω  
tp  
Fig. 12b - Unclamped Inductive Waveforms  
www.vishay.com  
Fig. 12a - Unclamped Inductive Test Circuit  
Document Number: 91109  
S11-1052-Rev. C, 30-May-11  
5
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL  
Vishay Siliconix  
740  
720  
700  
680  
660  
640  
400  
300  
200  
100  
0
I
D
TOP  
1.6A  
2.3A  
BOTTOM 3.6A  
0.0  
1.0  
AV  
2.0  
3.0  
4.0  
25  
50  
75  
100  
125  
150  
I
, Avalanche Current ( A)  
°
Starting T , Junction Temperature ( C)  
J
Fig. 12d - Typical Drain-to-Source Voltage vs.  
Avalanache Current  
Fig. 12c - Maximum Avalanche Energy vs. Drain Current  
Current regulator  
Same type as D.U.T.  
50 kΩ  
QG  
VGS  
12 V  
0.2 µF  
0.3 µF  
QGS  
QGD  
+
-
VDS  
D.U.T.  
VG  
VGS  
3 mA  
Charge  
IG  
ID  
Current sampling resistors  
Fig. 13b - Gate Charge Test Circuit  
Fig. 13a - Basic Gate Charge Waveform  
www.vishay.com  
6
Document Number: 91109  
S11-1052-Rev. C, 30-May-11  
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL  
Vishay Siliconix  
Peak Diode Recovery dV/dt Test Circuit  
+
Circuit layout considerations  
Low stray inductance  
Ground plane  
D.U.T.  
Low leakage inductance  
current transformer  
-
+
-
-
+
Rg  
dV/dt controlled by Rg  
Driver same type as D.U.T.  
ISD controlled by duty factor “D”  
D.U.T. - device under test  
+
-
VDD  
Driver gate drive  
P.W.  
P.W.  
D =  
Period  
Period  
VGS = 10 Va  
D.U.T. lSD waveform  
D.U.T. VDS waveform  
Reverse  
recovery  
current  
Body diode forward  
current  
dI/dt  
Diode recovery  
dV/dt  
VDD  
Re-applied  
voltage  
Body diode forward drop  
Inductor current  
ISD  
Ripple 5 %  
Note  
a. VGS = 5 V for logic level devices  
Fig. 14 - For N-Channel  
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon  
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and  
reliability data, see www.vishay.com/ppg?91109.  
Document Number: 91109  
S11-1052-Rev. C, 30-May-11  
www.vishay.com  
7
This document is subject to change without notice.  
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Package Information  
www.vishay.com  
Vishay Siliconix  
TO-220AB  
MILLIMETERS  
MIN.  
INCHES  
MIN.  
A
E
DIM.  
MAX.  
4.65  
1.01  
1.73  
0.61  
15.49  
12.70  
10.51  
2.67  
5.28  
1.40  
6.48  
2.92  
14.02  
3.82  
3.94  
3.00  
MAX.  
0.183  
0.040  
0.068  
0.024  
0.610  
0.500  
0.414  
0.105  
0.208  
0.055  
0.255  
0.115  
0.552  
0.150  
0.155  
0.118  
F
A
b
4.25  
0.69  
1.20  
0.36  
14.85  
12.19  
10.04  
2.41  
4.88  
1.14  
6.09  
2.41  
13.35  
3.32  
3.54  
2.60  
0.167  
0.027  
0.047  
0.014  
0.585  
0.480  
0.395  
0.095  
0.192  
0.045  
0.240  
0.095  
0.526  
0.131  
0.139  
0.102  
Ø P  
b(1)  
c
D
D2  
E
e
e(1)  
F
1
3
2
H(1)  
J(1)  
L
*
M
L(1)  
Ø P  
Q
b(1)  
ECN: T14-0413-Rev. P, 16-Jun-14  
DWG: 5471  
Note  
* M = 1.32 mm to 1.62 mm (dimension including protrusion)  
Heatsink hole for HVM  
C
b
e
J(1)  
e(1)  
D2  
Revison: 16-Jun-14  
Document Number: 71195  
1
For technical questions, contact: hvm@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Package Information  
Vishay Siliconix  
TO-263AB (HIGH VOLTAGE)  
A
B
(Datum A)  
3
4
A
A
E
c2  
H
L1  
4
Gauge  
plane  
0° to 8°  
4
B
5
Detail A  
Seating plane  
D
H
L
C
C
A1  
L3  
L4  
Detail “A”  
1
2
3
L2  
Rotated 90° CW  
B
B
scale 8:1  
A
2 x b2  
2 x b  
c
E
M
M
B
0.010  
A
M
0.004  
B
2 x e  
Base  
metal  
5
D1  
4
Plating  
(c)  
b1, b3  
5
c1  
(b, b2)  
Lead tip  
4
E1  
Section B - B and C - C  
Scale: none  
View A - A  
MILLIMETERS  
INCHES  
MILLIMETERS  
INCHES  
DIM.  
A
MIN.  
4.06  
0.00  
0.51  
0.51  
1.14  
1.14  
0.38  
0.38  
1.14  
8.38  
MAX.  
4.83  
0.25  
0.99  
0.89  
1.78  
1.73  
0.74  
0.58  
1.65  
9.65  
MIN.  
0.160  
0.000  
0.020  
0.020  
0.045  
0.045  
0.015  
0.015  
0.045  
0.330  
MAX.  
0.190  
0.010  
0.039  
0.035  
0.070  
0.068  
0.029  
0.023  
0.065  
0.380  
DIM.  
D1  
E
MIN.  
6.86  
MAX.  
MIN.  
MAX.  
-
10.67  
-
0.270  
0.380  
0.245  
-
0.420  
-
A1  
b
9.65  
6.22  
E1  
e
b1  
b2  
b3  
c
2.54 BSC  
0.100 BSC  
H
14.61  
15.88  
2.79  
1.65  
1.78  
0.575  
0.625  
0.110  
0.066  
0.070  
L
1.78  
0.070  
L1  
L2  
L3  
L4  
-
-
-
-
c1  
c2  
D
0.25 BSC  
0.010 BSC  
4.78  
5.28  
0.188  
0.208  
ECN: S-82110-Rev. A, 15-Sep-08  
DWG: 5970  
Notes  
1. Dimensioning and tolerancing per ASME Y14.5M-1994.  
2. Dimensions are shown in millimeters (inches).  
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the  
outmost extremes of the plastic body at datum A.  
4. Thermal PAD contour optional within dimension E, L1, D1 and E1.  
5. Dimension b1 and c1 apply to base metal only.  
6. Datum A and B to be determined at datum plane H.  
7. Outline conforms to JEDEC outline to TO-263AB.  
Document Number: 91364  
Revision: 15-Sep-08  
www.vishay.com  
1
Package Information  
Vishay Siliconix  
I2PAK (TO-262) (HIGH VOLTAGE)  
A
B
A
(Datum A)  
E
c2  
A
E
L1  
D
Seating  
plane  
D1  
C
C
L2  
B
B
L
A
c
E1  
3 x b2  
3 x b  
A1  
Section A - A  
Base  
metal  
2 x e  
b1, b3  
Plating  
M
M
B
0.010  
A
c1  
c
(b, b2)  
Lead tip  
Section B - B and C - C  
Scale: None  
MILLIMETERS  
INCHES  
MAX.  
MILLIMETERS  
INCHES  
MAX.  
DIM.  
A
MIN.  
MAX.  
4.83  
3.02  
0.99  
0.89  
1.78  
1.73  
0.74  
0.58  
1.65  
MIN.  
0.160  
0.080  
0.020  
0.020  
0.045  
0.045  
0.015  
0.015  
0.045  
DIM.  
MIN.  
MAX.  
MIN.  
0.330  
0.270  
0.380  
0.245  
4.06  
2.03  
0.51  
0.51  
1.14  
1.14  
0.38  
0.38  
1.14  
0.190  
0.119  
0.039  
0.035  
0.070  
0.068  
0.029  
0.023  
0.065  
D
D1  
E
8.38  
6.86  
9.65  
6.22  
9.65  
0.380  
A1  
b
-
10.67  
-
-
0.420  
-
b1  
b2  
b3  
c
E1  
e
2.54 BSC  
0.100 BSC  
L
13.46  
-
14.10  
1.65  
3.71  
0.530  
-
0.555  
0.065  
0.146  
L1  
L2  
c1  
c2  
3.56  
0.140  
ECN: S-82442-Rev. A, 27-Oct-08  
DWG: 5977  
Notes  
1. Dimensioning and tolerancing per ASME Y14.5M-1994.  
2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost  
extremes of the plastic body.  
3. Thermal pad contour optional within dimension E, L1, D1, and E1.  
4. Dimension b1 and c1 apply to base metal only.  
Document Number: 91367  
Revision: 27-Oct-08  
www.vishay.com  
1
AN826  
Vishay Siliconix  
2
RECOMMENDED MINIMUM PADS FOR D PAK: 3-Lead  
0.420  
(10.668)  
0.145  
(3.683)  
0.135  
(3.429)  
0.200  
0.050  
(5.080)  
(1.257)  
Recommended Minimum Pads  
Dimensions in Inches/(mm)  
Return to Index  
Document Number: 73397  
11-Apr-05  
www.vishay.com  
1
Legal Disclaimer Notice  
www.vishay.com  
Vishay  
Disclaimer  
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE  
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other  
disclosure relating to any product.  
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or  
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© 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED  
Revision: 09-Jul-2021  
Document Number: 91000  
1

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