IRFS9N60APBF [VISHAY]
Power MOSFET; 功率MOSFET型号: | IRFS9N60APBF |
厂家: | VISHAY |
描述: | Power MOSFET |
文件: | 总8页 (文件大小:166K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IRFS9N60A, SiHFS9N60A
Vishay Siliconix
Power MOSFET
FEATURES
• Low Gate Charge Qg results in Simple Drive
Requirement
PRODUCT SUMMARY
VDS (V)
600
Available
RDS(on) (Ω)
VGS = 10 V
0.75
RoHS*
• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
COMPLIANT
Qg (Max.) (nC)
49
13
20
Q
Q
gs (nC)
gd (nC)
• Fully Characterized Capacitance and Avalanche Voltage
and Current
• Lead (Pb)-free Available
Configuration
Single
D
APPLICATIONS
D2PAK (TO-263)
• Switch Mode Power Supply (SMPS)
• Uninterruptible Power Supply
• High Speed Power Switching
G
APPLICABLE OFF LINE SMPS TOPOLOGIES
• Active Clamped Forward
D
G
S
N-Channel MOSFET
S
• Main Switch
ORDERING INFORMATION
Package
D2PAK (TO-263)
IRFS9N60APbF
D2PAK (TO-263)
D2PAK (TO-263)
IRFS9N60ATRRPbFa
SiHFS9N60ATR-E3a
IRFS9N60ATRRa
SiHFS9N60ATRa
IRFS9N60ATRLPbFa
SiHFS9N60ATL-E3a
IRFS9N60ATRLa
SiHFS9N60ATLa
Lead (Pb)-free
SiHFS9N60A-E3
IRFS9N60A
SnPb
SiHFS9N60A
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
Gate-Source Voltage
VDS
600
V
VGS
30
9.2
TC = 25 °C
TC =100°C
Continuous Drain Current
VGS at 10 V
ID
5.8
A
Pulsed Drain Currenta
IDM
37
Linear Derating Factor
1.3
W/°C
mJ
A
Single Pulse Avalanche Energyb
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
EAS
IAR
290
9.2
EAR
17
mJ
W
Maximum Power Dissipation
TC = 25 °C
PD
170
Peak Diode Recovery dV/dtc
dV/dt
TJ, Tstg
5.0
V/ns
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
- 55 to + 150
300d
°C
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 6.8 mH, RG = 25 Ω, IAS = 9.2 A (see fig. 12).
c. ISD ≤ 9.2 A, dI/dt ≤ 50 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
www.vishay.com
1
WORK-IN-PROGRESS
IRFS9N60A, SiHFS9N60A
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
40
UNIT
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
RthJA
RthJC
-
-
°C/W
0.75
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS
ΔVDS/TJ
VGS(th)
IGSS
VGS = 0 V, ID = 250 µA
Reference to 25 °C, ID = 1 mA
VDS = VGS, ID = 250 µA
600
-
-
-
V
V/°C
-
0.66
V
DS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
2.0
-
-
-
-
-
-
4.0
100
25
250
0.75
-
V
VGS
VDS = 600 V, VGS = 0 V
DS = 480 V, VGS = 0 V, TJ = 125 °C
VGS = 10 V
ID = 5.5 Ab
VDS = 25 V, ID = 3.1 A
=
30 V
-
nA
-
-
Zero Gate Voltage Drain Current
IDSS
µA
V
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
RDS(on)
gfs
-
Ω
5.5
S
Input Capacitance
Ciss
Coss
Crss
-
-
-
-
-
-
-
-
-
-
-
-
-
1400
180
7.1
1957
49
96
-
-
-
VGS = 0 V,
DS = 25 V,
f = 1.0 MHz, see fig. 5
Output Capacitance
V
Reverse Transfer Capacitance
-
pF
V
DS = 1.0 V, f = 1.0 MHz
-
Output Capacitance
Coss
V
GS = 0 V
VDS = 480 V, f = 1.0 MHz
VDS = 0 V to 480 Vc
-
Effective Output Capacitance
Total Gate Charge
C
oss eff.
Qg
-
49
13
20
-
ID = 9.2 A, VDS = 400 V
see fig. 6 and 13b
Gate-Source Charge
Gate-Drain Charge
Qgs
Qgd
td(on)
tr
V
GS = 10 V
-
nC
ns
-
Turn-On Delay Time
Rise Time
13
25
30
22
-
V
R
DD = 300 V, ID = 9.2 A
G = 9.1 Ω, RD = 35.5 Ω,
see fig. 10b
Turn-Off Delay Time
Fall Time
td(off)
tf
-
-
Drain-Source Body Diode Characteristics
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
Continuous Source-Drain Diode Current
Pulsed Diode Forward Currenta
IS
-
-
-
-
9.2
37
A
G
ISM
S
Body Diode Voltage
VSD
trr
TJ = 25 °C, IS = 9.2 A, VGS = 0 Vb
-
-
-
-
1.5
800
4.4
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
530
3.0
ns
µC
TJ = 25 °C, IF = 9.2 A, dI/dt = 100 A/µsb
Qrr
ton
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS
.
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2
Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
IRFS9N60A, SiHFS9N60A
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
10
1
100
VGS
15V
TOP
10V
8.0V
7.0V
6.0V
5.5V
5.0V
°
T = 150 C
BOTTOM 4.7V
J
10
°
T = 25 C
J
1
4.7V
20µs PULSE WIDTH
V
= 50V
DS
20µs PULSE WIDTH
°
T = 25 C
J
0.1
0.1
0.1
4.0
1
10
100
5.0
6.0
7.0
8.0 9.0
10.0
V
, Drain-to-Source Voltage (V)
V
, Gate-to-Source Voltage (V)
DS
GS
Fig. 1 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
100
10
1
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VGS
9.2A
=
I
D
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.7V
4.7V
20µs PULSE WIDTH
V
=10V
°
T = 150 C
GS
J
-60 -40 -20
0
20 40 60 80 100 120 140 160
°
1
10
100
T , Junction Temperature ( C)
V
, Drain-to-Source Voltage (V)
J
DS
Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
www.vishay.com
3
IRFS9N60A, SiHFS9N60A
Vishay Siliconix
100
10
1
2400
V
C
C
C
= 0V,
f = 1MHz
GS
iss
rss
oss
= C + C
,
C
SHORTED
gs
gd
gd
ds
= C
2000
1600
1200
800
400
0
= C + C
ds
gd
iss
°
oss
T = 150 C
J
°
T = 25 C
J
rss
V
V
= 0 V
GS
0.1
0.2
A
0.5
0.7
1.0
1.2
1
10
100
1000
V
,Source-to-Drain Voltage (V)
SD
, Drain-to-Source Voltage (V)
DS
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
I
D
= 9.2A
1000
OPERATION IN THIS AREA LIMITED
V
V
V
=
= 300V
= 120V
BY R
DS
DS
DS
DS(on)
16
12
8
100
10us
10
100us
1ms
1
4
10ms
°
T = 25 C
C
FOR TEST CIRCUIT
SEE FIGURE 13
°
T = 150 C
Single Pulse
J
0
0.1
0
10
20
30
40
50
10
100
1000
10000
Q , Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
G
Fig. 8 - Maximum Safe Operating Area
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Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
IRFS9N60A, SiHFS9N60A
Vishay Siliconix
RD
VDS
10.0
8.0
6.0
4.0
2.0
0.0
VGS
D.U.T.
RG
+
V
-
DD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
25
50
75
100
125
°
150
T , Case Temperature ( C)
C
td(on) tr
td(off) tf
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.10
P
2
DM
0.05
t
1
0.02
t
2
SINGLE PULSE
(THERMAL RESPONSE)
0.01
Notes:
1. Duty factor D =
t / t
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
15 V
tp
Driver
L
VDS
D.U.T
IAS
RG
+
-
V
A
DD
IAS
20 V
0.01 Ω
tp
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
www.vishay.com
5
IRFS9N60A, SiHFS9N60A
Vishay Siliconix
600
500
400
300
200
100
I
D
TOP
4.1A
5.8A
BOTTOM 9.2A
0
25
50
75
100
125
150
°
Starting T , Junction Temperature ( C)
J
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
-
VDS
D.U.T.
VG
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
Fig. 13b - Gate Charge Test Circuit
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Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
IRFS9N60A, SiHFS9N60A
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
Circuit layout considerations
• Low stray inductance
• Ground plane
D.U.T
• Low leakage inductance
current transformer
-
+
-
-
+
RG
• dV/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by duty factor "D"
• D.U.T. - device under test
VDD
Driver gate drive
P.W.
P.W.
Period
Period
D =
V
= 10 V*
GS
D.U.T. I waveform
SD
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. V waveform
DS
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode
forward drop
Inductor current
I
SD
Ripple ≤ 5 %
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91287.
Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
www.vishay.com
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Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
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Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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