JM38510/19008BEC [VISHAY]
Single 8-Ch/Differential 4-Ch CMOS Analog Multiplexers; 单8通道/差分4通道CMOS模拟多路复用器
| 型号： | JM38510/19008BEC |
| 厂家： | 
VISHAY |
| 描述： | Single 8-Ch/Differential 4-Ch CMOS Analog Multiplexers |
| 文件： | 总11页 (文件大小：198K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DG508A_MIL/509A_MIL
Vishay Siliconix
Single 8-Ch/Differential 4-Ch CMOS Analog Multiplexers
(Obsolete for non-hermetic. Use DG408/409 as pin-for-pin replacements.)
FEATURES
BENEFITS
APPLICATIONS
D Low On-Resistance: 240 W
D TTL and CMOS Logic Compatible
D Low Power: 30 mW
D Easily Interfaced
D Communication Systems
D ATE
D Low Power Consumption
D Low System Crosstalk
D Wide Analog Signal Range
D Data Acquisition Systems
D Audio Signal Routing and Multiplexing
D Medical Instrumentation
D Break-Before-Make Switching
D 44-V Power Supply Rating
D Transition Time: 600 ns
DESCRIPTION
The DG508A_MIL, an 8-channel single-ended analog
multiplexer, is designed to connect one of eight inputs to a
common output as determined by a 3-bit binary address (A0,
A1, A2).
enable (EN) are TTL or CMOS compatible over the full
specified operating temperature range.
Fabricated in the Vishay Siliconix Plus-40 process, the
absolutemaximum voltage rating is extended to 44 V, allowing
increased operating headroom for standard "15-V signal
swings and operation with "20-V supplies. An epitaxial layer
prevents latch up.
The DG509A_MIL, a dual 4-channel analog multiplexer, is
designedtoconnectoneoffourdifferentialinputstoacommon
output as determined by its 2-bit binary address (A0, A1) logic.
Break-before-make switching action protects against
momentary shorting of the input signals.
The DG508A_MIL/509A_MIL are available in hermetic
packages. For plastic packages, use the DG408/409 as
pin-for-pin replacements.
A channel in the on state conducts current equally well in both
directions. In the off state each channel blocks voltages up to
the power supply rails, normally 30 V peak-to-peak. An enable
(EN) function allows for device selection when several
multiplexers are used All control inputs, address (AX) and
For applications requiring address data latching, the
DG528/529 is recommended. DG408/409 is recommended
for higher precision applications. For wideband/video routing
and multiplexing, the DG538A is recommended.
FUNCTIONAL BLOCK DIAGRAMS AND PIN CONFIGURATIONS
Dual-In-Line
LCC
NC
EN
A
0
A
1
A
2
Key
V–
A
A
A
0
1
3
2
1
20
19
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
EN
V–
2
Decoders/Drivers
4
5
6
7
8
18
17
GND
V+
Decoders/Drivers
GND
V+
S
1
DG508A_MIL
S
S
S
S
1
2
3
16
NC
NC
S
5
S
6
S
7
15
14
S
2
S
3
S
5
S
6
4
9
10
11
12
13
D
S
8
DG508A_MIL
S
4
D
NC
S
S
7
8
Top View
Top View
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-1
DG508A_MIL/509A_MIL
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAMS AND PIN CONFIGURATIONS
ORDERING INFORMATION
-
DG508A_MIL
TRUTH TABLE
-
DG508A_MIL
Temp Range
Package
Part Number
A2
A1
A0
EN
On Switch
0 to 70_C
–25 to 85_C
–40 to 85_C
16-Pin Plastic DIP
16-Pin CerDIP
DG508ACJ
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
None
DG508ABK
1
2
3
4
5
6
7
8
16-Pin Narrow SOIC
DG508ADY
DG508AAK
16-Pin CerDIP
LCC-20
DG508AAK/883
DG508AAZ/883
7705201EA
16-Pin Sidebraze
–55 to 125_C
7705201EC
7705201FA
16-Pin Flat Pack
16-Pin Sidebraze
7705201FC
Logic “0” = V v 0.8 V
AL
Logic “1” = V w 2.4 V
JM38510/19007BEA
JM38510/19007BEC
AH
X = Don’t Care
LCC
NC
Dual-In-Line and SOIC
Decoders/Drivers
EN
3
A
A
GND
19
0
1
Key
A
A
1
0
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
2
1
20
EN
V–
GND
V+
4
5
6
7
8
18
V–
V+
Decoders/Drivers
DG509A_MIL
17
S
S
1b
1a
S
S
S
S
S
1a
2a
3a
1b
2b
3b
16
15
14
NC
NC
S
S
S
S
S
2a
3a
2b
3b
S
S
4a
4b
9
10
11
12
13
S
D
D
b
a
DG509A_MIL
S
4a
D
NC
Top View
D
b
a
4b
Top View
ORDERING INFORMATION
-
DG509A_MIL
TRUTH TABLE
-
DG509A_MIL
Temp Range
Package
16-Pin CerDIP
LCC-20
Part Number
DG509AAK
A1
A0
EN
On Switch
X
0
0
1
1
X
0
1
0
1
0
1
1
1
1
None
DG509AAK/883
DG509AAZ/883
1
2
3
4
–55 to 125_C
JM38510/19008BEA
JM38510/19008BEC
16-Pin Sidebraze
Logic “0” = V v 0.8 V
AL
Logic “1” = V w 2.4 V
AH
X = Don’t Care
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-2
nA
I
V
S
= V
= "10 V
DG508A_MIL/509A_MIL
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltage Referenced to V–
Storage Temperature
(K Suffix) . . . . . . . . . . . . . . . . . . . –65 to 150_C
(J and Y Suffix) . . . . . . . . . . . . . . –65 to 125_C
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V
b
GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
a
Power Dissipation (Package)
c
16-Pin CerDIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
Digital Inputs , V , V . . . . . . . . . . . . . . . . . . . . . . . . (V–) –2 V to (V+) +2 V or
S
D
c
LCC-20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
20 mA, whichever occurs first
Notes:
Current (Any Terminal, Except S or D) . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
a. Signals on S , D or IN exceeding V+ or V– will be clamped by internal
X
X
X
diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 12 mW/_C above 75_C.
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
a
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
A Suffix
–55 to 125_C
V+ = 15 V, V– = –15 V
Typc
Mind
Maxd
Parameter
Analog Switch
Analog Signal Range
Symbol
Tempb
Unit
f
V
IN
= 2.4 V, 0.8 V
e
V
Full
–15
15
V
W
%
ANALOG
Drain-Source
On-Resistance
Room
Full
240
6
400
500
r
V = "10 V, I = –200 mA
D S
DS(on)
r
Match
Dr
DS(on)
–10 V < V < 10 V
Room
DS(on)
S
Source Off
Leakage Current
V
EN
= 0 V, V = "10 V
Room
Full
–1
–50
1
50
S
I
S(off)
V
D
= #10 V
Room
Full
–10
–200
10
200
DG508A_MIL
DG509A_MIL
DG508A_MIL
DG509A_MIL
V
= 0 V
= ""10 V
= #10 V
EN
Drain Off
Leakage Current
I
V
V
D(off)
D(on)
D
S
Room
Full
–10
–100
10
100
Room
Full
–10
–200
10
200
Drain On
Leakage Current
D
Room
Full
–10
–100
10
100
Digital Control
Room
Full
–10
–30
V
= 2.4 V
= 15 V
–0.002
0.006
A
Logic Input Current
Input Voltage High
I
AH
Room
Full
10
30
V
mA
A
Logic Input Current
Input Voltage Low
Room
Full
–10
–30
I
AL
V
EN
= 0 V, 2.4 V, V = 0 V
A
–0.002
Dynamic Characteristics
Transition Time
t
See Figure 2
See Figure 4
Room
Room
Room
Room
Room
0.6
0.2
1
1.0
TRANS
Break-Before-Make Time
Enable Turn-On Time
Enable Turn-Off Time
Charge Injection
t
OPEN
ms
t
1.5
1.0
ON(EN)
See Figure 3
See Figure 5
t
0.4
6
OFF(EN)
Q
pC
dB
V
EN
= 0 V, R = 1 kW, C = 15 pF
L
L
Off Isolation
OIRR
Room
68
V
S
= 7 V
, f = 500 kHz
RMS
Logic Input Capacitance
Source Off Capacitance
C
f = 1 MHz
= 0 V, V = 0 V, f = 140 kHz
Room
Room
Room
Room
8
6
in
C
S(off)
V
EN
S
pF
DG508A_MIL
DG509A_MIL
25
12
V
= 0 V, V = 0 V
D
f = 140 kHz
EN
Drain Off Capacitance
C
D(off)
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-3
DG508A_MIL/509A_MIL
Vishay Siliconix
a
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
A Suffix
–55 to 125_C
V+ = 15 V, V– = –15 V
f
Typc
Mind
Maxd
Parameter
Symbol
Tempb
Unit
V
IN
= 2.4 V, 0.8 V
Power Supplies
Positive Supply Current
Negative Supply Current
I+
I–
Room
Room
1.3
2.4
V
EN
= 0 V or 2.4 V
mA
–1.5
–0.7
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f.
V
IN
= input voltage to perform proper function.
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
Input Switching Threshold vs. V+ and V–
Supply Voltages
r
vs. V and Power Supply
DS(on)
D
2.5
2.0
1.5
"5 V
500
400
300
200
100
0
"7.5 V
"10 V
"15 V
1.0
"20 V
0.5
0
”5
”10
”15
”20
–20 –15
–10
–5
0
5
10
15
20
V
D
– Drain Voltage (V)
V+, V– Positive and Negative Supplies (V)
Charge Injection vs. Analog Voltage (V )
r
vs. V and Temperature
S
DS(on)
D
16
14
12
10
8
500
450
V+ = 15 V
V– = –15 V
V+ = 15 V
V– = –15 V
400
350
300
125_C
25_C
250
200
150
100
50
6
–55_C
4
2
0
0
–15
–10
–5
0
5
10
15
–15
–10
–5
0
5
10
15
V
S
– Source Voltage (V)
V – Drain Voltage (V)
D
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-4
DG508A_MIL/509A_MIL
Vishay Siliconix
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
Supply Current vs. Switching Frequency
Crosstalk vs. Frequency
6
4
0
–20
–40
V+ = 15 V
V– = –15 V
ref. 0 dBm
V+ = 15 V
V– = –15 V
CerDIP
Plastic
I+
2
0
–60
–80
–2
–4
–6
I–
–100
–120
10 k
100 k
1 M
1 k
10 k
100 k
1 M
10 M
f – Frequency (Hz)
f – Frequency (Hz)
Off Isolation vs. Frequency
Switching Time vs. Temperature
0
1400
1200
1000
V+ = 15 V
V– = –15 V
ref. 0 dBm
V+ = 15 V
V– = –15 V
–20
CerDIP
–40
Plastic
t
TRANS
–60
–80
800
600
400
200
t
OPEN
–100
–120
1 k
10 k
100 k
f – Frequency (Hz)
1 M
10 M
–55 –35 –15
5
25
45
65
85 105 125
Temperature (_C)
Switching Time vs. Positive Supply Voltage
Leakages vs. Temperature
100 nA
10 nA
1100
1000
900
V+ = 15 V
V– = –15 V
= "14 V
V
D
800
700
1 nA
100 pA
10 pA
I
, I
D(on) D(off)
t
TRANS
600
I
S(off)
500
400
t
OPEN
300
200
10
12
14
16
18
20
22
–55 –35 –15
5
25
45
65
85
105 125
V+ – Positive Supply (V)
Temperature (_C)
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-5
DG508A_MIL/509A_MIL
Vishay Siliconix
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
I
vs. Analog Voltage
I , I vs. Analog Voltage
D(on) D(off)
S(off)
25
20
V+ = 15 V
V– = –15 V
V+ = 15 V
V– = –15 V
V
S
T
= –V
= 25_C
T
A
= 25_C
D
15
5
A
0
I
D(on)
–20
0
I
I
S(off)
D(off)
–5
–40
–60
–15
–25
5
10
15
–15
–10
–5
0
5
10
15
–15
–10
–5
0
V
S
– Source Voltage (V)
V – Drain Voltage (V)
D
Charge Injection vs. Power Supply Voltage
12
10
8
6
4
2
0
5
10
15
20
25
V+, V– Positive and Negative Supplies (V)
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
S
S
1
GND
V+
–
+
A
0
x
V–
V+
V+
V+
V–
V–
Decode/
Drive
–
+
V–
V+
A
X
V–
V+
–
+
EN
V–
D
FIGURE 1.
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-6
DG508A_MIL/509A_MIL
Vishay Siliconix
TEST CIRCUITS
+15 V
V+
A
A
A
2
S
"10 V
#10 V
1
1
0
S
2
– S
7
t <20 ns
r
S
8
t <20 ns
f
DG508A_MIL
EN
3 V
0 V
Logic
Input
V
O
D
50%
GND
V–
35 pF
300 W
50 W
–15 V
V
S1
90%
Switch
Output
+15 V
V
O
0 V
V+
A
A
1
90%
S
"10 V
#10 V
1
V
S8
0
S
– S , D
4a
1a
a
t
t
TRANS
TRANS
S
4b
DG509A_MIL
S ON
1
S ON
8
V
O
D
b
EN
GND
V–
35 pF
300 W
50 W
–15 V
FIGURE 2. Transition Time
+15 V
V+
S
1
– 5 V
EN
S
– S
2
8
A
0
A
1
A
2
t <20 ns
t <20 ns
f
DG508A_MIL
r
3 V
Logic
Input
50%
V
O
D
GND
V–
0 V
t
50 W
35 pF
1 kW
t
ON(EN)
OFF(EN)
–15 V
0 V
10%
+15 V
V+
Switch
Output
V
O
90%
S
1b
– 5 V
EN
S
1a
– S , D
4a a
A
0
S
2b
– S
4b
DG509A_MIL
A
1
D
V
O
b
GND
V–
50 W
35 pF
1 kW
–15 V
FIGURE 3. Enable Switching Time
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-7
DG508A_MIL/509A_MIL
Vishay Siliconix
TEST CIRCUITS
+15 V
V+
t <20 ns
r
t <20 ns
f
3 V
0 V
Logic
Input
+2.4 V
EN
50%
All S and D
+5 V
a
A
A
A
0
DG508A_MIL
DG509A_MIL
1
D , D
2
b
V
O
V
S
80%
GND
V–
Switch
Output
50 W
35 pF
300 W
–15 V
V
O
t
OPEN
0 V
FIGURE 4. Break-Before-Make Interval
+15 V
V+
R
g
3 V
0 V
S
Logic
Input
X
OFF
ON
OFF
EN
V
g
A
A
A
0
D
V
O
Channel
Select
1
2
DV
O
C
L
Switch
Output
10 nF
GND
V–
DV is the measured voltage due to charge transfer
O
error Q, when the channel turns off.
–15 V
Q = C x DV
L
O
FIGURE 5. Charge Injection
+15 V
+15 V
V+
V
IN
V
IN
S
S
1
V+
S
X
V
S
X
V
S
R
g
= 50 W
S
8
A
0
A
1
A
2
S
8
A
0
A
1
A
2
D
V
O
D
V
O
R
g
= 50 W
R
1 kW
L
R
L
GND
EN
V–
1 kW
GND
EN
V–
–15 V
Off Isolation = 20 log
–15 V
Crosstalk = 20 log
V
OUT
V
OUT
V
IN
V
IN
FIGURE 6. Off Isolation
FIGURE 7. Crosstalk
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-8
DG508A_MIL/509A_MIL
Vishay Siliconix
TEST CIRCUITS
+15 V
V+
+15 V
V+
V
S
S
S
1
S
1
Meter
R
g
= 50 W
A
A
A
2
1
0
HP4192A
Impedance
Analyzer
Channel
Select
8
A
0
A
1
A
2
D
V
O
or Equivalent
R
1 kW
L
D
f = 1 MHz
EN
GND
V–
GND
EN
V–
–15 V
–15 V
V
OUT
Insertion Loss = 20 log
V
IN
FIGURE 8. Insertion Loss
FIGURE 9. Source Drain Capacitance
a
APPLICATIONS
V+
V–
VIN
VS or VD
Analog Voltage
Range
Positive Supply
Negative Supply Logic Input Voltage
Voltage
(V)
Voltage
(V)
VINH(min)/VINL(max)
(V)
(V)
–15
–12
–10
–8
15
10
12
2.4/0.8
2.4/0.8
2.4/0.6
2.4/0.4
–15 to 15
–12 to 12
–10 to 10
–8 to 8
b
8
Notes:
a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject to production testing.
b. Operation below "8 V is not recommended.
Overvoltage Protection
+15 V
V+ v V v V–
g
1N4148
A very convenient form of overvoltage protection consists of
addingtwo small signal diodes (1N4148, 1N914 type) in series
with the supply pins (see Figure 11). This arrangement
effectively blocks the flow of reverse currents. It also floats the
supply pin above or below the normal V+ or V– value. In this
case the overvoltage signal actually becomes the power
supply of the IC. From the point of view of the chip, nothing has
changed, as long as the difference between VS and the V– rail
doesn’t exceed +44 V. The addition of these diodes will reduce
the analog signal range to 1 V below V+ and 1 V above V–, but
it preserves the low channel resistance and low leakage
characteristics.
V+
DG508A_MIL
Internal
Junction
S
X
D
Internal
Junction
V
g
V–
1N4148
–15 V
FIGURE 10. Overvoltage Protection Using Blocking Diodes
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
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DG508A_MIL/509A_MIL
Vishay Siliconix
APPLICATIONS
+15 V
–15 V
V+ GND
1
V–
S
Analog
Inputs
(Outputs)
DG508A_MIL
Analog
Output
(Input)
D
S
8
A
0
A
1
A
2
EN
+5 V
Q
B
Q
C
Q
D
Q
A
DM7493
CLOCK
IN
NC
r
01
r
02
GND
+15 V
ENABLE
IN
(Multiplexer On-Off Control)
FIGURE 11. 8-Channel Sequential Multiplexer/ Demultiplexer
+15 V
–15 V
V+ GND
1a
V–
S
Differential
Analog
Inputs
D
a
Differential
Analog
Output
S
S
4a DG509A_MIL
(Outputs)
1b
(Input)
D
b
S
4b
A
0
A
1
EN
+5 V
J
J
Q
Q
Q
1/2 MM74C73
CLK
1/2 MM74C73
CLK
CLOCK
IN
Q
NC
NC
K
K
CLEAR GND
CLEAR
RESET
ENABLE
FIGURE 12. Differential 4-Channel Sequential Multiplexer/ Demultiplexer
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
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Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
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