P425.K [VISHAY]
Silicon Controlled Rectifier, 1200V V(DRM), 1200V V(RRM), 2 Element, ROHS COMPLIANT, PACE-PAK(D-19), 8 PIN;
| 型号： | P425.K |
| 厂家： | 
VISHAY |
| 描述： | Silicon Controlled Rectifier, 1200V V(DRM), 1200V V(RRM), 2 Element, ROHS COMPLIANT, PACE-PAK(D-19), 8 PIN 栅极 触发装置 可控硅整流器 局域网 |
| 文件： | 总6页 (文件大小：122K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
P400 Series
Vishay High Power Products
Passivated Assembled Circuit Elements, 40 A
FEATURES
• Glass passivated junctions for greater reliability
• Electrically isolated base plate
• Available up to 1200 VRRM/VDRM
• High dynamic characteristics
• Wide choice of circuit configurations
• Simplified mechanical design and assembly
• UL E78996 approved
PACE-PAK (D-19)
• Compliant to RoHS directive 2002/95/EC
DESCRIPTION
The P400 series of integrated power circuits consists of
power thyristors and power diodes configured in a single
package. With its isolating base plate, mechanical designs
are greatly simplified giving advantages of cost reduction
and reduced size.
PRODUCT SUMMARY
IO
40 A
Applications include power supplies, control circuits and
battery chargers.
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
CHARACTERISTICS
VALUES
40
UNITS
IO
80 °C
A
50 Hz
60 Hz
50 Hz
60 Hz
385
ITSM
IFSM
,
A
400
745
I2t
A2s
680
I2√t
7450
A2√s
V
VRRM
VISOL
TJ
Range
400 to 1200
2500
V
- 40 to 125
°C
TStg
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
VRRM/VDRM, MAXIMUM
REPETITIVE PEAK REVERSE AND
VRSM, MAXIMUM
NON-REPETITIVE PEAK
REVERSE VOLTAGE
V
I
RRM MAXIMUM
TYPE
NUMBER
AT TJ MAXIMUM
mA
PEAK OFF-STATE VOLTAGE
V
P401, P421, P431
P402, P422, P432
P403, P423, P433
P404, P424, P434
P405, P425, P435
400
600
500
700
800
900
10
1000
1200
1100
1300
Document Number: 93755
Revision: 05-Nov-09
For technical questions, contact: indmodules@vishay.com
www.vishay.com
1
P400 Series
Vishay High Power Products
Passivated Assembled
Circuit Elements, 40 A
ON-STATE CONDUCTION
PARAMETER
SYMBOL
TEST CONDITIONS
Full bridge circuits
VALUES
40
UNITS
A
Maximum DC output current
at case temperature
IO
80
°C
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
385
400
325
340
745
680
530
480
No voltage
reapplied
Maximum peak, one-cycle
non-repetitive on-state or
forward current
ITSM
IFSM
,
A
100 % VRRM
reapplied
Sinusoidal half wave,
initial TJ = TJ maximum
No voltage
reapplied
Maximum I2t for fusing
I2t
A2s
100 % VRRM
reapplied
t = 0.1 ms to 10 ms, no voltage reapplied
I2t for time tx = I2√t · √tx
Maximum I2√t for fusing
I2√t
7450
A2√s
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage drop
VT(TO)1
VT(TO)2
rt1
(16.7 % x π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum
(I > π x IT(AV)), TJ = TJ maximum
0.83
1.03
9.61
7.01
V
(16.7 % x π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum
(I > π x IT(AV)), TJ = TJ maximum
mΩ
rt2
VTM
VFM
ITM = π x IT(AV)
TJ = 25 °C
1.4
V
Maximum forward voltage drop
IFM = π x IF(AV)
Maximum non-repetitive rate of rise of
turned-on current
TJ = 125 °C from 0.67 VDRM
ITM = π x IT(AV), Ig = 500 mA, tr < 0.5 μs, tp > 6 μs
dI/dt
200
A/μs
mA
Maximum holding current
Maximum latching current
IH
IL
130
250
TJ = 25 °C anode supply = 6 V, resistive load
BLOCKING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum critical rate of rise of
off-state voltage
dV/dt
TJ = 125 °C, exponential to 0.67 VDRM gate open
200
V/μs
Maximum peak reverse and off-state
leakage current at VRRM, VDRM
IRRM
IDRM
IRRM
,
TJ = 125 °C, gate open circuit
TJ = 25 °C
10
mA
μA
V
Maximum peak reverse leakage current
100
50 Hz, circuit to base, all terminals shorted,
TJ = 25 °C, t = 1 s
RMS isolation voltage
VISOL
2500
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2
For technical questions, contact: indmodules@vishay.com
Document Number: 93755
Revision: 05-Nov-09
P400 Series
Vishay High Power Products
Passivated Assembled
Circuit Elements, 40 A
TRIGGERING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum peak gate power
Maximum average gate power
Maximum peak gate current
Maximum peak negative gate voltage
PGM
PG(AV)
IGM
8
2
W
2
A
V
-VGM
10
3
TJ = - 40 °C
TJ = 25 °C
TJ = 125 °C
TJ = - 40 °C
TJ = 25 °C
TJ = 125 °C
Maximum gate voltage required to trigger
Maximum gate current required to trigger
VGT
2
V
1
Anode supply =
6 V resistive load
90
60
35
0.2
2
IGT
mA
Maximum gate voltage that will not trigger
Maximum gate current that will not trigger
VGD
IGD
V
TJ = 125 °C, rated VDRM applied
mA
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum junction operating
and storage temperature range
TJ, TStg
- 40 to 125
°C
Maximum thermal resistance,
junction to case per junction
RthJC
RthCS
DC operation
Mounting surface, smooth and greased
1.05
0.10
K/W
Maximum thermal resistance,
case to heatsink
Mounting torque, base to heatsink (1)
4
Nm
g
58
2.0
Approximate weight
oz.
Note
(1)
A mounting compund is recommended and the torque should be checked after a period of 3 hours to allow for the spread of the compound
CIRCUIT TYPE AND CODING (1)
CIRCUIT “0”
CIRCUIT “2”
CIRCUIT “3”
AC1 G1
AC2 G2
-
AC2 G2
G1 G4
AC1 G3
-
AC1 G1
AC2 G2
-
Terminal positions
Schematic diagram
+
+
+
G3
G1
G1
G1
G2
AC1
AC2
AC2
AC1
AC1
AC2
G2
G4 G2
(-)
(+)
(-)
(+)
(-)
(+)
Single phase hybrid bridge
common cathode
Single phase hybrid bridge doubler
Single phase all SCR bridge
Basic series
P40.
P40.K
P40.W
P42.
P42.K
-
P43.
P43.K
-
With voltage suppression
With freewheeling diode
With both voltage suppression
and freewheeling diode
P40.KW
-
-
Note
(1)
To complete code refer to Voltage Ratings table, i.e.: For 600 V P40.W complete code is P402W
Document Number: 93755
Revision: 05-Nov-09
For technical questions, contact: indmodules@vishay.com
www.vishay.com
3
P400 Series
Vishay High Power Products
Passivated Assembled
Circuit Elements, 40 A
120
120
+
~
100
100
80
60
40
20
0
-
80
180°
(sine)
60
40
TJ = 125 °C
20
0
0
25
50
75
100
125
0
5
10
15
20
25
30
35
40
Maximum Allowable
93755_01a
Total Output Current (A)
93755_01b
Ambient Temperature (°C)
Fig. 1 - Current Ratings Nomogram (1 Module Per Heatsink)
30
25
20
15
10
5
130
Fully turned-on
120
110
100
90
180°
120°
90°
60°
30°
180°
(Rect.)
RMS limit
180°
(Sine)
Ø
Conduction angle
TJ = 125 °C
80
Per junction
Per module
0
70
0
5
10
15
20
0
5
10 15 20 25 30 35 40 45
93755_02
Average On-State Current (A)
93755_04
Total Output Current (A)
Fig. 2 - On-State Power Loss Characteristics
Fig. 4 - Current Ratings Characteristics
40
35
30
25
20
15
10
5
1000
100
10
TJ = 25 °C
DC
180°
120°
90°
60°
30°
TJ = 125 °C
RMS limit
Ø
Conduction period
TJ = 125 °C
Per junction
Per junction
0
1
0
5
10
15
20
25
30
35
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
93755_03
Average On-State Current (A)
Fig. 3 - On-State Power Loss Characteristics
Instantaneous On-State Voltage (V)
93755_05
Fig. 5 - On-State Voltage Drop Characteristics
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For technical questions, contact: indmodules@vishay.com
Document Number: 93755
Revision: 05-Nov-09
P400 Series
Vishay High Power Products
Passivated Assembled
Circuit Elements, 40 A
350
325
300
275
250
225
200
175
150
400
350
300
250
200
150
At any rated load condition and with
rated VRRM applied following surge.
Initial TJ = 125 °C
Maximum non-repetitive surge current
versus pulse train duration. Control of
conduction may not be maintained.
Initial TJ = 125 °C
at 60 Hz 0.0083 s
at 50 Hz 0.0100 s
No voltage reapplied
Rated VRRM reapplied
Per junction
Per junction
1
10
100
0.01
0.1
1
Number of Equal Amplitude Half
Pulse Train Duration (s)
93755_06
93755_07
Cycle Current Pulses (N)
Fig. 6 - Maximum Non-Repetitive Surge Current
Fig. 7 - Maximum Non-Repetitive Surge Current
10
Steady state value
RthJC = 1.05 K/W
(DC operation)
1
0.1
Per junction
0.01
0.0001
0.001
0.01
0.1
1
93755_08
Square Wave Pulse Duration (s)
Fig. 8 - Thermal Impedance ZthJC Characteristics
100
(1) PGM = 10 W, tp = 5 ms
(2) PGM = 20 W, tp = 25 ms
(3) PGM = 50 W, tp = 1 ms
(4) PGM = 100 W, tp = 500 μs
Rectangular gate pulse
(a) Recommended load line for
rated dI/dt: 10 V, 20 Ω, tr ≤ 1 μs
(b) Recommended load line for
rated dI/dt: 10 V, 65 Ω, tr ≤ 1 μs
(a)
10
(b)
1
(1)
(2)
(3)
(4)
VGD
Frequency limited by PG(AV)
IGD
0.1
0.001
0.01
0.1
1
10
100
93755_09
Instantaneous Gate Current (A)
Fig. 9 - Gate Characteristics
LINKS TO RELATED DOCUMENTS
Dimensions
www.vishay.com/doc?95335
Document Number: 93755
Revision: 05-Nov-09
For technical questions, contact: indmodules@vishay.com
www.vishay.com
5
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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